blob: 2b01daae4f415b9d95e1ef60c4a86b639e71b7b3 [file] [log] [blame]
; Date: 4-25-2010
; Revision: 2.0
; initialize system
SYStem.RESet
system.cpu 88FR331
; disable the id check because the cpu does not send the debugger the pattern the debugger expects
sys.option noircheck on
; other 946 cpu bug fix seen also on 926
sys.option MULTIPLESFIX on
system.JTAGCLOCK 1MHz
system.up
system.JTAGCLOCK 5MHz
; select example program
area.res
area.c select
area.s select
w.area select
screen.always
print "Retrieving System Info:"
global &x
global &dev
global &y
global &cpuSample
global &cpuSpeed
global &ddrSpeed
global &lSpeed
global &bootDeviceSample
&ddrSpeed=400
; dram init
d.s 0xD0001400 %LONG 0x4301503E; DDR SDRAM Configuration Register
d.s 0xD0001404 %LONG 0xb9943000; Dunit Control Low Register
d.s 0xD0001408 %LONG 0x33137773; DDR SDRAM Timing (Low) Register
d.s 0xD000140C %LONG 0x16000a3a ; DDR SDRAM Timing (High) Register
d.s 0xD0001410 %LONG 0x070000CC ; DDR SDRAM Address Control Register
d.s 0xD0001414 %LONG 0x00000000 ; DDR SDRAM Open Pages Control Register
d.s 0xD0001418 %LONG 0x00000000 ; DDR SDRAM Operation Register
d.s 0xD000141C %LONG 0x00000672 ; DDR SDRAM Mode Register
d.s 0xD0001420 %LONG 0x00000040; DDR SDRAM Extended Mode Register
d.s 0xD0001424 %LONG 0x0000F17F; Dunit Control High Register
d.s 0xD0001428 %LONG 0x000A7740; Dunit Control High Register
d.s 0xD000147c %LONG 0x0000A774; Dunit Control High Register
d.s 0xD0001504 %LONG 0x0FFFFFF1; CS[0]n Size Register
d.s 0xD0001508 %LONG 0x10000000; CS[1]n Base Register
d.s 0xD000150C %LONG 0x0FFFFFF5; CS[1]n Size Register
d.s 0xD0001514 %LONG 0x00000000 ; CS[2]n Size Register
d.s 0xD000151C %LONG 0x00000000 ; CS[3]n Size Register
d.s 0xD0001494 %LONG 0x00120012; DDR2 SDRAM ODT Control (Low) Register
d.s 0xD0001498 %LONG 0x00000000 ; DDR2 SDRAM ODT Control (High) Register
; d.s 0xD000149C %LONG 0x0000E403; DDR2 Dunit ODT Control Register
d.s 0xD00015D0 %LONG 0x00000630; DDR3 MR0 Register
d.s 0xD00015D4 %LONG 0x00000046; DDR3 MR1 Register
d.s 0xD00015D8 %LONG 0x00000008; DDR3 MR2 Register
d.s 0xD00015DC %LONG 0x00000000; DDR3 MR3 Register
d.s 0xD00015E0 %LONG 0x00000023; DDR3 Rank Control Register
d.s 0xD00015E4 %LONG 0x00203C18; ZQC Configuration Register
d.s 0xD0001480 %LONG 0x00000001 ; DDR SDRAM Initialization Control Register
; set program counter at program start
Register.Set pc 0xFFFF0000
; open some windows
winpos 0% 0% 100% 50%
Data.List
winpos 0% 50% 50% 50%
SYStem
;enddo