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#include "mvSataSoc.h"
#include "mvRegs.h"

/* Calculate the base address of the registers for a SATA channel */
static MV_U32 edmaRegOffst[8] = { 0x22000, 0x24000, 0x26000, 0x28000,
	0x32000, 0x34000, 0x36000, 0x38000
};

#define getEdmaRegOffset(x) edmaRegOffst[(x)]

MV_BOOL mvSataPhyShutdown(MV_U8 port)
{
	MV_U32 regVal;
	MV_U32 adapterIoBaseAddress = MV_SATA_REGS_OFFSET - 0x20000;

	regVal = MV_REG_READ(adapterIoBaseAddress + getEdmaRegOffset(port) + MV_SATA_II_SATA_CONFIG_REG_OFFSET);
	/* Fix for 88SX60x1 FEr SATA#8 */
	/* according to the spec, bits [31:12] must be set to 0x009B1 */
	regVal &= 0x00000FFF;
	/* regVal |= MV_BIT12; */
	regVal |= 0x009B1000;

	regVal |= BIT9;
	MV_REG_WRITE(adapterIoBaseAddress + getEdmaRegOffset(port) + MV_SATA_II_SATA_CONFIG_REG_OFFSET, regVal);
	return MV_TRUE;
}

MV_BOOL mvSataPhyPowerOn(MV_U8 port)
{
	MV_U32 adapterIoBaseAddress = MV_SATA_REGS_OFFSET - 0x20000;

	MV_U32 regVal = MV_REG_READ(adapterIoBaseAddress + getEdmaRegOffset(port) + MV_SATA_II_SATA_CONFIG_REG_OFFSET);
	/* Fix for 88SX60x1 FEr SATA#8 */
	/* according to the spec, bits [31:12] must be set to 0x009B1 */
	regVal &= 0x00000FFF;
	/* regVal |= MV_BIT12; */
	regVal |= 0x009B1000;

	regVal &= ~(BIT9);
	MV_REG_WRITE(adapterIoBaseAddress + getEdmaRegOffset(port) + MV_SATA_II_SATA_CONFIG_REG_OFFSET, regVal);
	return MV_TRUE;
}