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#ifndef __INCETHPHYH
#define __INCETHPHYH

#ifdef __cplusplus
extern "C" {
#endif

#include "ctrlEnv/mvCtrlEnvSpec.h"
#include "mvSysEthPhyConfig.h"
#define MV_PHY_88F6601_INTERNAL 0x0
#define MV_PHY_88E3061  0x1      /* E3061, E3081 */
#define MV_PHY_88E104X  0x2      /* E1040, E1041, E1042 */
#define MV_PHY_88E10X0  0x4      /* E1000, E1010, E1020 */
#define MV_PHY_88E10X0S 0x5      /* E1000S, E1010S, E1020S */
#define MV_PHY_88E1011  0x6      /* E1011, E1011S */
#define MV_PHY_88E3082  0x8
#define MV_PHY_88E1112  0x9
#define MV_PHY_88E1149  0xA
#define MV_PHY_88E1121  0xB
#define MV_PHY_88E1111  0xC      /* E1111, E1115 */
#define MV_PHY_88E114X  0xD
#define MV_PHY_88E1181  0xE
#define MV_PHY_88E1340S 0x1C    /* 88E1340S */
#define MV_PHY_88E1512  0x1D
#define MV_PHY_88E1340  0x1E    /* 88E1340/x0a */
#define MV_PHY_88E154X  0x2B     /* 88E1545M */
#define MV_PHY_88E154X_Z1 0x2A   /* 88E1545M-Z1 */
#define MV_PHY_88E1340M 0x1F    /* 88E1340M/x0a */
#define MV_PHY_88E1116R 0x24
#define MV_PHY_88E1116  0x21     /* E1116, E1116R */
#define MV_PHY_88E3016_88E3019  0x22     /* E3015, E3016, E3018, 88E3019 */
#define MV_PHY_88E1240  0x23
#define MV_PHY_88E1149R 0x25
#define MV_PHY_88E1119R 0x28    /* 88E1119R */
#define MV_PHY_88E1310  0x29    /* 88E1310 */
#define MV_PHY_KW2_INTERNAL_GE  0x2b
#define MV_PHY_KW2_INTERNAL_3FE 0x26

#define MV_IS_MARVELL_OUI(_reg2, _reg3)		\
	(((_reg2) == 0x0141) && (((_reg3)&0xFC00) == 0x0C00))

typedef struct {
	MV_U8		ctrlRevId;
	MV_U32		phyAddr[MV_ETH_MAX_PORTS];
	MV_U32		quadPhyStartAddr;
	MV_BOOL		boardSpecInit;		/* Special board phy init */
	MV_U32		specRegOff;		/* Board specific register offset, Valid if boardSpecInit == TRUE */
	MV_U32		specData;  		/* Board specific data to write, Valid if boardSpecInit == TRUE */
	MV_U32		ethPhySmiReg;		/* Ethernet unit PHY SMI register offset */
	/* Below functions are needed for initializing Quad PHYs through an
	** external switch SMI bus.
	** These are optional parameters.
	*/
	MV_STATUS	(*mvExtPhyWriteFunc)(MV_U32 phyAddr, MV_U32 regAddr, MV_U16 val);
	MV_STATUS	(*mvExtPhyReadFunc)(MV_U32 phyAddr, MV_U32 regAddr, MV_U16 *data);
} MV_ETHPHY_HAL_DATA;

MV_STATUS 	mvEthPhyHalInit(MV_ETHPHY_HAL_DATA *halData);
MV_STATUS	mvEthPhyInit(MV_U32 ethPortNum, MV_BOOL eeeEnable);
MV_STATUS	mvEthPhyRegRead(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 *data);
MV_STATUS 	mvEthPhyRegWrite(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 data);
MV_STATUS 	mvEthPhyReset(MV_U32 phyAddr, int timeout);
MV_STATUS 	mvEthPhyRestartAN(MV_U32 phyAddr, int timeout);
MV_STATUS 	mvEthPhyDisableAN(MV_U32 phyAddr, int speed, int duplex);
MV_STATUS   	mvEthPhyLoopback(MV_U32 phyAddr, MV_BOOL isEnable);
MV_BOOL     	mvEthPhyCheckLink(MV_U32 phyAddr);
MV_STATUS	mvEthPhyPrintStatus(MV_U32 phyAddr);
MV_STATUS	mvEthPhyAdvertiseSet(MV_U32 phyAddr, MV_U16 advertise);
MV_STATUS	mvEthPhyAdvertiseGet(MV_U32 phyAddr, MV_U16 *advertise);

MV_VOID		mvEthE1111PhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEthE1112PhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEthE1112PhyPowerDown(MV_U32 phyAddr);
MV_VOID		mvEthE1112PhyPowerUp(MV_U32 phyAddr);
MV_VOID		mvEthE1116PhyPower(MV_U32 phyAddr, MV_BOOL enable);
MV_VOID		mvEthE1116PhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEthE3016PhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEthE1011PhyBasicInit(MV_U32 phyAddr);
MV_VOID 	mvEthSgmiiToCopperPhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEth1145PhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEth1121PhyBasicInit(MV_U32 phyAddr);
MV_VOID		mvEthInternalGEPhyBasicInit(MV_U32 phyAddr, MV_BOOL eeeEnable);
MV_VOID		mvEth1540PhyBasicInit(MV_BOOL eeeEnable);
MV_VOID		mvEth1340PhyBasicInit(void);
MV_VOID		mvEth131xPhyBasicInit(MV_U32 phyAddr);
MV_VOID 	mvEthE1512PhyBasicInit(MV_U32 ethPortNum, MV_BOOL eeeEnable);
/* MV_VOID		mvEthInternal3FEPhyBasicInit(MV_U32 port); */

#ifdef __cplusplus
}
#endif

#endif /* #ifndef __INCETHPHYH */