fix: sata: use proper alignment for SATA window base address
SATA windows Base Address Corresponds to transaction address[47:20],
So base address alignment is granulated with 1MB (same for window size),
and then shifted by 4 bits (Base address represented by bits [31:4)
Fixed SATA detection issue with dual DDR CS:
- added proper alignment for base address:
1. use same granularity for window size (1MB)
2. use proper bit offsetting [31:4]
(now base address is shifted right by 20bits, then left by 4bits)
- disabled IOCC bit, which was used as a temporary WA.
** JIRA SYSTEMSW1620 **
Change-Id: I41f5cdd5ffc3207f2333f59ce0c09425ce7b3f64
Signed-off-by: Omri Itach <omrii@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/18696
Tested-by: Star_Automation <star@marvell.com>
1 file changed
