DDR: Update the HWS version to DDR3 Training Sequence - Ver TIP-1.44

Change-Id: Ib1bd36ed993a8761b1e5230c10d9932de4da3cd9
Signed-off-by: Yaron David <yarond@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/23899
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Haim Boot <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24168
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h
index 787db9e..98e675d 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h
@@ -54,7 +54,7 @@
 #ifdef CONFIG_DDR4
 #define DDR3_TIP_VERSION_STRING "DDR4 Training Sequence - Ver TIP-0.20."
 #else
-#define DDR3_TIP_VERSION_STRING "DDR3 Training Sequence - Ver TIP-1.43."
+#define DDR3_TIP_VERSION_STRING "DDR3 Training Sequence - Ver TIP-1.44."
 #endif
 
 #define MAX_CS_NUM         (4)