| commit | cfe4639639c8c5da741ed68dd1aacedebaf05092 | [log] [tgz] |
|---|---|---|
| author | Margarita Granov <margra@marvell.com> | Thu Sep 24 13:07:08 2015 +0200 |
| committer | Greg Poist <poist@google.com> | Thu Mar 24 11:59:54 2016 -0700 |
| tree | 0030bb311b612a0d5cafdfa656f9a9f0723939ea | |
| parent | 2428b6022da55506b1f4756332968ea12d851f28 [diff] |
ddr3libv2: bobk: Integration of Caelum DDR training to CPSS -Define Caelum topology -Define HW DDR IF mask for Caelum and Cetus -Define number of busses per interface for MSYS and TM Change-Id: I06032166841de705bdef0f2ced25cb7a0550ba3d Signed-off-by: Margarita Granov <margra@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/23756 Tested-by: Star_Automation <star@marvell.com> Reviewed-by: Haim Boot <hayim@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/24167 Reviewed-by: Omri Itach <omrii@marvell.com> Tested-by: Omri Itach <omrii@marvell.com>