| /* |
| * (C) Copyright 2007-2008 |
| * Stelian Pop <stelian@popies.net> |
| * Lead Tech Design <www.leadtechdesign.com> |
| * |
| * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). |
| * |
| * See file CREDITS for list of people who contributed to this |
| * project. |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| */ |
| |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| #include <asm/hardware.h> |
| |
| #define CONFIG_AT91_LEGACY |
| #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
| |
| /* ARM asynchronous clock */ |
| #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ |
| #define CONFIG_SYS_HZ 1000 |
| |
| #define CONFIG_AT91SAM9M10G45EK |
| #define CONFIG_AT91FAMILY |
| |
| #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| #define CONFIG_SETUP_MEMORY_TAGS |
| #define CONFIG_INITRD_TAG |
| #define CONFIG_SKIP_LOWLEVEL_INIT |
| #define CONFIG_BOARD_EARLY_INIT_F |
| #define CONFIG_DISPLAY_CPUINFO |
| |
| #define CONFIG_OF_LIBFDT |
| |
| /* general purpose I/O */ |
| #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
| #define CONFIG_AT91_GPIO |
| #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ |
| |
| /* serial console */ |
| #define CONFIG_ATMEL_USART |
| #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| #define CONFIG_USART_ID ATMEL_ID_SYS |
| |
| /* LCD */ |
| #define CONFIG_LCD |
| #define LCD_BPP LCD_COLOR8 |
| #define CONFIG_LCD_LOGO |
| #undef LCD_TEST_PATTERN |
| #define CONFIG_LCD_INFO |
| #define CONFIG_LCD_INFO_BELOW_LOGO |
| #define CONFIG_SYS_WHITE_ON_BLACK |
| #define CONFIG_ATMEL_LCD |
| #define CONFIG_ATMEL_LCD_RGB565 |
| #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
| /* board specific(not enough SRAM) */ |
| #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 |
| |
| /* LED */ |
| #define CONFIG_AT91_LED |
| #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ |
| #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ |
| |
| #define CONFIG_BOOTDELAY 3 |
| |
| /* |
| * BOOTP options |
| */ |
| #define CONFIG_BOOTP_BOOTFILESIZE |
| #define CONFIG_BOOTP_BOOTPATH |
| #define CONFIG_BOOTP_GATEWAY |
| #define CONFIG_BOOTP_HOSTNAME |
| |
| /* |
| * Command line configuration. |
| */ |
| #include <config_cmd_default.h> |
| #undef CONFIG_CMD_BDI |
| #undef CONFIG_CMD_FPGA |
| #undef CONFIG_CMD_IMI |
| #undef CONFIG_CMD_IMLS |
| #undef CONFIG_CMD_LOADS |
| |
| #define CONFIG_CMD_PING |
| #define CONFIG_CMD_DHCP |
| #define CONFIG_CMD_NAND |
| #define CONFIG_CMD_USB |
| |
| /* SDRAM */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 |
| #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
| |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) |
| |
| /* No NOR flash */ |
| #define CONFIG_SYS_NO_FLASH |
| |
| /* NAND flash */ |
| #ifdef CONFIG_CMD_NAND |
| #define CONFIG_NAND_ATMEL |
| #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| #define CONFIG_SYS_NAND_DBW_8 |
| /* our ALE is AD21 */ |
| #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| /* our CLE is AD22 */ |
| #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 |
| |
| #endif |
| |
| /* Ethernet */ |
| #define CONFIG_MACB |
| #define CONFIG_RMII |
| #define CONFIG_NET_RETRY_COUNT 20 |
| #define CONFIG_RESET_PHY_R |
| |
| /* USB */ |
| #define CONFIG_USB_EHCI |
| #define CONFIG_USB_EHCI_ATMEL |
| #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 |
| #define CONFIG_DOS_PARTITION |
| #define CONFIG_USB_STORAGE |
| |
| #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| |
| #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
| |
| /* bootstrap + u-boot + env in nandflash */ |
| #define CONFIG_ENV_IS_IN_NAND |
| #define CONFIG_ENV_OFFSET 0x60000 |
| #define CONFIG_ENV_OFFSET_REDUND 0x80000 |
| #define CONFIG_ENV_SIZE 0x20000 |
| |
| #define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \ |
| "bootm 0x70000000" |
| #define CONFIG_BOOTARGS \ |
| "console=ttyS0,115200 earlyprintk " \ |
| "root=/dev/mtdblock5 " \ |
| "mtdparts=atmel_nand:128k(bootstrap)ro," \ |
| "256k(uboot)ro,128k(env1)ro,128k(env2)ro," \ |
| "2M@1M(linux),-(root) " \ |
| "rw rootfstype=jffs2" |
| |
| #define CONFIG_BAUDRATE 115200 |
| |
| #define CONFIG_SYS_PROMPT "U-Boot> " |
| #define CONFIG_SYS_CBSIZE 256 |
| #define CONFIG_SYS_MAXARGS 16 |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| #define CONFIG_SYS_LONGHELP |
| #define CONFIG_CMDLINE_EDITING |
| #define CONFIG_AUTO_COMPLETE |
| #define CONFIG_SYS_HUSH_PARSER |
| |
| /* |
| * Size of malloc() pool |
| */ |
| #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
| |
| #endif |
