a375: sample at reset: added new S@R field for DDR Bus width (16/32Bit)
Added a new S@R field for DDR Bus width (S@R I2C = 0x4c, reg = 1, bit = 0)
- This field is not sampled at reset to any internal register
- mvCtrlSatRInit routine reads this fields directly from I2C
( seperately from other S@R values from E8200/4 registers)
- Added support for mvCtrlSatRWrite to access the 2nd I2C S@R register
Change-Id: I6144733d7a25a0df2d71d14ffefd8b554472c326
Signed-off-by: Omri Itach <omrii@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/5778
Tested-by: Star_Automation <star@marvell.com>
3 files changed
