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/* includes */
#include "mv_os.h"
#include "config_marvell.h"  	/* Required to identify SOC and Board */
#include "mvUart.h"
#include "util.h"
#include "generalInit.h"

#include "mvSysEnvLib.h"

/* mvUartConfig() prepares UART configuration (MPP's and UART interface selection) */
static inline MV_VOID mvUartConfig()
{
	/*TBD */
}

MV_STATUS mvGeneralInit(void)
{
#ifndef CONFIG_ALP_A375_ZX_REV
/* * Peripheral Clock WA - for A375/ALP A0
 * The bug is related to the Peripheral clock of the CPU.
 * This clock generated from divide of the CPU clock.(Configurable divider)

 * At A0 it close to 200MHz due to Timing issue.  (divide by 4 Default value).
 * There is a functional bug in this mode at the GIC <> CPU interface.
 * We want to change it to divide by 2 (400 MHz).
 */
	MV_U32 regData = MV_REG_READ(SOC_PERI_CLK_CTRL);
	regData &= (~SOC_PERIL_CLK_CTRL_CLK_DIV_MASK);
	regData &= (~SOC_PERIL_CLK_CTRL_CLK_SMP_MASK);
	MV_REG_WRITE(SOC_PERI_CLK_CTRL, regData);
#endif /* CONFIG_ALP_A375_ZX_REV */

#if !defined(MV_NO_PRINT)
	mvUartConfig();
	mvUartInit();
	DEBUG_INIT_S("\n\nGeneral initialization - Version: " GENERAL_VERION "\n");
#endif

	return MV_OK;
}