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#include "ctrlEnv/mvCtrlEnvLib.h"
#include "ctrlEnv/sys/mvCpuIf.h"
#include "cpu/mvCpu.h"
#include "boardEnv/mvBoardEnvLib.h"
#include "ctrlEnv/mvUnitMap.h"

static MV_BOOL mv_rsrc_limited = MV_FALSE;
static MV_RES_MAP mv_res_table[] = {
	/* Dividable units */
	{0, "uart0"},
	{0, "uart1"},
	{0, "pex0"},
	{0, "pex1"},
	{0, "pex2"},
	{0, "pex3"},
	{0, "eth0"},
	{0, "eth1"},
	{0, "eth2"},
	{0, "eth3"},
	{0, "xor0"},
	{0, "xor1"},
	{0, "usb0"},
	{0, "usb1"},
	{0, "usb2"},
	{0, "i2c0"},
	{0, "i2c1"},
	/* Single Allocation units */
	{0, "sata"},
	{0, "cesa"},
	{0, "nor"},
	{0, "nand"},
	{0, "spi"},
	{0, "tdm"},
	{0, "sdio"},
	{0, "lcd"},
	{0, "hwmon"},
	{0, "rtc"},
	{0, "gpio"},
	{0, "mstr"},
	{-1, "last"}
};

MV_BOOL mvUnitMapIsRsrcLimited(void)
{
	return mv_rsrc_limited;
}

MV_VOID mvUnitMapSetRsrcLimited(MV_BOOL isLimited)
{
	mv_rsrc_limited = isLimited;
}

MV_BOOL mvUnitMapIsMine(MV_SOC_UNIT unitIdx)
{
	return mv_res_table[unitIdx].isMine;
}

MV_BOOL mvUnitMapIsPexMine(int pciIf)
{
	MV_SOC_UNIT unitIdx;

	/* Map line Number to PEX unit number */
	/* This is compatible to mvCtrlSerdesPhyConfig in BoardEnvLib.c */
	if(pciIf < PEX1_0x4)
		unitIdx = PEX0;
	else if(pciIf < PEX2_0x4)
		unitIdx = PEX1;
	else if(pciIf < PEX3_0x4)
		unitIdx = PEX2;
	else
		unitIdx = PEX3;

	return mv_res_table[unitIdx].isMine;
}

MV_VOID mvUnitMapSetMine(MV_SOC_UNIT unitIdx)
{
	if (MV_TRUE == mv_res_table[unitIdx].isMine)
		return;

	mv_res_table[unitIdx].isMine = 1;
}

MV_BOOL mvUnitMapSetup(char* cmdLine, STRSTR_FUNCPTR strstr_func)
{
	int unitIdx;
	char* match;

	for (unitIdx = 0; mv_res_table[unitIdx].isMine != (-1); unitIdx++) {
		char *unitName = mv_res_table[unitIdx].unitName;
		int len;
		match = strstr_func(cmdLine, unitName);
		if (!match) continue;
		/*Look for start delimiter*/
		if (match > cmdLine) {
			if (match[-1] != ' ' && match[-1] != ':') {
				continue;
			}
		}
		/* Calc string length without using strlen() */
		while (*unitName++ != '\0');
		len = unitName - mv_res_table[unitIdx].unitName - 1;
		/*Look for end delimiter*/
		if (match[len] != ' ' && match[len] != ':' && match[len] != '\0') {
			continue;
		}
		mvUnitMapSetMine(unitIdx);
	}
	return MV_TRUE;
}

MV_U32 mvSocUnitMapFillFlagFormTable(void)
{
	int i;
	MV_U32 flag = 0;
	for (i = 0; mv_res_table[i].cpuId != -1; i++)
	{
	    if (mvSocUnitMapGet(i) == 0)//SLAVE_CPU)
	    {
		switch (i)
		{
		case UART0:  flag |= UART0_T0_CPU1;   	break;
		case UART1:  flag |= UART1_TO_CPU1;   	break;
		case PEX00:  flag |= PEX0_TO_CPU1;    	break;
		case PEX10:  flag |= PEX1_TO_CPU1;    	break;
		case GIGA0:  flag |= GIGA0_TO_CPU1;   	break;
		case GIGA1:  flag |= GIGA1_TO_CPU1;   	break;
		case GIGA2:  flag |= GIGA2_TO_CPU1;   	break;
		case GIGA3:  flag |= GIGA3_TO_CPU1;   	break;
		case SATA:   flag |= SATA_TO_CPU1;    	break;
		case XOR:    flag |= XOR_TO_CPU1;	break;
		case IDMA:   flag |= IDMA_TO_CPU1;    	break;
		case USB0:   flag |= USB0_TO_CPU1;    	break;
		case USB1:   flag |= USB1_TO_CPU1;    	break;
		case USB2:   flag |= USB2_TO_CPU1;    	break;
		case CESA:   flag |= CESA_TO_CPU1;    	break;
		case NOR_FLASH: flag |= NOR_TO_CPU1;   break;
		case NAND_FLASH: flag |= NAND_TO_CPU1;   break;
		case SPI_FLASH: flag |= SPI_TO_CPU1;   break;
		case TDM: flag |= TDM_TO_CPU1;   break;
		default:
			break;
		}
	    }
	}

	return flag;
}*/
MV_VOID mvUnitMapSetAllMine()
{
	int unitIdx;
	for (unitIdx = 0; mv_res_table[unitIdx].isMine != (-1); unitIdx++) {
		mvUnitMapSetMine(unitIdx);
	}
}

MV_VOID mvUnitMapPrint()
{
	int unitIdx;
	mvOsPrintf("  AMP: Resources ");
	for (unitIdx = 0; mv_res_table[unitIdx].isMine != -1; unitIdx++) {
		if (mv_res_table[unitIdx].isMine) {
			mvOsPrintf("- %s ", mv_res_table[unitIdx].unitName);
		}
	}
	mvOsPrintf("\n");
}