fix: sdio: a38x,a39x: Enable SDIO Clk PUP Enable and Sdio Clk jtag cell oe smp en

	Enable 'Sdio Clk PUP Enable' and 'Sdio Clk jtag cell oe smp en' in
	PUP_Enable register, this is the default value of these fields,
	and was disabled by BootROM

Change-Id: Ib44a2968f6630735edd4660f9243ae755d077180
Signed-off-by: Bassel Saba <basselsa@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24521
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
diff --git a/board/mv_ebu/a38x/armada_38x_family/ctrlEnv/mvCtrlEnvLib.c b/board/mv_ebu/a38x/armada_38x_family/ctrlEnv/mvCtrlEnvLib.c
index ed750d9..ddfaac4 100644
--- a/board/mv_ebu/a38x/armada_38x_family/ctrlEnv/mvCtrlEnvLib.c
+++ b/board/mv_ebu/a38x/armada_38x_family/ctrlEnv/mvCtrlEnvLib.c
@@ -683,9 +683,14 @@
 	/*SDIO PUP Enable (BIT6) */
 	MV_REG_BIT_SET(PUP_EN_REG, BIT6);
 
+	/*SDIO Clk PUP Enable (BIT7) */
+	MV_REG_BIT_SET(PUP_EN_REG, BIT7);
+
 	/* Sdio_jtag_cell_oe_smp_en */
 	MV_REG_BIT_SET(PUP_EN_REG, BIT14);
 
+	/* Sdio Clk jtag cell oe smp en */
+	MV_REG_BIT_SET(PUP_EN_REG, BIT15);
 
 	/* XXX: Following setting should be configured by u-boot */
 	MV_REG_BIT_SET(SOC_DEV_MUX_REG, BIT0); /* Configure NAND flush enabled */