)]}' { "commit": "a3bfddc663cfe472211662852ba262ea27a8c2b8", "tree": "26e3fcae4af3648c30385e57e41afa467c4d2f7c", "parents": [ "8f29cd157652aca9ae083c7505b9df96b00b2a96" ], "author": { "name": "Margarita Granov", "email": "margra@marvell.com", "time": "Wed Sep 02 10:41:13 2015 +0300" }, "committer": { "name": "Greg Poist", "email": "poist@google.com", "time": "Thu Mar 24 11:59:54 2016 -0700" }, "message": "fix: ddr3libv2: bobk: Fix CPSS compilation warnings for TM functionality.\n\nChange-Id: I7931c499d19207bd18c0dc0060a79178a76a985b\nSigned-off-by: Margarita Granov \u003cmargra@marvell.com\u003e\nReviewed-on: http://vgitil04.il.marvell.com:8080/23368\nReviewed-by: Haim Boot \u003chayim@marvell.com\u003e\nTested-by: Haim Boot \u003chayim@marvell.com\u003e\nReviewed-on: http://vgitil04.il.marvell.com:8080/24159\nReviewed-by: Omri Itach \u003comrii@marvell.com\u003e\nTested-by: Omri Itach \u003comrii@marvell.com\u003e\n", "tree_diff": [ { "type": "modify", "old_id": "81287dff94396e77e5c54a492af1d821b860baae", "old_mode": 33261, "old_path": "tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c", "new_id": "2e035f3aaee520b278d6bbf4c20adb4c3c101b66", "new_mode": 33261, "new_path": "tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c" } ] }