fix: spi: set SPI clock Phase and Polarity to 0 (ERRATA FE-9144572)
- Found issues when run 'sf probe' command with core clock was set to
250MHz, also when configured board to work with 3.3 Voltage
the sf probe command failed.
- This patch change SPI clock Phase(CPHA) and polarity(CPOL) to 0
- By Arch team definitions need to set CPOL = 0, CPHA = 0 to solve the
issues.
- ERRATA FE-9144572
Change-Id: I693b5c01211ac3cb1a69ecf7dc63472760ff3f58
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/19391
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Shadi Ammouri <shadi@marvell.com>
(cherry picked from commit 60b23f87b7714df95642fb079ebb82ad4b3f3e82)
Reviewed-on: http://vgitil04.il.marvell.com:8080/19482
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
1 file changed
