diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingLeveling.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingLeveling.c
index 41756c5..3bfca59 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingLeveling.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingLeveling.c
@@ -749,7 +749,7 @@
     {
         VALIDATE_IF_ACTIVE(topologyMap->interfaceActiveMask, interfaceId)
 
-        trainingResult[trainingStage][interfaceId] = TEST_SUCCESS;
+		trainingResult[trainingStage][interfaceId] = TEST_SUCCESS;
 
         /* save Read Data Sample Delay */
         CHECK_STATUS(mvHwsDdr3TipIFRead(devNum, ACCESS_TYPE_UNICAST, interfaceId, READ_DATA_SAMPLE_DELAY, readDataSampleDelayVals, MASK_ALL_BITS));
@@ -840,7 +840,7 @@
 				CHECK_STATUS(mvHwsDdr3TipIFRead(devNum, ACCESS_TYPE_UNICAST, interfaceId, ODPG_TRAINING_TRIGGER_REG, dataRead, (1 << 2)));
 				if (dataRead[interfaceId] != 0)
 				{
-					DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("WL: WL failed IF %d regData=0x%x\n",interfaceId,dataRead[interfaceId]));
+					DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("WL 1: WL failed IF %d regData=0x%x\n",interfaceId,dataRead[interfaceId]));
 				}
 			}
 		}
@@ -859,7 +859,7 @@
 				regData = dataRead[interfaceId];
 				if (regData != 0)
 				{
-					DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("WL: WL failed IF %d regData=0x%x\n",interfaceId,regData));
+					DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("WL 2:  WL failed IF %d regData=0x%x\n",interfaceId,regData));
 				}
 
 				/* check for training completion per bus */