commit 849982a4f72ee2a8be67a20af29c3d7d90cdc9e7
author Margarita Granov <margra@marvell.com> Thu Sep 24 17:25:18 2015 +0200
committer Greg Poist <poist@google.com> Thu Mar 24 11:59:54 2016 -0700
tree e2fcc163d9c75a026e24405d95773a8e4284223e
parent 8b936039638c3becbf1fa2f4c61347ddfbaf372e

fix:ddr3libv2: Fix ddr3TipRev2RankControl function.

	CSx_Mirror bits in RANK Control Register has to be set
	in accordance to mirrorEnableBitmask bits.

Change-Id: I8d1e6392bf7bb40c19d3536893ac132708c99388
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/23766
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Haim Boot <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24166
Reviewed-by: Omri Itach <omrii@marvell.com>

tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c

diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
index 5eb50e3..b31afae 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
@@ -821,23 +821,23 @@
     {
    		VALIDATE_BUS_ACTIVE(topologyMap->activeBusMask, busCnt)
         dataValue |= topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].csBitmask;
-      
+
         if (topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].mirrorEnableBitmask == GT_TRUE)
-        { 
-        /* checking cs mask is same as cs_bitmask - if CS is enabled than  CS+4 bit in word shall be '1' */
-            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].csBitmask & 0x1) != 0)
+        {
+        /* checking mirrorEnableBitmask - if mirrorEnableBitmask is enabled - CS+4 bit in word shall be '1' */
+            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].mirrorEnableBitmask & 0x1) != 0)
             {
                 dataValue |= (1 << 4);
             }
-            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].csBitmask & 0x2) != 0)
+            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].mirrorEnableBitmask & 0x2) != 0)
             {
                 dataValue |= (1 << 5);
             }
-            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].csBitmask & 0x4) != 0)
+            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].mirrorEnableBitmask & 0x4) != 0)
             {
                 dataValue |= (1 << 6);
             }
-            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].csBitmask & 0x8) != 0)
+            if ((topologyMap->interfaceParams[interfaceId].asBusParams[busCnt].mirrorEnableBitmask & 0x8) != 0)
             {
                 dataValue |= (1 << 7);
             }
@@ -845,7 +845,7 @@
     }
 
     CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum, ACCESS_TYPE_UNICAST, interfaceId, RANK_CTRL_REG, dataValue, 0xFF));
-     
+
     return GT_OK;
 }
 
@@ -863,7 +863,6 @@
 	}
 	dataValue |= topologyMap->interfaceParams[interfaceId].asBusParams[0].csBitmask;
 	dataValue |= topologyMap->interfaceParams[interfaceId].asBusParams[0].mirrorEnableBitmask << 4;
-
 	CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum, ACCESS_TYPE_UNICAST, interfaceId, RANK_CTRL_REG, dataValue, 0xFF));
 
     return GT_OK;