! Set watchpoint to the first access to stack area and allow BootROM to run until it.
! The memory in L2 cache should be ready when the execution terminated
SET WATCHPOINT /ACCESS=WRITE AT CORE:1(&1) HARD
RUN
DELETE WATCHPOINT /ALL

! Once the memory regison in L2 cache is ready, laod the BIN header and execute it
LOAD /SEGMENT /DEBUG /GLOBAL /INIT="" OF "./tools/marvell/bin_hdr/bin_hdr.elf"

! Break at the end of BIN header execution before jumping back top BootROM
SET VAL @progcnt = ASM(PC)
SET BREAKPOINT AT CORE:1(@progcnt + 0xC)
RUN
DELETE BREAKPOINT /ALL

! DRAM should be ready now.
! Disable MMU before loading the u-boot image.
SET SYSREGISTER /"COPROCESSOR_1" ARM_CONTROL=0xC53078

! For loading and execution of u-boot, uncomment the following lines:
!LOAD /SEGMENT /DEBUG /GLOBAL /INIT="" OF "./u-boot"
!RUN