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#ifndef _INC_MSYS_AC3_VARS_H
#define _INC_MSYS_AC3_VARS_H

#include "ddr3_msys_ac3_config.h"
#include "ddr3_msys_ac3_mc_static.h"
#include "mvDdr3TopologyDef.h"

#if !defined(CONFIG_CUSTOMER_BOARD_SUPPORT)
#define MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI
#endif

#define ECC_SUPPORT

/*Tune internal training params values*/
#define MV_TUNE_TRAINING_PARAMS_CK_DELAY 		200
#define MV_TUNE_TRAINING_PARAMS_PHYREG3VAL		0xA

#define MV_TUNE_TRAINING_PARAMS_PRI_DATA	123
#define MV_TUNE_TRAINING_PARAMS_NRI_DATA	123
#define MV_TUNE_TRAINING_PARAMS_PRI_CTRL	74
#define MV_TUNE_TRAINING_PARAMS_NRI_CTRL	74

#define MV_TUNE_TRAINING_PARAMS_P_ODT_DATA	45
#define MV_TUNE_TRAINING_PARAMS_N_ODT_DATA	45
#define MV_TUNE_TRAINING_PARAMS_P_ODT_CTRL	45
#define MV_TUNE_TRAINING_PARAMS_N_ODT_CTRL	45

#define MV_TUNE_TRAINING_PARAMS_DIC			0x2
#define MV_TUNE_TRAINING_PARAMS_ODT_CONFIG	0x120012
#define MV_TUNE_TRAINING_PARAMS_RTT_NOM		0x44

typedef struct __mvDramModes {
    char *mode_name;
    MV_U8 cpuFreq;
    MV_U8 fabFreq;
    MV_U8 chipId;
    MV_U8 chipBoardRev;
    MV_DRAM_MC_INIT *regs;
} MV_DRAM_MODES;

MV_DRAM_MODES ddr_modes[] =
{
/*	Conf name		CPUFreq	     FabFreq   Chip ID		Chip/Board		MC regs*/
#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT
	{"ac3_customer_0_800",	DDR_FREQ_800,	0,	0x0,	AC3_CUSTOMER_BOARD_ID0,	ddr3_customer_800},
	{"ac3_customer_1_800",	DDR_FREQ_800,	0,	0x0,	AC3_CUSTOMER_BOARD_ID1,	ddr3_customer_800},
#else
	{"ac3_533",		DDR_FREQ_533,	0,	0x0,		AC3_MARVELL_BOARD_ID_BASE,		ddr3_msys_ac3_533},
	{"ac3_667",		DDR_FREQ_667,	0,	0x0,		AC3_MARVELL_BOARD_ID_BASE,		ddr3_msys_ac3_667},
	{"ac3_800",		DDR_FREQ_800,	0,	0x0,		AC3_MARVELL_BOARD_ID_BASE,		ddr3_msys_ac3_800},
	{"ac3_933",		DDR_FREQ_933,	0,	0x0,		AC3_MARVELL_BOARD_ID_BASE,		ddr3_msys_ac3_933},
#endif
};

MV_DRAM_DLB_CONFIG ddr3DlbConfigTable[] =
{
	{REG_STATIC_DRAM_DLB_CONTROL, 		0x2000005C},
	{DLB_BUS_OPTIMIZATION_WEIGHTS_REG, 	0x0008C19E},
	{DLB_AGING_REGISTER, 				0x0F7F007F},
	{DLB_EVICTION_CONTROL_REG, 			0x00000209},
	{DLB_EVICTION_TIMERS_REGISTER_REG, 	0x00FF0000},
	{DLB_USER_COMMAND_REG, 				0x00000000},
	{MBUS_UNITS_PRIORITY_CONTROL_REG, 	0x55555555},
	{FABRIC_UNITS_PRIORITY_CONTROL_REG, 0xA},
	{MBUS_UNITS_PREFETCH_CONTROL_REG, 	0xffff},
	{FABRIC_UNITS_PREFETCH_CONTROL_REG, 0xf0f},
	{0x0, 0x0}
};

#endif /* _INC_MSYS_AC3_VARS_H */