ahci: Fix cache align error messages
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818
CC: Aneesh V <aneesh@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
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Aligned u-boot-2014.01
Signed-off-by: Eli Nidam <elini@marvell.com>
Change-Id: I698d225bbd3bca32f72c47db10d4ced47851543c
Reviewed-on: http://vgitil04.il.marvell.com:8080/5276
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Eli Nidam <elini@marvell.com>
1 file changed
