tree f9d1744e974418e3daacfc75c4a18c702804d55d
parent cb8a80c7669f2671b9c61357e8496f02ceb0509b
author Bassel Saba <basselsa@marvell.com> 1440657167 +0300
committer Greg Poist <poist@google.com> 1458845994 -0700

fix: rtc: fixed rtc_set according to FE-3124064 (HW ERRATA 3124064)

	According to FE-3124064:
	 - Description:
	    The device supports CPU write and read access to the RTC Time register
	    However, due to this erratum, Write to RTC TIME register may fail.
	    Read from RTC TIME register may fail.
	   Workaround:
	    Before writing to RTC TIME register, issue a dummy
	    write of 0x0 twice to RTC Status register.
	    RTC TIME register should be read twice, the second
	    read will return a proper value.
	    Configure maximum value (0x3FF) in write clock period in
	    RTC Mbus Bridge Timing Control register.
	- Fixed rtc_set according to the workaround (write 0x0 to status register
	  twice before writing to RTC time register)
	- Configure maximum value (0x3FF) in write clock period in
	  RTC Mbus Bridge Timing Control register.
	- Fixed JIRA:1909, 1955

Change-Id: I11b36dc3fc20887dfdb8b59719c5cc868b1aa6c5
Signed-off-by: Bassel Saba <basselsa@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/23309
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>