ddr3libv2: fix bus disable functionality in ddr3TipIpTraining function
Fix indexes calculation in the loop that implements
masking of disabled buses.
IS_BUS_ACTIVE macro is fixed
Change-Id: Id83e8a91f830c760bc0eca380c7d3d81cb10d08f
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22460
Reviewed-by: Haim Boot <hayim@marvell.com>
Tested-by: Haim Boot <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24143
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIpFlow.h b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIpFlow.h
index d258cfc..1ee2d93 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIpFlow.h
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIpFlow.h
@@ -84,8 +84,8 @@
#define EXT_ACCESS_BURST_LENGTH (8)
#define CHIP_ID 0
#define IS_INTERFACE_ACTIVE( _uiInterfaceMask_ , _uiInterfaceId_ ) ( _uiInterfaceMask_ & ( 1 << _uiInterfaceId_ ) )
-#define IS_BUS_ACTIVE( _uiInterfaceMask_ , _uiInterfaceId_ ) ( _uiInterfaceMask_ & ( 1 << _uiInterfaceId_ ) )
-
+#define IS_BUS_ACTIVE( _uiInterfaceMask_ , _uiInterfaceId_ ) ( (_uiInterfaceMask_ >> _uiInterfaceId_) & 1 )
+ /*Haim ( _uiInterfaceMask_ & ( 1 << _uiInterfaceId_ ) )*/
#define DDR3_IS_ECC_PUP3_MODE(_uiInterfaceMask_) ((_uiInterfaceMask_ == 0xB)?(GT_TRUE):(GT_FALSE))
#define DDR3_IS_ECC_PUP4_MODE(_uiInterfaceMask_) ((((_uiInterfaceMask_ & 0x10) == 0))?(GT_FALSE):(GT_TRUE))
#define DDR3_IS_16BIT_DRAM_MODE(_activeBusMask_) ((((_activeBusMask_ & 0x4) == 0))?(GT_TRUE):(GT_FALSE))
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingIpEngine.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingIpEngine.c
index 2423079..8bfb913 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingIpEngine.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingIpEngine.c
@@ -504,7 +504,7 @@
{
if (IS_BUS_ACTIVE(topologyMap->activeBusMask, pupId) == GT_TRUE) continue;
- for(indexCnt=(maskDqNumOfRegs-pupId*8); indexCnt<(maskDqNumOfRegs-(pupId+1)*8);indexCnt++)
+ for(indexCnt=pupId*8; indexCnt<(pupId+1)*8;indexCnt++)
{
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum, accessType, interfaceNum, maskResultsDqRegMap[indexCnt], (1<<24), 1<<24));
}
