commit 2b3a0f0f839bfd3741f071fcb5c3c3ff65fc92c0
author Margarita Granov <margra@marvell.com> Sun Aug 02 18:31:37 2015 +0300
committer Greg Poist <poist@google.com> Thu Mar 24 11:59:54 2016 -0700
tree ea269c9ec855ebab6991114b87623f52be136f7d
parent 7c728e6380cb0e1c300442f6a57b1324448f6b22

ddr3libv2: bobk: Update DQ mapping (PBS) for interface 4

Change-Id: I0125aca025cfbd4d2c41fe9af13ec465930d9f9e
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22422
Reviewed-by: Haim Boot <hayim@marvell.com>
Tested-by: Haim Boot <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24138
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>

tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c

diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
index 3d8378f..c0093d1 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
@@ -240,12 +240,41 @@
 /* Bit mapping (for PBS) */
 GT_U32 bobKDQbitMap2Phypin[] =
 {
-#warning "DQ mapping not updated!" !!!
-	/* Interface 0 */
-	8, 1, 0, 7, 9, 2, 3, 6 , /* dq[0:7]   */
-	8, 1, 6, 3, 9, 7, 2, 0 , /* dq[8:15]  */
-	8, 1, 9, 2, 6, 7, 3, 0 , /* dq[16:23] */
-	1, 6, 0, 8, 7, 3, 2, 9 , /* dq[24:31] */
+#warning "DQ mapping is updated for Interface4 only!" !!!
+	    /* Interface 0 */
+	    0,0,0,0,0,0,0,0 , /* dq[0:7]   */
+	    0,0,0,0,0,0,0,0 , /* dq[8:15]  */
+	    0,0,0,0,0,0,0,0 , /* dq[16:23] */
+	    0,0,0,0,0,0,0,0 , /* dq[24:31] */
+        0,0,0,0,0,0,0,0 , /* dq[ECC]   */
+
+	    /* Interface 1 */
+	    0,0,0,0,0,0,0,0 , /* dq[0:7]   */
+	    0,0,0,0,0,0,0,0 , /* dq[8:15]  */
+	    0,0,0,0,0,0,0,0 , /* dq[16:23] */
+	    0,0,0,0,0,0,0,0 , /* dq[24:31] */
+        0,0,0,0,0,0,0,0 , /* dq[ECC]   */
+
+	    /* Interface 2 */
+	    0,0,0,0,0,0,0,0 , /* dq[0:7]   */
+	    0,0,0,0,0,0,0,0 , /* dq[8:15]  */
+	    0,0,0,0,0,0,0,0 , /* dq[16:23] */
+	    0,0,0,0,0,0,0,0 , /* dq[24:31] */
+        0,0,0,0,0,0,0,0 , /* dq[ECC]   */
+
+	    /* Interface 3 */
+	    0,0,0,0,0,0,0,0 , /* dq[0:7]   */
+	    0,0,0,0,0,0,0,0 , /* dq[8:15]  */
+	    0,0,0,0,0,0,0,0 , /* dq[16:23] */
+	    0,0,0,0,0,0,0,0 , /* dq[24:31] */
+        0,0,0,0,0,0,0,0 , /* dq[ECC]   */
+
+        /* Interface 4 */
+	    1,9,8,3,0,7,2,6 , /* dq[0:7]   */
+	    3,2,8,1,9,6,7,0 , /* dq[8:15]  */
+	    0,6,2,1,9,3,8,7 , /* dq[16:23] */
+	    0,6,1,8,3,9,7,2 , /* dq[24:31] */
+        0,1,2,3,6,7,8,9   /* dq[ECC]   */
 };
 
 #if defined(CHX_FAMILY) || defined(EXMXPM_FAMILY)