diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
index b190ed3..dfbebb9 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
@@ -850,17 +850,18 @@
 	ddr3TipDevAttrSet(devNum, MV_ATTR_OCTET_PER_INTERFACE, numOfBusPerInterface);
 	ddr3TipDevAttrSet(devNum, MV_ATTR_INTERLEAVE_WA, GT_FALSE);
 
-    maskTuneFunc =     (SET_LOW_FREQ_MASK_BIT |
-						LOAD_PATTERN_MASK_BIT |
+   maskTuneFunc =     (/*SET_LOW_FREQ_MASK_BIT |
+						LOAD_PATTERN_MASK_BIT |*/
 						SET_MEDIUM_FREQ_MASK_BIT |
 						WRITE_LEVELING_MASK_BIT |
-						WRITE_LEVELING_SUPP_MASK_BIT |
+                        LOAD_PATTERN_2_MASK_BIT |
+						/*WRITE_LEVELING_SUPP_MASK_BIT |*/
 						READ_LEVELING_MASK_BIT |
 						PBS_RX_MASK_BIT |
 						PBS_TX_MASK_BIT |
 						SET_TARGET_FREQ_MASK_BIT |
 						WRITE_LEVELING_TF_MASK_BIT |
-						WRITE_LEVELING_SUPP_TF_MASK_BIT |
+						/*WRITE_LEVELING_SUPP_TF_MASK_BIT |*/
 						READ_LEVELING_TF_MASK_BIT |
 						CENTRALIZATION_RX_MASK_BIT |
 						CENTRALIZATION_TX_MASK_BIT