ddr3libv2: change ODT write timing configuration
this configuration change the ODT window close.
that way, the ODT window wraps the entire write transaction.
Change-Id: Iac5bf3a059098d6d1439751938d4f8d4ca346bfc
Signed-off-by: hayim <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24575
Tested-by: Star_Automation <star@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
index e8cdf70..5b80bb6 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
@@ -1892,7 +1892,7 @@
/*ODT TIMING */
dataValue = ((clValue-cwlValue+1) << 4) | ((clValue-cwlValue+6) << 8) | ((clValue-1) << 12) | ((clValue+6) << 16);
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum,accessType, interfaceId, ODT_TIMING_LOW, dataValue, 0xFFFF0));
- dataValue = 0x71 | ((cwlValue - 1) << 8) | ((cwlValue+5) << 12);
+ dataValue = 0x91 | ((cwlValue - 1) << 8) | ((cwlValue+5) << 12);
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum,accessType, interfaceId, ODT_TIMING_HI_REG, dataValue, 0xFFFF));
/* ODT Active*/
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum,accessType, interfaceId, DUNIT_ODT_CONTROL_REG, 0xF, 0xF));
@@ -1936,7 +1936,7 @@
dataValue |= (((clValue-1)>>4) << 22) | (((clValue+6)>>4) << 23);
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum,accessType, interfaceId, ODT_TIMING_LOW, dataValue, 0xFFFF0));
- dataValue = 0x71 | ((cwlValue - 1) << 8) | ((cwlValue+5) << 12);
+ dataValue = 0x91 | ((cwlValue - 1) << 8) | ((cwlValue+5) << 12);
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum,accessType, interfaceId, ODT_TIMING_HI_REG, dataValue, 0xFFFF));
if (odtAdditional == 1)
{