ddr3libv2: remove un-needed configuration for interleave writes
- all devices are configured to 'no interleave' mode.
this reduce the performance and therefore NAS banchmarks
show 10M reductions (for writes).
- this is needed for a39x only so fix was to remove this
configuration.
- for a39x it is done anyway during frequency change
Change-Id: I0ed2085573838ea85882372b520d091ad3ebd70f
Signed-off-by: hayim <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/23045
Reviewed-on: http://vgitil04.il.marvell.com:8080/24174
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
index d14ff58..befc70a 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
@@ -577,9 +577,8 @@
/* SRMode */
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum, accessType, interfaceId, SDRAM_CONFIGURATION_REG, dataValue, 0x100FFFF));
- /* Intrleave first command pre-charge enable (TBD) */
+ /* Interleave first command pre-charge enable (TBD) */
CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum, accessType, interfaceId, SDRAM_OPEN_PAGE_CONTROL_REG, (1 << 10), (1 << 10)));
- CHECK_STATUS(mvHwsDdr3TipIFWrite(devNum, accessType, interfaceId, SDRAM_OPEN_PAGE_CONTROL_REG, 0x0, 0x3C0));
/* PHY configuration*/
/* Postamble Length = 1.5cc, Addresscntl to clk skew \BD, Preamble length normal, parralal ADLL enable*/
