)]}' { "commit": "0a9d47ee444c46dd776a198a6970a6cfa7b62935", "tree": "ed4f621124d3f6cc1c366cb6c3efe8c9418620ea", "parents": [ "f1f68ece99f9fdf14afdf6ae4f6e1948bdbac05a" ], "author": { "name": "hayim", "email": "hayim@marvell.com", "time": "Sun Aug 02 15:42:41 2015 +0300" }, "committer": { "name": "Greg Poist", "email": "poist@google.com", "time": "Thu Mar 24 11:59:54 2016 -0700" }, "message": "ddr3libv2: remove device specific compilation flags - Part 1\n\n - patch \"ddr3libv2: bobk: Presilicon debug fixes\" caused TM\n algorithm to fail (i.e. BobK support failed BC2 TM algorithm)\n since it changed complication flags usage which affected CPSS build.\n - this patch (and the next ones) will add support for all devices\n under single compilation, i.e. with out the use of device\n specific compilation flags.\n - this patch removed device specific flag from main flow\n training.c file (except for frequency set functionality)\n\nChange-Id: Ied9fbf14f6c0cd107efd8b5f88d7b16e9a4637c4\nSigned-off-by: hayim \u003chayim@marvell.com\u003e\nReviewed-on: http://vgitil04.il.marvell.com:8080/22416\nTested-by: Star_New_DDR \u003cstar-new-ddr@marvell.com\u003e\nReviewed-on: http://vgitil04.il.marvell.com:8080/24140\nTested-by: Star_Automation \u003cstar@marvell.com\u003e\nReviewed-by: Omri Itach \u003comrii@marvell.com\u003e\nTested-by: Omri Itach \u003comrii@marvell.com\u003e\n", "tree_diff": [ { "type": "modify", "old_id": "d8555c32179f38fa72eb96fc7c72d126a3a11dd0", "old_mode": 33261, "old_path": "tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c", "new_id": "b32c9ca7e946a38b5eb2b2ea3989c87b2aa079b9", "new_mode": 33261, "new_path": "tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c" } ] }