fix: ddr3libv2: bobk: WA for init frequency read from SatR.

	Read is done from Device Sample at Reset Override
	(SAR1_OVERRIDE) instead of Sample at Reset (SAR1) Status
	since read from SAR1 register returns wrong value (0).

Change-Id: I99ca1e8b365db765d37abdeafec862303f5f6c24
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22426
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24139
Tested-by: Star_Automation <star@marvell.com>
1 file changed