tree fb4b1da69a0506f194339024267508084a476389
parent 7bfc7b3561094f3d826fe31b169280568e0f5233
author Terry <bjzhou@marvell.com> 1439292422 +0300
committer Greg Poist <poist@google.com> 1458845994 -0700

fix: bobk: add dynamic frequency selection for CorePll WA issue

    - The WA will take effect when HW SAR "coreclock" is set to bypass mode(7)
      in this mode, use a new field "bypass_coreclock" to select the core
      frequency in the WA.
    - Add 'bypass mode' setting in SatR field "coreclock"
    - Add SW SatR filed "bypass_coreclock" to select the frequency in
      bypass mode, which located at eeprom reg#6 bits[2:0]
    - Add more frequency support in the WA according to SAR setting

Signed-off-by: Terry <bjzhou@marvell.com>
Change-Id: I69d750781f1f04c9e2ddc2138624e8acdf3d36a3
Reviewed-on: http://vgitil04.il.marvell.com:8080/22742
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>