| /* Generated automatically by the program `genflags' |
| from the machine description file `md'. */ |
| |
| #ifndef GCC_INSN_FLAGS_H |
| #define GCC_INSN_FLAGS_H |
| |
| #define HAVE_addsi3_compare0 (TARGET_ARM) |
| #define HAVE_cmpsi2_addneg (TARGET_32BIT && INTVAL (operands[2]) == -INTVAL (operands[3])) |
| #define HAVE_thumb1_subsi3_insn (TARGET_THUMB1) |
| #define HAVE_subsi3_compare (TARGET_32BIT) |
| #define HAVE_mulhisi3 (TARGET_DSP_MULTIPLY) |
| #define HAVE_maddhisi4 (TARGET_DSP_MULTIPLY) |
| #define HAVE_maddhidi4 (TARGET_DSP_MULTIPLY) |
| #define HAVE_insv_zero (arm_arch_thumb2) |
| #define HAVE_insv_t2 (arm_arch_thumb2) |
| #define HAVE_andsi_notsi_si (TARGET_32BIT) |
| #define HAVE_thumb1_bicsi3 (TARGET_THUMB1) |
| #define HAVE_andsi_not_shiftsi_si (TARGET_ARM) |
| #define HAVE_arm_ashldi3_1bit (TARGET_32BIT) |
| #define HAVE_arm_ashrdi3_1bit (TARGET_32BIT) |
| #define HAVE_arm_lshrdi3_1bit (TARGET_32BIT) |
| #define HAVE_unaligned_loadsi (unaligned_access && TARGET_32BIT) |
| #define HAVE_unaligned_loadhis (unaligned_access && TARGET_32BIT) |
| #define HAVE_unaligned_loadhiu (unaligned_access && TARGET_32BIT) |
| #define HAVE_unaligned_storesi (unaligned_access && TARGET_32BIT) |
| #define HAVE_unaligned_storehi (unaligned_access && TARGET_32BIT) |
| #define HAVE_unaligned_loaddi (unaligned_access && TARGET_32BIT) |
| #define HAVE_unaligned_storedi (unaligned_access && TARGET_32BIT) |
| #define HAVE_extzv_t2 (arm_arch_thumb2) |
| #define HAVE_divsi3 (TARGET_IDIV) |
| #define HAVE_udivsi3 (TARGET_IDIV) |
| #define HAVE_one_cmpldi2 (TARGET_32BIT) |
| #define HAVE_zero_extendqidi2 (TARGET_32BIT ) |
| #define HAVE_zero_extendhidi2 (TARGET_32BIT && arm_arch6) |
| #define HAVE_zero_extendsidi2 (TARGET_32BIT ) |
| #define HAVE_extendqidi2 (TARGET_32BIT && arm_arch6) |
| #define HAVE_extendhidi2 (TARGET_32BIT && arm_arch6) |
| #define HAVE_extendsidi2 (TARGET_32BIT ) |
| #define HAVE_thumb1_extendhisi2 (TARGET_THUMB1) |
| #define HAVE_thumb1_extendqisi2 (TARGET_THUMB1) |
| #define HAVE_pic_load_addr_unified (flag_pic) |
| #define HAVE_pic_load_addr_32bit (TARGET_32BIT && flag_pic) |
| #define HAVE_pic_load_addr_thumb1 (TARGET_THUMB1 && flag_pic) |
| #define HAVE_pic_add_dot_plus_four (TARGET_THUMB) |
| #define HAVE_pic_add_dot_plus_eight (TARGET_ARM) |
| #define HAVE_tls_load_dot_plus_eight (TARGET_ARM) |
| #define HAVE_movmem12b (TARGET_THUMB1) |
| #define HAVE_movmem8b (TARGET_THUMB1) |
| #define HAVE_cbranchsi4_insn (TARGET_THUMB1) |
| #define HAVE_cbranchsi4_scratch (TARGET_THUMB1) |
| #define HAVE_arm_cond_branch (TARGET_32BIT) |
| #define HAVE_cstoresi_nltu_thumb1 (TARGET_THUMB1) |
| #define HAVE_cstoresi_ltu_thumb1 (TARGET_THUMB1) |
| #define HAVE_thumb1_addsi3_addgeu (TARGET_THUMB1) |
| #define HAVE_blockage 1 |
| #define HAVE_arm_casesi_internal (TARGET_ARM) |
| #define HAVE_thumb1_casesi_dispatch (TARGET_THUMB1) |
| #define HAVE_nop 1 |
| #define HAVE_trap 1 |
| #define HAVE_movcond_addsi (TARGET_32BIT) |
| #define HAVE_movcond (TARGET_ARM) |
| #define HAVE_prologue_thumb1_interwork (TARGET_THUMB1) |
| #define HAVE_stack_tie 1 |
| #define HAVE_align_4 1 |
| #define HAVE_align_8 1 |
| #define HAVE_consttable_end 1 |
| #define HAVE_consttable_1 (TARGET_THUMB1) |
| #define HAVE_consttable_2 (TARGET_THUMB1) |
| #define HAVE_consttable_4 1 |
| #define HAVE_consttable_8 1 |
| #define HAVE_consttable_16 1 |
| #define HAVE_clzsi2 (TARGET_32BIT && arm_arch5) |
| #define HAVE_rbitsi2 (TARGET_32BIT && arm_arch_thumb2) |
| #define HAVE_prefetch (TARGET_32BIT && arm_arch5e) |
| #define HAVE_force_register_use 1 |
| #define HAVE_arm_eh_return (TARGET_ARM) |
| #define HAVE_thumb_eh_return (TARGET_THUMB1) |
| #define HAVE_load_tp_hard (TARGET_HARD_TP) |
| #define HAVE_load_tp_soft (TARGET_SOFT_TP) |
| #define HAVE_tlscall (TARGET_GNU2_TLS) |
| #define HAVE_crc32b (TARGET_CRC32) |
| #define HAVE_crc32h (TARGET_CRC32) |
| #define HAVE_crc32w (TARGET_CRC32) |
| #define HAVE_crc32cb (TARGET_CRC32) |
| #define HAVE_crc32ch (TARGET_CRC32) |
| #define HAVE_crc32cw (TARGET_CRC32) |
| #define HAVE_tbcstv8qi (TARGET_REALLY_IWMMXT) |
| #define HAVE_tbcstv4hi (TARGET_REALLY_IWMMXT) |
| #define HAVE_tbcstv2si (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_iordi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_xordi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_anddi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_nanddi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_movv2si_internal (TARGET_REALLY_IWMMXT) |
| #define HAVE_movv4hi_internal (TARGET_REALLY_IWMMXT) |
| #define HAVE_movv8qi_internal (TARGET_REALLY_IWMMXT) |
| #define HAVE_ssaddv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_ssaddv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_ssaddv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_usaddv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_usaddv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_usaddv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_sssubv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_sssubv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_sssubv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_ussubv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_ussubv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_ussubv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_smulv4hi3_highpart (TARGET_REALLY_IWMMXT) |
| #define HAVE_umulv4hi3_highpart (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmacs (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmacsz (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmacu (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmacuz (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_clrdi (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_clrv8qi (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_clrv4hi (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_clrv2si (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_uavgrndv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_uavgrndv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_uavgv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_uavgv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tinsrb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tinsrh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tinsrw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrmub (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrmsb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrmuh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrmsh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrmw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wshufh (TARGET_REALLY_IWMMXT) |
| #define HAVE_eqv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_eqv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_eqv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_gtuv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_gtuv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_gtuv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_gtv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_gtv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_gtv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wpackhss (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wpackwss (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wpackdss (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wpackhus (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wpackwus (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wpackdus (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckihb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckihh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckihw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckilb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckilh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckilw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckehub (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckehuh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckehuw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckehsb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckehsh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckehsw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckelub (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckeluh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckeluw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckelsb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckelsh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wunpckelsw (TARGET_REALLY_IWMMXT) |
| #define HAVE_rorv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_rorv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_rordi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashrv4hi3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashrv2si3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashrdi3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_lshrv4hi3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_lshrv2si3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_lshrdi3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashlv4hi3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashlv2si3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashldi3_iwmmxt (TARGET_REALLY_IWMMXT) |
| #define HAVE_rorv4hi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_rorv2si3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_rordi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashrv4hi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashrv2si3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashrdi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_lshrv4hi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_lshrv2si3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_lshrdi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashlv4hi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashlv2si3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_ashldi3_di (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmadds (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmaddu (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmia (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmiaph (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmiabb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmiatb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmiabt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmiatt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmovmskb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmovmskh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tmovmskw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_waccb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wacch (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_waccw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_waligni (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_walignr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_walignr0 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_walignr1 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_walignr2 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_walignr3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wsadb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wsadh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wsadbz (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wsadhz (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wabsv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wabsv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wabsv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wabsdiffb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wabsdiffh (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wabsdiffw (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_waddsubhx (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wsubaddhx (TARGET_REALLY_IWMMXT) |
| #define HAVE_addcv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_addcv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_avg4 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_avg4r (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmaddsx (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmaddux (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmaddsn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmaddun (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulwsm (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulwum (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulsmr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulumr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulwsmr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulwumr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmulwl (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmulm (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmulwm (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmulmr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmulwmr (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_waddbhusm (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_waddbhusl (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiabb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiabt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiatb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiatt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiabbn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiabtn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiatbn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wqmiattn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiabb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiabt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiatb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiatt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiabbn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiabtn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiatbn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiattn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawbb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawbt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawtb (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawtt (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawbbn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawbtn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawtbn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmiawttn (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_wmerge (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tandcv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tandcv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_tandcv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_torcv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_torcv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_torcv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_torvscv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_torvscv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_torvscv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrcv2si3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrcv4hi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_textrcv8qi3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_fmasf4 ((TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA) && (TARGET_VFP)) |
| #define HAVE_fmadf4 ((TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_extendhfsf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16) |
| #define HAVE_truncsfhf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16) |
| #define HAVE_fixuns_truncsfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP) |
| #define HAVE_fixuns_truncdfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE) |
| #define HAVE_floatunssisf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP) |
| #define HAVE_floatunssidf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE) |
| #define HAVE_btruncsf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_ceilsf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_floorsf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_nearbyintsf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_rintsf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_roundsf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_btruncdf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_ceildf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_floordf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_nearbyintdf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_rintdf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_rounddf2 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_smaxsf3 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_smaxdf3 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_sminsf3 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 ) && (TARGET_VFP)) |
| #define HAVE_smindf3 ((TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && TARGET_VFP_DOUBLE) && (TARGET_VFP_DOUBLE)) |
| #define HAVE_tls_load_dot_plus_four (TARGET_THUMB2) |
| #define HAVE_thumb2_zero_extendqisi2_v6 (TARGET_THUMB2 && arm_arch6) |
| #define HAVE_thumb2_casesi_internal (TARGET_THUMB2 && !flag_pic) |
| #define HAVE_thumb2_casesi_internal_pic (TARGET_THUMB2 && flag_pic) |
| #define HAVE_thumb2_eh_return (TARGET_THUMB2) |
| #define HAVE_thumb2_addsi3_compare0 (TARGET_THUMB2) |
| #define HAVE_vec_setv8qi_internal (TARGET_NEON) |
| #define HAVE_vec_setv4hi_internal (TARGET_NEON) |
| #define HAVE_vec_setv2si_internal (TARGET_NEON) |
| #define HAVE_vec_setv2sf_internal (TARGET_NEON) |
| #define HAVE_vec_setv16qi_internal (TARGET_NEON) |
| #define HAVE_vec_setv8hi_internal (TARGET_NEON) |
| #define HAVE_vec_setv4si_internal (TARGET_NEON) |
| #define HAVE_vec_setv4sf_internal (TARGET_NEON) |
| #define HAVE_vec_setv2di_internal (TARGET_NEON) |
| #define HAVE_vec_extractv8qi (TARGET_NEON) |
| #define HAVE_vec_extractv4hi (TARGET_NEON) |
| #define HAVE_vec_extractv2si (TARGET_NEON) |
| #define HAVE_vec_extractv2sf (TARGET_NEON) |
| #define HAVE_vec_extractv16qi (TARGET_NEON) |
| #define HAVE_vec_extractv8hi (TARGET_NEON) |
| #define HAVE_vec_extractv4si (TARGET_NEON) |
| #define HAVE_vec_extractv4sf (TARGET_NEON) |
| #define HAVE_vec_extractv2di (TARGET_NEON) |
| #define HAVE_adddi3_neon (TARGET_NEON) |
| #define HAVE_subdi3_neon (TARGET_NEON) |
| #define HAVE_mulv8qi3addv8qi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv16qi3addv16qi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv4hi3addv4hi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv8hi3addv8hi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv2si3addv2si_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv4si3addv4si_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv2sf3addv2sf_neon (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv4sf3addv4sf_neon (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv8qi3negv8qiaddv8qi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv16qi3negv16qiaddv16qi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv4hi3negv4hiaddv4hi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv8hi3negv8hiaddv8hi_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv2si3negv2siaddv2si_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv4si3negv4siaddv4si_neon (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv2sf3negv2sfaddv2sf_neon (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_mulv4sf3negv4sfaddv4sf_neon (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_fmav2sf4 (TARGET_NEON && TARGET_FMA && flag_unsafe_math_optimizations) |
| #define HAVE_fmav4sf4 (TARGET_NEON && TARGET_FMA && flag_unsafe_math_optimizations) |
| #define HAVE_fmav2sf4_intrinsic (TARGET_NEON && TARGET_FMA) |
| #define HAVE_fmav4sf4_intrinsic (TARGET_NEON && TARGET_FMA) |
| #define HAVE_fmsubv2sf4_intrinsic (TARGET_NEON && TARGET_FMA) |
| #define HAVE_fmsubv4sf4_intrinsic (TARGET_NEON && TARGET_FMA) |
| #define HAVE_neon_vrintpv2sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintzv2sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintmv2sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintxv2sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintav2sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintnv2sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintpv4sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintzv4sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintmv4sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintxv4sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintav4sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_neon_vrintnv4sf (TARGET_NEON && TARGET_FPU_ARMV8) |
| #define HAVE_iorv8qi3 (TARGET_NEON) |
| #define HAVE_iorv16qi3 (TARGET_NEON) |
| #define HAVE_iorv4hi3 (TARGET_NEON) |
| #define HAVE_iorv8hi3 (TARGET_NEON) |
| #define HAVE_iorv2si3 (TARGET_NEON) |
| #define HAVE_iorv4si3 (TARGET_NEON) |
| #define HAVE_iorv2sf3 (TARGET_NEON) |
| #define HAVE_iorv4sf3 (TARGET_NEON) |
| #define HAVE_iorv2di3 (TARGET_NEON) |
| #define HAVE_andv8qi3 (TARGET_NEON) |
| #define HAVE_andv16qi3 (TARGET_NEON) |
| #define HAVE_andv4hi3 (TARGET_NEON) |
| #define HAVE_andv8hi3 (TARGET_NEON) |
| #define HAVE_andv2si3 (TARGET_NEON) |
| #define HAVE_andv4si3 (TARGET_NEON) |
| #define HAVE_andv2sf3 (TARGET_NEON) |
| #define HAVE_andv4sf3 (TARGET_NEON) |
| #define HAVE_andv2di3 (TARGET_NEON) |
| #define HAVE_ornv8qi3_neon (TARGET_NEON) |
| #define HAVE_ornv16qi3_neon (TARGET_NEON) |
| #define HAVE_ornv4hi3_neon (TARGET_NEON) |
| #define HAVE_ornv8hi3_neon (TARGET_NEON) |
| #define HAVE_ornv2si3_neon (TARGET_NEON) |
| #define HAVE_ornv4si3_neon (TARGET_NEON) |
| #define HAVE_ornv2sf3_neon (TARGET_NEON) |
| #define HAVE_ornv4sf3_neon (TARGET_NEON) |
| #define HAVE_ornv2di3_neon (TARGET_NEON) |
| #define HAVE_orndi3_neon (TARGET_NEON) |
| #define HAVE_bicv8qi3_neon (TARGET_NEON) |
| #define HAVE_bicv16qi3_neon (TARGET_NEON) |
| #define HAVE_bicv4hi3_neon (TARGET_NEON) |
| #define HAVE_bicv8hi3_neon (TARGET_NEON) |
| #define HAVE_bicv2si3_neon (TARGET_NEON) |
| #define HAVE_bicv4si3_neon (TARGET_NEON) |
| #define HAVE_bicv2sf3_neon (TARGET_NEON) |
| #define HAVE_bicv4sf3_neon (TARGET_NEON) |
| #define HAVE_bicv2di3_neon (TARGET_NEON) |
| #define HAVE_bicdi3_neon (TARGET_NEON) |
| #define HAVE_xorv8qi3 (TARGET_NEON) |
| #define HAVE_xorv16qi3 (TARGET_NEON) |
| #define HAVE_xorv4hi3 (TARGET_NEON) |
| #define HAVE_xorv8hi3 (TARGET_NEON) |
| #define HAVE_xorv2si3 (TARGET_NEON) |
| #define HAVE_xorv4si3 (TARGET_NEON) |
| #define HAVE_xorv2sf3 (TARGET_NEON) |
| #define HAVE_xorv4sf3 (TARGET_NEON) |
| #define HAVE_xorv2di3 (TARGET_NEON) |
| #define HAVE_one_cmplv8qi2 (TARGET_NEON) |
| #define HAVE_one_cmplv16qi2 (TARGET_NEON) |
| #define HAVE_one_cmplv4hi2 (TARGET_NEON) |
| #define HAVE_one_cmplv8hi2 (TARGET_NEON) |
| #define HAVE_one_cmplv2si2 (TARGET_NEON) |
| #define HAVE_one_cmplv4si2 (TARGET_NEON) |
| #define HAVE_one_cmplv2sf2 (TARGET_NEON) |
| #define HAVE_one_cmplv4sf2 (TARGET_NEON) |
| #define HAVE_one_cmplv2di2 (TARGET_NEON) |
| #define HAVE_absv8qi2 (TARGET_NEON) |
| #define HAVE_absv16qi2 (TARGET_NEON) |
| #define HAVE_absv4hi2 (TARGET_NEON) |
| #define HAVE_absv8hi2 (TARGET_NEON) |
| #define HAVE_absv2si2 (TARGET_NEON) |
| #define HAVE_absv4si2 (TARGET_NEON) |
| #define HAVE_absv2sf2 (TARGET_NEON) |
| #define HAVE_absv4sf2 (TARGET_NEON) |
| #define HAVE_negv8qi2 (TARGET_NEON) |
| #define HAVE_negv16qi2 (TARGET_NEON) |
| #define HAVE_negv4hi2 (TARGET_NEON) |
| #define HAVE_negv8hi2 (TARGET_NEON) |
| #define HAVE_negv2si2 (TARGET_NEON) |
| #define HAVE_negv4si2 (TARGET_NEON) |
| #define HAVE_negv2sf2 (TARGET_NEON) |
| #define HAVE_negv4sf2 (TARGET_NEON) |
| #define HAVE_negdi2_neon (TARGET_NEON) |
| #define HAVE_vashlv8qi3 (TARGET_NEON) |
| #define HAVE_vashlv16qi3 (TARGET_NEON) |
| #define HAVE_vashlv4hi3 (TARGET_NEON) |
| #define HAVE_vashlv8hi3 (TARGET_NEON) |
| #define HAVE_vashlv2si3 (TARGET_NEON) |
| #define HAVE_vashlv4si3 (TARGET_NEON) |
| #define HAVE_vashrv8qi3_imm (TARGET_NEON) |
| #define HAVE_vashrv16qi3_imm (TARGET_NEON) |
| #define HAVE_vashrv4hi3_imm (TARGET_NEON) |
| #define HAVE_vashrv8hi3_imm (TARGET_NEON) |
| #define HAVE_vashrv2si3_imm (TARGET_NEON) |
| #define HAVE_vashrv4si3_imm (TARGET_NEON) |
| #define HAVE_vlshrv8qi3_imm (TARGET_NEON) |
| #define HAVE_vlshrv16qi3_imm (TARGET_NEON) |
| #define HAVE_vlshrv4hi3_imm (TARGET_NEON) |
| #define HAVE_vlshrv8hi3_imm (TARGET_NEON) |
| #define HAVE_vlshrv2si3_imm (TARGET_NEON) |
| #define HAVE_vlshrv4si3_imm (TARGET_NEON) |
| #define HAVE_ashlv8qi3_signed (TARGET_NEON) |
| #define HAVE_ashlv16qi3_signed (TARGET_NEON) |
| #define HAVE_ashlv4hi3_signed (TARGET_NEON) |
| #define HAVE_ashlv8hi3_signed (TARGET_NEON) |
| #define HAVE_ashlv2si3_signed (TARGET_NEON) |
| #define HAVE_ashlv4si3_signed (TARGET_NEON) |
| #define HAVE_ashlv2di3_signed (TARGET_NEON) |
| #define HAVE_ashlv8qi3_unsigned (TARGET_NEON) |
| #define HAVE_ashlv16qi3_unsigned (TARGET_NEON) |
| #define HAVE_ashlv4hi3_unsigned (TARGET_NEON) |
| #define HAVE_ashlv8hi3_unsigned (TARGET_NEON) |
| #define HAVE_ashlv2si3_unsigned (TARGET_NEON) |
| #define HAVE_ashlv4si3_unsigned (TARGET_NEON) |
| #define HAVE_ashlv2di3_unsigned (TARGET_NEON) |
| #define HAVE_neon_load_count (TARGET_NEON) |
| #define HAVE_ashldi3_neon_noclobber (TARGET_NEON && reload_completed \ |
| && (!CONST_INT_P (operands[2]) \ |
| || (INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) < 64))) |
| #define HAVE_ashldi3_neon (TARGET_NEON) |
| #define HAVE_signed_shift_di3_neon (TARGET_NEON && reload_completed) |
| #define HAVE_unsigned_shift_di3_neon (TARGET_NEON && reload_completed) |
| #define HAVE_ashrdi3_neon_imm_noclobber (TARGET_NEON && reload_completed \ |
| && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64) |
| #define HAVE_lshrdi3_neon_imm_noclobber (TARGET_NEON && reload_completed \ |
| && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64) |
| #define HAVE_ashrdi3_neon (TARGET_NEON) |
| #define HAVE_lshrdi3_neon (TARGET_NEON) |
| #define HAVE_widen_ssumv8qi3 (TARGET_NEON) |
| #define HAVE_widen_ssumv4hi3 (TARGET_NEON) |
| #define HAVE_widen_ssumv2si3 (TARGET_NEON) |
| #define HAVE_widen_usumv8qi3 (TARGET_NEON) |
| #define HAVE_widen_usumv4hi3 (TARGET_NEON) |
| #define HAVE_widen_usumv2si3 (TARGET_NEON) |
| #define HAVE_quad_halves_plusv4si (TARGET_NEON) |
| #define HAVE_quad_halves_sminv4si (TARGET_NEON) |
| #define HAVE_quad_halves_smaxv4si (TARGET_NEON) |
| #define HAVE_quad_halves_uminv4si (TARGET_NEON) |
| #define HAVE_quad_halves_umaxv4si (TARGET_NEON) |
| #define HAVE_quad_halves_plusv4sf (TARGET_NEON && flag_unsafe_math_optimizations) |
| #define HAVE_quad_halves_sminv4sf (TARGET_NEON && flag_unsafe_math_optimizations) |
| #define HAVE_quad_halves_smaxv4sf (TARGET_NEON && flag_unsafe_math_optimizations) |
| #define HAVE_quad_halves_plusv8hi (TARGET_NEON) |
| #define HAVE_quad_halves_sminv8hi (TARGET_NEON) |
| #define HAVE_quad_halves_smaxv8hi (TARGET_NEON) |
| #define HAVE_quad_halves_uminv8hi (TARGET_NEON) |
| #define HAVE_quad_halves_umaxv8hi (TARGET_NEON) |
| #define HAVE_quad_halves_plusv16qi (TARGET_NEON) |
| #define HAVE_quad_halves_sminv16qi (TARGET_NEON) |
| #define HAVE_quad_halves_smaxv16qi (TARGET_NEON) |
| #define HAVE_quad_halves_uminv16qi (TARGET_NEON) |
| #define HAVE_quad_halves_umaxv16qi (TARGET_NEON) |
| #define HAVE_reduc_splus_v2di (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vpadd_internalv8qi (TARGET_NEON) |
| #define HAVE_neon_vpadd_internalv4hi (TARGET_NEON) |
| #define HAVE_neon_vpadd_internalv2si (TARGET_NEON) |
| #define HAVE_neon_vpadd_internalv2sf (TARGET_NEON) |
| #define HAVE_neon_vpsminv8qi (TARGET_NEON) |
| #define HAVE_neon_vpsminv4hi (TARGET_NEON) |
| #define HAVE_neon_vpsminv2si (TARGET_NEON) |
| #define HAVE_neon_vpsminv2sf (TARGET_NEON) |
| #define HAVE_neon_vpsmaxv8qi (TARGET_NEON) |
| #define HAVE_neon_vpsmaxv4hi (TARGET_NEON) |
| #define HAVE_neon_vpsmaxv2si (TARGET_NEON) |
| #define HAVE_neon_vpsmaxv2sf (TARGET_NEON) |
| #define HAVE_neon_vpuminv8qi (TARGET_NEON) |
| #define HAVE_neon_vpuminv4hi (TARGET_NEON) |
| #define HAVE_neon_vpuminv2si (TARGET_NEON) |
| #define HAVE_neon_vpumaxv8qi (TARGET_NEON) |
| #define HAVE_neon_vpumaxv4hi (TARGET_NEON) |
| #define HAVE_neon_vpumaxv2si (TARGET_NEON) |
| #define HAVE_neon_vaddv8qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv16qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv4hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv8hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv2si_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv4si_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv2sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv4sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vadddi_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddv2di_unspec (TARGET_NEON) |
| #define HAVE_neon_vaddlv8qi (TARGET_NEON) |
| #define HAVE_neon_vaddlv4hi (TARGET_NEON) |
| #define HAVE_neon_vaddlv2si (TARGET_NEON) |
| #define HAVE_neon_vaddwv8qi (TARGET_NEON) |
| #define HAVE_neon_vaddwv4hi (TARGET_NEON) |
| #define HAVE_neon_vaddwv2si (TARGET_NEON) |
| #define HAVE_neon_vhaddv8qi (TARGET_NEON) |
| #define HAVE_neon_vhaddv16qi (TARGET_NEON) |
| #define HAVE_neon_vhaddv4hi (TARGET_NEON) |
| #define HAVE_neon_vhaddv8hi (TARGET_NEON) |
| #define HAVE_neon_vhaddv2si (TARGET_NEON) |
| #define HAVE_neon_vhaddv4si (TARGET_NEON) |
| #define HAVE_neon_vqaddv8qi (TARGET_NEON) |
| #define HAVE_neon_vqaddv16qi (TARGET_NEON) |
| #define HAVE_neon_vqaddv4hi (TARGET_NEON) |
| #define HAVE_neon_vqaddv8hi (TARGET_NEON) |
| #define HAVE_neon_vqaddv2si (TARGET_NEON) |
| #define HAVE_neon_vqaddv4si (TARGET_NEON) |
| #define HAVE_neon_vqadddi (TARGET_NEON) |
| #define HAVE_neon_vqaddv2di (TARGET_NEON) |
| #define HAVE_neon_vaddhnv8hi (TARGET_NEON) |
| #define HAVE_neon_vaddhnv4si (TARGET_NEON) |
| #define HAVE_neon_vaddhnv2di (TARGET_NEON) |
| #define HAVE_neon_vmulv8qi (TARGET_NEON) |
| #define HAVE_neon_vmulv16qi (TARGET_NEON) |
| #define HAVE_neon_vmulv4hi (TARGET_NEON) |
| #define HAVE_neon_vmulv8hi (TARGET_NEON) |
| #define HAVE_neon_vmulv2si (TARGET_NEON) |
| #define HAVE_neon_vmulv4si (TARGET_NEON) |
| #define HAVE_neon_vmulv2sf (TARGET_NEON) |
| #define HAVE_neon_vmulv4sf (TARGET_NEON) |
| #define HAVE_neon_vmlav8qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav16qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav4hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav8hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav2si_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav4si_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav2sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlav4sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlalv8qi (TARGET_NEON) |
| #define HAVE_neon_vmlalv4hi (TARGET_NEON) |
| #define HAVE_neon_vmlalv2si (TARGET_NEON) |
| #define HAVE_neon_vmlsv8qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv16qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv4hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv8hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv2si_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv4si_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv2sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlsv4sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vmlslv8qi (TARGET_NEON) |
| #define HAVE_neon_vmlslv4hi (TARGET_NEON) |
| #define HAVE_neon_vmlslv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmulhv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmulhv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmulhv8hi (TARGET_NEON) |
| #define HAVE_neon_vqdmulhv4si (TARGET_NEON) |
| #define HAVE_neon_vqdmlalv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmlalv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmlslv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmlslv2si (TARGET_NEON) |
| #define HAVE_neon_vmullv8qi (TARGET_NEON) |
| #define HAVE_neon_vmullv4hi (TARGET_NEON) |
| #define HAVE_neon_vmullv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmullv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmullv2si (TARGET_NEON) |
| #define HAVE_neon_vsubv8qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv16qi_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv4hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv8hi_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv2si_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv4si_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv2sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv4sf_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubdi_unspec (TARGET_NEON) |
| #define HAVE_neon_vsubv2di_unspec (TARGET_NEON) |
| #define HAVE_neon_vsublv8qi (TARGET_NEON) |
| #define HAVE_neon_vsublv4hi (TARGET_NEON) |
| #define HAVE_neon_vsublv2si (TARGET_NEON) |
| #define HAVE_neon_vsubwv8qi (TARGET_NEON) |
| #define HAVE_neon_vsubwv4hi (TARGET_NEON) |
| #define HAVE_neon_vsubwv2si (TARGET_NEON) |
| #define HAVE_neon_vqsubv8qi (TARGET_NEON) |
| #define HAVE_neon_vqsubv16qi (TARGET_NEON) |
| #define HAVE_neon_vqsubv4hi (TARGET_NEON) |
| #define HAVE_neon_vqsubv8hi (TARGET_NEON) |
| #define HAVE_neon_vqsubv2si (TARGET_NEON) |
| #define HAVE_neon_vqsubv4si (TARGET_NEON) |
| #define HAVE_neon_vqsubdi (TARGET_NEON) |
| #define HAVE_neon_vqsubv2di (TARGET_NEON) |
| #define HAVE_neon_vhsubv8qi (TARGET_NEON) |
| #define HAVE_neon_vhsubv16qi (TARGET_NEON) |
| #define HAVE_neon_vhsubv4hi (TARGET_NEON) |
| #define HAVE_neon_vhsubv8hi (TARGET_NEON) |
| #define HAVE_neon_vhsubv2si (TARGET_NEON) |
| #define HAVE_neon_vhsubv4si (TARGET_NEON) |
| #define HAVE_neon_vsubhnv8hi (TARGET_NEON) |
| #define HAVE_neon_vsubhnv4si (TARGET_NEON) |
| #define HAVE_neon_vsubhnv2di (TARGET_NEON) |
| #define HAVE_neon_vceqv8qi (TARGET_NEON) |
| #define HAVE_neon_vceqv16qi (TARGET_NEON) |
| #define HAVE_neon_vceqv4hi (TARGET_NEON) |
| #define HAVE_neon_vceqv8hi (TARGET_NEON) |
| #define HAVE_neon_vceqv2si (TARGET_NEON) |
| #define HAVE_neon_vceqv4si (TARGET_NEON) |
| #define HAVE_neon_vceqv2sf (TARGET_NEON) |
| #define HAVE_neon_vceqv4sf (TARGET_NEON) |
| #define HAVE_neon_vcgev8qi (TARGET_NEON) |
| #define HAVE_neon_vcgev16qi (TARGET_NEON) |
| #define HAVE_neon_vcgev4hi (TARGET_NEON) |
| #define HAVE_neon_vcgev8hi (TARGET_NEON) |
| #define HAVE_neon_vcgev2si (TARGET_NEON) |
| #define HAVE_neon_vcgev4si (TARGET_NEON) |
| #define HAVE_neon_vcgev2sf (TARGET_NEON) |
| #define HAVE_neon_vcgev4sf (TARGET_NEON) |
| #define HAVE_neon_vcgeuv8qi (TARGET_NEON) |
| #define HAVE_neon_vcgeuv16qi (TARGET_NEON) |
| #define HAVE_neon_vcgeuv4hi (TARGET_NEON) |
| #define HAVE_neon_vcgeuv8hi (TARGET_NEON) |
| #define HAVE_neon_vcgeuv2si (TARGET_NEON) |
| #define HAVE_neon_vcgeuv4si (TARGET_NEON) |
| #define HAVE_neon_vcgtv8qi (TARGET_NEON) |
| #define HAVE_neon_vcgtv16qi (TARGET_NEON) |
| #define HAVE_neon_vcgtv4hi (TARGET_NEON) |
| #define HAVE_neon_vcgtv8hi (TARGET_NEON) |
| #define HAVE_neon_vcgtv2si (TARGET_NEON) |
| #define HAVE_neon_vcgtv4si (TARGET_NEON) |
| #define HAVE_neon_vcgtv2sf (TARGET_NEON) |
| #define HAVE_neon_vcgtv4sf (TARGET_NEON) |
| #define HAVE_neon_vcgtuv8qi (TARGET_NEON) |
| #define HAVE_neon_vcgtuv16qi (TARGET_NEON) |
| #define HAVE_neon_vcgtuv4hi (TARGET_NEON) |
| #define HAVE_neon_vcgtuv8hi (TARGET_NEON) |
| #define HAVE_neon_vcgtuv2si (TARGET_NEON) |
| #define HAVE_neon_vcgtuv4si (TARGET_NEON) |
| #define HAVE_neon_vclev8qi (TARGET_NEON) |
| #define HAVE_neon_vclev16qi (TARGET_NEON) |
| #define HAVE_neon_vclev4hi (TARGET_NEON) |
| #define HAVE_neon_vclev8hi (TARGET_NEON) |
| #define HAVE_neon_vclev2si (TARGET_NEON) |
| #define HAVE_neon_vclev4si (TARGET_NEON) |
| #define HAVE_neon_vclev2sf (TARGET_NEON) |
| #define HAVE_neon_vclev4sf (TARGET_NEON) |
| #define HAVE_neon_vcltv8qi (TARGET_NEON) |
| #define HAVE_neon_vcltv16qi (TARGET_NEON) |
| #define HAVE_neon_vcltv4hi (TARGET_NEON) |
| #define HAVE_neon_vcltv8hi (TARGET_NEON) |
| #define HAVE_neon_vcltv2si (TARGET_NEON) |
| #define HAVE_neon_vcltv4si (TARGET_NEON) |
| #define HAVE_neon_vcltv2sf (TARGET_NEON) |
| #define HAVE_neon_vcltv4sf (TARGET_NEON) |
| #define HAVE_neon_vcagev2sf (TARGET_NEON) |
| #define HAVE_neon_vcagev4sf (TARGET_NEON) |
| #define HAVE_neon_vcagtv2sf (TARGET_NEON) |
| #define HAVE_neon_vcagtv4sf (TARGET_NEON) |
| #define HAVE_neon_vtstv8qi (TARGET_NEON) |
| #define HAVE_neon_vtstv16qi (TARGET_NEON) |
| #define HAVE_neon_vtstv4hi (TARGET_NEON) |
| #define HAVE_neon_vtstv8hi (TARGET_NEON) |
| #define HAVE_neon_vtstv2si (TARGET_NEON) |
| #define HAVE_neon_vtstv4si (TARGET_NEON) |
| #define HAVE_neon_vabdv8qi (TARGET_NEON) |
| #define HAVE_neon_vabdv16qi (TARGET_NEON) |
| #define HAVE_neon_vabdv4hi (TARGET_NEON) |
| #define HAVE_neon_vabdv8hi (TARGET_NEON) |
| #define HAVE_neon_vabdv2si (TARGET_NEON) |
| #define HAVE_neon_vabdv4si (TARGET_NEON) |
| #define HAVE_neon_vabdv2sf (TARGET_NEON) |
| #define HAVE_neon_vabdv4sf (TARGET_NEON) |
| #define HAVE_neon_vabdlv8qi (TARGET_NEON) |
| #define HAVE_neon_vabdlv4hi (TARGET_NEON) |
| #define HAVE_neon_vabdlv2si (TARGET_NEON) |
| #define HAVE_neon_vabav8qi (TARGET_NEON) |
| #define HAVE_neon_vabav16qi (TARGET_NEON) |
| #define HAVE_neon_vabav4hi (TARGET_NEON) |
| #define HAVE_neon_vabav8hi (TARGET_NEON) |
| #define HAVE_neon_vabav2si (TARGET_NEON) |
| #define HAVE_neon_vabav4si (TARGET_NEON) |
| #define HAVE_neon_vabalv8qi (TARGET_NEON) |
| #define HAVE_neon_vabalv4hi (TARGET_NEON) |
| #define HAVE_neon_vabalv2si (TARGET_NEON) |
| #define HAVE_neon_vmaxv8qi (TARGET_NEON) |
| #define HAVE_neon_vmaxv16qi (TARGET_NEON) |
| #define HAVE_neon_vmaxv4hi (TARGET_NEON) |
| #define HAVE_neon_vmaxv8hi (TARGET_NEON) |
| #define HAVE_neon_vmaxv2si (TARGET_NEON) |
| #define HAVE_neon_vmaxv4si (TARGET_NEON) |
| #define HAVE_neon_vmaxv2sf (TARGET_NEON) |
| #define HAVE_neon_vmaxv4sf (TARGET_NEON) |
| #define HAVE_neon_vminv8qi (TARGET_NEON) |
| #define HAVE_neon_vminv16qi (TARGET_NEON) |
| #define HAVE_neon_vminv4hi (TARGET_NEON) |
| #define HAVE_neon_vminv8hi (TARGET_NEON) |
| #define HAVE_neon_vminv2si (TARGET_NEON) |
| #define HAVE_neon_vminv4si (TARGET_NEON) |
| #define HAVE_neon_vminv2sf (TARGET_NEON) |
| #define HAVE_neon_vminv4sf (TARGET_NEON) |
| #define HAVE_neon_vpaddlv8qi (TARGET_NEON) |
| #define HAVE_neon_vpaddlv16qi (TARGET_NEON) |
| #define HAVE_neon_vpaddlv4hi (TARGET_NEON) |
| #define HAVE_neon_vpaddlv8hi (TARGET_NEON) |
| #define HAVE_neon_vpaddlv2si (TARGET_NEON) |
| #define HAVE_neon_vpaddlv4si (TARGET_NEON) |
| #define HAVE_neon_vpadalv8qi (TARGET_NEON) |
| #define HAVE_neon_vpadalv16qi (TARGET_NEON) |
| #define HAVE_neon_vpadalv4hi (TARGET_NEON) |
| #define HAVE_neon_vpadalv8hi (TARGET_NEON) |
| #define HAVE_neon_vpadalv2si (TARGET_NEON) |
| #define HAVE_neon_vpadalv4si (TARGET_NEON) |
| #define HAVE_neon_vpmaxv8qi (TARGET_NEON) |
| #define HAVE_neon_vpmaxv4hi (TARGET_NEON) |
| #define HAVE_neon_vpmaxv2si (TARGET_NEON) |
| #define HAVE_neon_vpmaxv2sf (TARGET_NEON) |
| #define HAVE_neon_vpminv8qi (TARGET_NEON) |
| #define HAVE_neon_vpminv4hi (TARGET_NEON) |
| #define HAVE_neon_vpminv2si (TARGET_NEON) |
| #define HAVE_neon_vpminv2sf (TARGET_NEON) |
| #define HAVE_neon_vrecpsv2sf (TARGET_NEON) |
| #define HAVE_neon_vrecpsv4sf (TARGET_NEON) |
| #define HAVE_neon_vrsqrtsv2sf (TARGET_NEON) |
| #define HAVE_neon_vrsqrtsv4sf (TARGET_NEON) |
| #define HAVE_neon_vqabsv8qi (TARGET_NEON) |
| #define HAVE_neon_vqabsv16qi (TARGET_NEON) |
| #define HAVE_neon_vqabsv4hi (TARGET_NEON) |
| #define HAVE_neon_vqabsv8hi (TARGET_NEON) |
| #define HAVE_neon_vqabsv2si (TARGET_NEON) |
| #define HAVE_neon_vqabsv4si (TARGET_NEON) |
| #define HAVE_neon_vqnegv8qi (TARGET_NEON) |
| #define HAVE_neon_vqnegv16qi (TARGET_NEON) |
| #define HAVE_neon_vqnegv4hi (TARGET_NEON) |
| #define HAVE_neon_vqnegv8hi (TARGET_NEON) |
| #define HAVE_neon_vqnegv2si (TARGET_NEON) |
| #define HAVE_neon_vqnegv4si (TARGET_NEON) |
| #define HAVE_neon_vclsv8qi (TARGET_NEON) |
| #define HAVE_neon_vclsv16qi (TARGET_NEON) |
| #define HAVE_neon_vclsv4hi (TARGET_NEON) |
| #define HAVE_neon_vclsv8hi (TARGET_NEON) |
| #define HAVE_neon_vclsv2si (TARGET_NEON) |
| #define HAVE_neon_vclsv4si (TARGET_NEON) |
| #define HAVE_clzv8qi2 (TARGET_NEON) |
| #define HAVE_clzv16qi2 (TARGET_NEON) |
| #define HAVE_clzv4hi2 (TARGET_NEON) |
| #define HAVE_clzv8hi2 (TARGET_NEON) |
| #define HAVE_clzv2si2 (TARGET_NEON) |
| #define HAVE_clzv4si2 (TARGET_NEON) |
| #define HAVE_popcountv8qi2 (TARGET_NEON) |
| #define HAVE_popcountv16qi2 (TARGET_NEON) |
| #define HAVE_neon_vrecpev2si (TARGET_NEON) |
| #define HAVE_neon_vrecpev2sf (TARGET_NEON) |
| #define HAVE_neon_vrecpev4si (TARGET_NEON) |
| #define HAVE_neon_vrecpev4sf (TARGET_NEON) |
| #define HAVE_neon_vrsqrtev2si (TARGET_NEON) |
| #define HAVE_neon_vrsqrtev2sf (TARGET_NEON) |
| #define HAVE_neon_vrsqrtev4si (TARGET_NEON) |
| #define HAVE_neon_vrsqrtev4sf (TARGET_NEON) |
| #define HAVE_neon_vget_lanev8qi_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4hi_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2si_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2sf_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev8qi_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4hi_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2si_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2sf_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev16qi_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev8hi_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4si_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4sf_sext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev16qi_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev8hi_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4si_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4sf_zext_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vdup_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vdup_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vdup_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vdup_nv2si (TARGET_NEON) |
| #define HAVE_neon_vdup_nv2sf (TARGET_NEON) |
| #define HAVE_neon_vdup_nv4si (TARGET_NEON) |
| #define HAVE_neon_vdup_nv4sf (TARGET_NEON) |
| #define HAVE_neon_vdup_nv2di (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev8qi_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev16qi_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev4hi_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev8hi_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev2si_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev4si_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev2sf_internal (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev4sf_internal (TARGET_NEON) |
| #define HAVE_neon_vcombinev8qi (TARGET_NEON) |
| #define HAVE_neon_vcombinev4hi (TARGET_NEON) |
| #define HAVE_neon_vcombinev2si (TARGET_NEON) |
| #define HAVE_neon_vcombinev2sf (TARGET_NEON) |
| #define HAVE_neon_vcombinedi (TARGET_NEON) |
| #define HAVE_floatv2siv2sf2 (TARGET_NEON && !flag_rounding_math) |
| #define HAVE_floatv4siv4sf2 (TARGET_NEON && !flag_rounding_math) |
| #define HAVE_floatunsv2siv2sf2 (TARGET_NEON && !flag_rounding_math) |
| #define HAVE_floatunsv4siv4sf2 (TARGET_NEON && !flag_rounding_math) |
| #define HAVE_fix_truncv2sfv2si2 (TARGET_NEON) |
| #define HAVE_fix_truncv4sfv4si2 (TARGET_NEON) |
| #define HAVE_fixuns_truncv2sfv2si2 (TARGET_NEON) |
| #define HAVE_fixuns_truncv4sfv4si2 (TARGET_NEON) |
| #define HAVE_neon_vcvtv2sf (TARGET_NEON) |
| #define HAVE_neon_vcvtv4sf (TARGET_NEON) |
| #define HAVE_neon_vcvtv2si (TARGET_NEON) |
| #define HAVE_neon_vcvtv4si (TARGET_NEON) |
| #define HAVE_neon_vcvtv4sfv4hf (TARGET_NEON && TARGET_FP16) |
| #define HAVE_neon_vcvtv4hfv4sf (TARGET_NEON && TARGET_FP16) |
| #define HAVE_neon_vcvt_nv2sf (TARGET_NEON) |
| #define HAVE_neon_vcvt_nv4sf (TARGET_NEON) |
| #define HAVE_neon_vcvt_nv2si (TARGET_NEON) |
| #define HAVE_neon_vcvt_nv4si (TARGET_NEON) |
| #define HAVE_neon_vmovnv8hi (TARGET_NEON) |
| #define HAVE_neon_vmovnv4si (TARGET_NEON) |
| #define HAVE_neon_vmovnv2di (TARGET_NEON) |
| #define HAVE_neon_vqmovnv8hi (TARGET_NEON) |
| #define HAVE_neon_vqmovnv4si (TARGET_NEON) |
| #define HAVE_neon_vqmovnv2di (TARGET_NEON) |
| #define HAVE_neon_vqmovunv8hi (TARGET_NEON) |
| #define HAVE_neon_vqmovunv4si (TARGET_NEON) |
| #define HAVE_neon_vqmovunv2di (TARGET_NEON) |
| #define HAVE_neon_vmovlv8qi (TARGET_NEON) |
| #define HAVE_neon_vmovlv4hi (TARGET_NEON) |
| #define HAVE_neon_vmovlv2si (TARGET_NEON) |
| #define HAVE_neon_vmul_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vmul_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vmul_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vmul_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vmul_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vmul_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vmull_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vmull_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vqdmull_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmull_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vmla_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vmla_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vmla_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vmla_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vmla_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vmla_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vmlal_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vmlal_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vqdmlal_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmlal_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vmls_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vmls_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vmls_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vmls_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vmls_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vmls_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vmlsl_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vmlsl_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vqdmlsl_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmlsl_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vextv8qi (TARGET_NEON) |
| #define HAVE_neon_vextv16qi (TARGET_NEON) |
| #define HAVE_neon_vextv4hi (TARGET_NEON) |
| #define HAVE_neon_vextv8hi (TARGET_NEON) |
| #define HAVE_neon_vextv2si (TARGET_NEON) |
| #define HAVE_neon_vextv4si (TARGET_NEON) |
| #define HAVE_neon_vextv2sf (TARGET_NEON) |
| #define HAVE_neon_vextv4sf (TARGET_NEON) |
| #define HAVE_neon_vextdi (TARGET_NEON) |
| #define HAVE_neon_vextv2di (TARGET_NEON) |
| #define HAVE_neon_vrev64v8qi (TARGET_NEON) |
| #define HAVE_neon_vrev64v16qi (TARGET_NEON) |
| #define HAVE_neon_vrev64v4hi (TARGET_NEON) |
| #define HAVE_neon_vrev64v8hi (TARGET_NEON) |
| #define HAVE_neon_vrev64v2si (TARGET_NEON) |
| #define HAVE_neon_vrev64v4si (TARGET_NEON) |
| #define HAVE_neon_vrev64v2sf (TARGET_NEON) |
| #define HAVE_neon_vrev64v4sf (TARGET_NEON) |
| #define HAVE_neon_vrev64v2di (TARGET_NEON) |
| #define HAVE_neon_vrev32v8qi (TARGET_NEON) |
| #define HAVE_neon_vrev32v4hi (TARGET_NEON) |
| #define HAVE_neon_vrev32v16qi (TARGET_NEON) |
| #define HAVE_neon_vrev32v8hi (TARGET_NEON) |
| #define HAVE_neon_vrev16v8qi (TARGET_NEON) |
| #define HAVE_neon_vrev16v16qi (TARGET_NEON) |
| #define HAVE_neon_vbslv8qi_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv16qi_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv4hi_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv8hi_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv2si_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv4si_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv2sf_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv4sf_internal (TARGET_NEON) |
| #define HAVE_neon_vbsldi_internal (TARGET_NEON) |
| #define HAVE_neon_vbslv2di_internal (TARGET_NEON) |
| #define HAVE_neon_vshlv8qi (TARGET_NEON) |
| #define HAVE_neon_vshlv16qi (TARGET_NEON) |
| #define HAVE_neon_vshlv4hi (TARGET_NEON) |
| #define HAVE_neon_vshlv8hi (TARGET_NEON) |
| #define HAVE_neon_vshlv2si (TARGET_NEON) |
| #define HAVE_neon_vshlv4si (TARGET_NEON) |
| #define HAVE_neon_vshldi (TARGET_NEON) |
| #define HAVE_neon_vshlv2di (TARGET_NEON) |
| #define HAVE_neon_vqshlv8qi (TARGET_NEON) |
| #define HAVE_neon_vqshlv16qi (TARGET_NEON) |
| #define HAVE_neon_vqshlv4hi (TARGET_NEON) |
| #define HAVE_neon_vqshlv8hi (TARGET_NEON) |
| #define HAVE_neon_vqshlv2si (TARGET_NEON) |
| #define HAVE_neon_vqshlv4si (TARGET_NEON) |
| #define HAVE_neon_vqshldi (TARGET_NEON) |
| #define HAVE_neon_vqshlv2di (TARGET_NEON) |
| #define HAVE_neon_vshr_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vshr_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vshr_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vshr_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vshr_nv2si (TARGET_NEON) |
| #define HAVE_neon_vshr_nv4si (TARGET_NEON) |
| #define HAVE_neon_vshr_ndi (TARGET_NEON) |
| #define HAVE_neon_vshr_nv2di (TARGET_NEON) |
| #define HAVE_neon_vshrn_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vshrn_nv4si (TARGET_NEON) |
| #define HAVE_neon_vshrn_nv2di (TARGET_NEON) |
| #define HAVE_neon_vqshrn_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vqshrn_nv4si (TARGET_NEON) |
| #define HAVE_neon_vqshrn_nv2di (TARGET_NEON) |
| #define HAVE_neon_vqshrun_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vqshrun_nv4si (TARGET_NEON) |
| #define HAVE_neon_vqshrun_nv2di (TARGET_NEON) |
| #define HAVE_neon_vshl_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vshl_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vshl_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vshl_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vshl_nv2si (TARGET_NEON) |
| #define HAVE_neon_vshl_nv4si (TARGET_NEON) |
| #define HAVE_neon_vshl_ndi (TARGET_NEON) |
| #define HAVE_neon_vshl_nv2di (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv4si (TARGET_NEON) |
| #define HAVE_neon_vqshl_ndi (TARGET_NEON) |
| #define HAVE_neon_vqshl_nv2di (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv4si (TARGET_NEON) |
| #define HAVE_neon_vqshlu_ndi (TARGET_NEON) |
| #define HAVE_neon_vqshlu_nv2di (TARGET_NEON) |
| #define HAVE_neon_vshll_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vshll_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vshll_nv2si (TARGET_NEON) |
| #define HAVE_neon_vsra_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vsra_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vsra_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vsra_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vsra_nv2si (TARGET_NEON) |
| #define HAVE_neon_vsra_nv4si (TARGET_NEON) |
| #define HAVE_neon_vsra_ndi (TARGET_NEON) |
| #define HAVE_neon_vsra_nv2di (TARGET_NEON) |
| #define HAVE_neon_vsri_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vsri_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vsri_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vsri_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vsri_nv2si (TARGET_NEON) |
| #define HAVE_neon_vsri_nv4si (TARGET_NEON) |
| #define HAVE_neon_vsri_ndi (TARGET_NEON) |
| #define HAVE_neon_vsri_nv2di (TARGET_NEON) |
| #define HAVE_neon_vsli_nv8qi (TARGET_NEON) |
| #define HAVE_neon_vsli_nv16qi (TARGET_NEON) |
| #define HAVE_neon_vsli_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vsli_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vsli_nv2si (TARGET_NEON) |
| #define HAVE_neon_vsli_nv4si (TARGET_NEON) |
| #define HAVE_neon_vsli_ndi (TARGET_NEON) |
| #define HAVE_neon_vsli_nv2di (TARGET_NEON) |
| #define HAVE_neon_vtbl1v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbl2v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbl3v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbl4v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbl1v16qi (TARGET_NEON) |
| #define HAVE_neon_vtbl2v16qi (TARGET_NEON) |
| #define HAVE_neon_vcombinev16qi (TARGET_NEON) |
| #define HAVE_neon_vtbx1v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbx2v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbx3v8qi (TARGET_NEON) |
| #define HAVE_neon_vtbx4v8qi (TARGET_NEON) |
| #define HAVE_neon_vld1v8qi (TARGET_NEON) |
| #define HAVE_neon_vld1v16qi (TARGET_NEON) |
| #define HAVE_neon_vld1v4hi (TARGET_NEON) |
| #define HAVE_neon_vld1v8hi (TARGET_NEON) |
| #define HAVE_neon_vld1v2si (TARGET_NEON) |
| #define HAVE_neon_vld1v4si (TARGET_NEON) |
| #define HAVE_neon_vld1v2sf (TARGET_NEON) |
| #define HAVE_neon_vld1v4sf (TARGET_NEON) |
| #define HAVE_neon_vld1di (TARGET_NEON) |
| #define HAVE_neon_vld1v2di (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vld1_lanedi (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev16qi (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vld1_lanev2di (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv8qi (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv4hi (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv2si (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv2sf (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv16qi (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv8hi (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv4si (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv4sf (TARGET_NEON) |
| #define HAVE_neon_vld1_dupv2di (TARGET_NEON) |
| #define HAVE_neon_vst1v8qi (TARGET_NEON) |
| #define HAVE_neon_vst1v16qi (TARGET_NEON) |
| #define HAVE_neon_vst1v4hi (TARGET_NEON) |
| #define HAVE_neon_vst1v8hi (TARGET_NEON) |
| #define HAVE_neon_vst1v2si (TARGET_NEON) |
| #define HAVE_neon_vst1v4si (TARGET_NEON) |
| #define HAVE_neon_vst1v2sf (TARGET_NEON) |
| #define HAVE_neon_vst1v4sf (TARGET_NEON) |
| #define HAVE_neon_vst1di (TARGET_NEON) |
| #define HAVE_neon_vst1v2di (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vst1_lanedi (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev16qi (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vst1_lanev2di (TARGET_NEON) |
| #define HAVE_neon_vld2v8qi (TARGET_NEON) |
| #define HAVE_neon_vld2v4hi (TARGET_NEON) |
| #define HAVE_neon_vld2v2si (TARGET_NEON) |
| #define HAVE_neon_vld2v2sf (TARGET_NEON) |
| #define HAVE_neon_vld2di (TARGET_NEON) |
| #define HAVE_neon_vld2v16qi (TARGET_NEON) |
| #define HAVE_neon_vld2v8hi (TARGET_NEON) |
| #define HAVE_neon_vld2v4si (TARGET_NEON) |
| #define HAVE_neon_vld2v4sf (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vld2_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vld2_dupv8qi (TARGET_NEON) |
| #define HAVE_neon_vld2_dupv4hi (TARGET_NEON) |
| #define HAVE_neon_vld2_dupv2si (TARGET_NEON) |
| #define HAVE_neon_vld2_dupv2sf (TARGET_NEON) |
| #define HAVE_neon_vld2_dupdi (TARGET_NEON) |
| #define HAVE_neon_vst2v8qi (TARGET_NEON) |
| #define HAVE_neon_vst2v4hi (TARGET_NEON) |
| #define HAVE_neon_vst2v2si (TARGET_NEON) |
| #define HAVE_neon_vst2v2sf (TARGET_NEON) |
| #define HAVE_neon_vst2di (TARGET_NEON) |
| #define HAVE_neon_vst2v16qi (TARGET_NEON) |
| #define HAVE_neon_vst2v8hi (TARGET_NEON) |
| #define HAVE_neon_vst2v4si (TARGET_NEON) |
| #define HAVE_neon_vst2v4sf (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vst2_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vld3v8qi (TARGET_NEON) |
| #define HAVE_neon_vld3v4hi (TARGET_NEON) |
| #define HAVE_neon_vld3v2si (TARGET_NEON) |
| #define HAVE_neon_vld3v2sf (TARGET_NEON) |
| #define HAVE_neon_vld3di (TARGET_NEON) |
| #define HAVE_neon_vld3qav16qi (TARGET_NEON) |
| #define HAVE_neon_vld3qav8hi (TARGET_NEON) |
| #define HAVE_neon_vld3qav4si (TARGET_NEON) |
| #define HAVE_neon_vld3qav4sf (TARGET_NEON) |
| #define HAVE_neon_vld3qbv16qi (TARGET_NEON) |
| #define HAVE_neon_vld3qbv8hi (TARGET_NEON) |
| #define HAVE_neon_vld3qbv4si (TARGET_NEON) |
| #define HAVE_neon_vld3qbv4sf (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vld3_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vld3_dupv8qi (TARGET_NEON) |
| #define HAVE_neon_vld3_dupv4hi (TARGET_NEON) |
| #define HAVE_neon_vld3_dupv2si (TARGET_NEON) |
| #define HAVE_neon_vld3_dupv2sf (TARGET_NEON) |
| #define HAVE_neon_vld3_dupdi (TARGET_NEON) |
| #define HAVE_neon_vst3v8qi (TARGET_NEON) |
| #define HAVE_neon_vst3v4hi (TARGET_NEON) |
| #define HAVE_neon_vst3v2si (TARGET_NEON) |
| #define HAVE_neon_vst3v2sf (TARGET_NEON) |
| #define HAVE_neon_vst3di (TARGET_NEON) |
| #define HAVE_neon_vst3qav16qi (TARGET_NEON) |
| #define HAVE_neon_vst3qav8hi (TARGET_NEON) |
| #define HAVE_neon_vst3qav4si (TARGET_NEON) |
| #define HAVE_neon_vst3qav4sf (TARGET_NEON) |
| #define HAVE_neon_vst3qbv16qi (TARGET_NEON) |
| #define HAVE_neon_vst3qbv8hi (TARGET_NEON) |
| #define HAVE_neon_vst3qbv4si (TARGET_NEON) |
| #define HAVE_neon_vst3qbv4sf (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vst3_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vld4v8qi (TARGET_NEON) |
| #define HAVE_neon_vld4v4hi (TARGET_NEON) |
| #define HAVE_neon_vld4v2si (TARGET_NEON) |
| #define HAVE_neon_vld4v2sf (TARGET_NEON) |
| #define HAVE_neon_vld4di (TARGET_NEON) |
| #define HAVE_neon_vld4qav16qi (TARGET_NEON) |
| #define HAVE_neon_vld4qav8hi (TARGET_NEON) |
| #define HAVE_neon_vld4qav4si (TARGET_NEON) |
| #define HAVE_neon_vld4qav4sf (TARGET_NEON) |
| #define HAVE_neon_vld4qbv16qi (TARGET_NEON) |
| #define HAVE_neon_vld4qbv8hi (TARGET_NEON) |
| #define HAVE_neon_vld4qbv4si (TARGET_NEON) |
| #define HAVE_neon_vld4qbv4sf (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vld4_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vld4_dupv8qi (TARGET_NEON) |
| #define HAVE_neon_vld4_dupv4hi (TARGET_NEON) |
| #define HAVE_neon_vld4_dupv2si (TARGET_NEON) |
| #define HAVE_neon_vld4_dupv2sf (TARGET_NEON) |
| #define HAVE_neon_vld4_dupdi (TARGET_NEON) |
| #define HAVE_neon_vst4v8qi (TARGET_NEON) |
| #define HAVE_neon_vst4v4hi (TARGET_NEON) |
| #define HAVE_neon_vst4v2si (TARGET_NEON) |
| #define HAVE_neon_vst4v2sf (TARGET_NEON) |
| #define HAVE_neon_vst4di (TARGET_NEON) |
| #define HAVE_neon_vst4qav16qi (TARGET_NEON) |
| #define HAVE_neon_vst4qav8hi (TARGET_NEON) |
| #define HAVE_neon_vst4qav4si (TARGET_NEON) |
| #define HAVE_neon_vst4qav4sf (TARGET_NEON) |
| #define HAVE_neon_vst4qbv16qi (TARGET_NEON) |
| #define HAVE_neon_vst4qbv8hi (TARGET_NEON) |
| #define HAVE_neon_vst4qbv4si (TARGET_NEON) |
| #define HAVE_neon_vst4qbv4sf (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vst4_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vec_unpacks_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacku_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacks_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacku_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacks_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacku_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacks_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacku_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacks_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacku_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacks_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_unpacku_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_smult_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_umult_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_smult_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_umult_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_smult_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_umult_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_smult_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_umult_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_smult_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_umult_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_smult_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_umult_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_sshiftl_v8qi (TARGET_NEON) |
| #define HAVE_neon_vec_ushiftl_v8qi (TARGET_NEON) |
| #define HAVE_neon_vec_sshiftl_v4hi (TARGET_NEON) |
| #define HAVE_neon_vec_ushiftl_v4hi (TARGET_NEON) |
| #define HAVE_neon_vec_sshiftl_v2si (TARGET_NEON) |
| #define HAVE_neon_vec_ushiftl_v2si (TARGET_NEON) |
| #define HAVE_neon_unpacks_v8qi (TARGET_NEON) |
| #define HAVE_neon_unpacku_v8qi (TARGET_NEON) |
| #define HAVE_neon_unpacks_v4hi (TARGET_NEON) |
| #define HAVE_neon_unpacku_v4hi (TARGET_NEON) |
| #define HAVE_neon_unpacks_v2si (TARGET_NEON) |
| #define HAVE_neon_unpacku_v2si (TARGET_NEON) |
| #define HAVE_neon_vec_smult_v8qi (TARGET_NEON) |
| #define HAVE_neon_vec_umult_v8qi (TARGET_NEON) |
| #define HAVE_neon_vec_smult_v4hi (TARGET_NEON) |
| #define HAVE_neon_vec_umult_v4hi (TARGET_NEON) |
| #define HAVE_neon_vec_smult_v2si (TARGET_NEON) |
| #define HAVE_neon_vec_umult_v2si (TARGET_NEON) |
| #define HAVE_vec_pack_trunc_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_pack_trunc_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_pack_trunc_v2di (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_pack_trunc_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_pack_trunc_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vec_pack_trunc_v2di (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_neon_vabdv8qi_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv16qi_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv4hi_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv8hi_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv2si_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv4si_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv2sf_2 (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv4sf_2 (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv2di_2 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv8qi_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv16qi_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv4hi_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv8hi_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv2si_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv4si_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv2sf_3 (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv4sf_3 (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_neon_vabdv2di_3 (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_crypto_aesmc (TARGET_CRYPTO) |
| #define HAVE_crypto_aesimc (TARGET_CRYPTO) |
| #define HAVE_crypto_aesd (TARGET_CRYPTO) |
| #define HAVE_crypto_aese (TARGET_CRYPTO) |
| #define HAVE_crypto_sha1su1 (TARGET_CRYPTO) |
| #define HAVE_crypto_sha256su0 (TARGET_CRYPTO) |
| #define HAVE_crypto_sha1su0 (TARGET_CRYPTO) |
| #define HAVE_crypto_sha256h (TARGET_CRYPTO) |
| #define HAVE_crypto_sha256h2 (TARGET_CRYPTO) |
| #define HAVE_crypto_sha256su1 (TARGET_CRYPTO) |
| #define HAVE_crypto_sha1h (TARGET_CRYPTO) |
| #define HAVE_crypto_vmullp64 (TARGET_CRYPTO) |
| #define HAVE_crypto_sha1c (TARGET_CRYPTO) |
| #define HAVE_crypto_sha1m (TARGET_CRYPTO) |
| #define HAVE_crypto_sha1p (TARGET_CRYPTO) |
| #define HAVE_atomic_loadqi (TARGET_HAVE_LDACQ) |
| #define HAVE_atomic_loadhi (TARGET_HAVE_LDACQ) |
| #define HAVE_atomic_loadsi (TARGET_HAVE_LDACQ) |
| #define HAVE_atomic_storeqi (TARGET_HAVE_LDACQ) |
| #define HAVE_atomic_storehi (TARGET_HAVE_LDACQ) |
| #define HAVE_atomic_storesi (TARGET_HAVE_LDACQ) |
| #define HAVE_atomic_loaddi_1 (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN) |
| #define HAVE_atomic_compare_and_swapqi_1 (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_compare_and_swaphi_1 (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_compare_and_swapsi_1 (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_compare_and_swapdi_1 (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_exchangeqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_exchangehi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_exchangesi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_exchangedi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_addqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_subqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_orqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xorqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_andqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_addhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_subhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_orhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xorhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_andhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_addsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_subsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_orsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xorsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_andsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_adddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_subdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_ordi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xordi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_anddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nandqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nandhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nandsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nanddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_addqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_subqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_orqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_xorqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_andqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_addhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_subhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_orhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_xorhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_andhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_addsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_subsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_orsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_xorsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_andsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_adddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_subdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_ordi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_xordi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_anddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_nandqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_nandhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_nandsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_fetch_nanddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_add_fetchqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_sub_fetchqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_or_fetchqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xor_fetchqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_and_fetchqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_add_fetchhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_sub_fetchhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_or_fetchhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xor_fetchhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_and_fetchhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_add_fetchsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_sub_fetchsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_or_fetchsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xor_fetchsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_and_fetchsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_add_fetchdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_sub_fetchdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_or_fetchdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_xor_fetchdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_and_fetchdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nand_fetchqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nand_fetchhi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nand_fetchsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_nand_fetchdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_arm_load_exclusiveqi (TARGET_HAVE_LDREXBH) |
| #define HAVE_arm_load_exclusivehi (TARGET_HAVE_LDREXBH) |
| #define HAVE_arm_load_acquire_exclusiveqi (TARGET_HAVE_LDACQ) |
| #define HAVE_arm_load_acquire_exclusivehi (TARGET_HAVE_LDACQ) |
| #define HAVE_arm_load_exclusivesi (TARGET_HAVE_LDREX) |
| #define HAVE_arm_load_acquire_exclusivesi (TARGET_HAVE_LDACQ) |
| #define HAVE_arm_load_exclusivedi (TARGET_HAVE_LDREXD) |
| #define HAVE_arm_load_acquire_exclusivedi (TARGET_HAVE_LDACQ && ARM_DOUBLEWORD_ALIGN) |
| #define HAVE_arm_store_exclusiveqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_arm_store_exclusivehi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_arm_store_exclusivesi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_arm_store_exclusivedi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_arm_store_release_exclusivedi (TARGET_HAVE_LDACQ && ARM_DOUBLEWORD_ALIGN) |
| #define HAVE_arm_store_release_exclusiveqi (TARGET_HAVE_LDACQ) |
| #define HAVE_arm_store_release_exclusivehi (TARGET_HAVE_LDACQ) |
| #define HAVE_arm_store_release_exclusivesi (TARGET_HAVE_LDACQ) |
| #define HAVE_addqq3 (TARGET_32BIT) |
| #define HAVE_addhq3 (TARGET_32BIT) |
| #define HAVE_addsq3 (TARGET_32BIT) |
| #define HAVE_adduqq3 (TARGET_32BIT) |
| #define HAVE_adduhq3 (TARGET_32BIT) |
| #define HAVE_addusq3 (TARGET_32BIT) |
| #define HAVE_addha3 (TARGET_32BIT) |
| #define HAVE_addsa3 (TARGET_32BIT) |
| #define HAVE_adduha3 (TARGET_32BIT) |
| #define HAVE_addusa3 (TARGET_32BIT) |
| #define HAVE_addv4qq3 (TARGET_INT_SIMD) |
| #define HAVE_addv2hq3 (TARGET_INT_SIMD) |
| #define HAVE_addv2ha3 (TARGET_INT_SIMD) |
| #define HAVE_usaddv4uqq3 (TARGET_INT_SIMD) |
| #define HAVE_usaddv2uhq3 (TARGET_INT_SIMD) |
| #define HAVE_usadduqq3 (TARGET_INT_SIMD) |
| #define HAVE_usadduhq3 (TARGET_INT_SIMD) |
| #define HAVE_usaddv2uha3 (TARGET_INT_SIMD) |
| #define HAVE_usadduha3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddv4qq3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddv2hq3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddqq3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddhq3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddv2ha3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddha3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddsq3 (TARGET_INT_SIMD) |
| #define HAVE_ssaddsa3 (TARGET_INT_SIMD) |
| #define HAVE_subqq3 (TARGET_32BIT) |
| #define HAVE_subhq3 (TARGET_32BIT) |
| #define HAVE_subsq3 (TARGET_32BIT) |
| #define HAVE_subuqq3 (TARGET_32BIT) |
| #define HAVE_subuhq3 (TARGET_32BIT) |
| #define HAVE_subusq3 (TARGET_32BIT) |
| #define HAVE_subha3 (TARGET_32BIT) |
| #define HAVE_subsa3 (TARGET_32BIT) |
| #define HAVE_subuha3 (TARGET_32BIT) |
| #define HAVE_subusa3 (TARGET_32BIT) |
| #define HAVE_subv4qq3 (TARGET_INT_SIMD) |
| #define HAVE_subv2hq3 (TARGET_INT_SIMD) |
| #define HAVE_subv2ha3 (TARGET_INT_SIMD) |
| #define HAVE_ussubv4uqq3 (TARGET_INT_SIMD) |
| #define HAVE_ussubv2uhq3 (TARGET_INT_SIMD) |
| #define HAVE_ussubuqq3 (TARGET_INT_SIMD) |
| #define HAVE_ussubuhq3 (TARGET_INT_SIMD) |
| #define HAVE_ussubv2uha3 (TARGET_INT_SIMD) |
| #define HAVE_ussubuha3 (TARGET_INT_SIMD) |
| #define HAVE_sssubv4qq3 (TARGET_INT_SIMD) |
| #define HAVE_sssubv2hq3 (TARGET_INT_SIMD) |
| #define HAVE_sssubqq3 (TARGET_INT_SIMD) |
| #define HAVE_sssubhq3 (TARGET_INT_SIMD) |
| #define HAVE_sssubv2ha3 (TARGET_INT_SIMD) |
| #define HAVE_sssubha3 (TARGET_INT_SIMD) |
| #define HAVE_sssubsq3 (TARGET_INT_SIMD) |
| #define HAVE_sssubsa3 (TARGET_INT_SIMD) |
| #define HAVE_ssmulsa3 (TARGET_32BIT && arm_arch6) |
| #define HAVE_usmulusa3 (TARGET_32BIT && arm_arch6) |
| #define HAVE_arm_ssatsihi_shift (TARGET_32BIT && arm_arch6) |
| #define HAVE_arm_usatsihi (TARGET_INT_SIMD) |
| #define HAVE_adddi3 1 |
| #define HAVE_addsi3 1 |
| #define HAVE_addsf3 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_adddf3 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_subdi3 1 |
| #define HAVE_subsi3 1 |
| #define HAVE_subsf3 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_subdf3 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_mulhi3 (TARGET_DSP_MULTIPLY) |
| #define HAVE_mulsi3 1 |
| #define HAVE_maddsidi4 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_mulsidi3 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_umulsidi3 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_umaddsidi4 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_smulsi3_highpart (TARGET_32BIT && arm_arch3m) |
| #define HAVE_umulsi3_highpart (TARGET_32BIT && arm_arch3m) |
| #define HAVE_mulsf3 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_muldf3 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_divsf3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP) |
| #define HAVE_divdf3 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE) |
| #define HAVE_anddi3 (TARGET_32BIT) |
| #define HAVE_andsi3 1 |
| #define HAVE_insv (TARGET_ARM || arm_arch_thumb2) |
| #define HAVE_iordi3 (TARGET_32BIT) |
| #define HAVE_iorsi3 1 |
| #define HAVE_xordi3 (TARGET_32BIT) |
| #define HAVE_xorsi3 1 |
| #define HAVE_smaxsi3 (TARGET_32BIT) |
| #define HAVE_sminsi3 (TARGET_32BIT) |
| #define HAVE_umaxsi3 (TARGET_32BIT) |
| #define HAVE_uminsi3 (TARGET_32BIT) |
| #define HAVE_ashldi3 (TARGET_32BIT) |
| #define HAVE_ashlsi3 1 |
| #define HAVE_ashrdi3 (TARGET_32BIT) |
| #define HAVE_ashrsi3 1 |
| #define HAVE_lshrdi3 (TARGET_32BIT) |
| #define HAVE_lshrsi3 1 |
| #define HAVE_rotlsi3 (TARGET_32BIT) |
| #define HAVE_rotrsi3 1 |
| #define HAVE_extzv (TARGET_THUMB1 || arm_arch_thumb2) |
| #define HAVE_extzv_t1 (TARGET_THUMB1) |
| #define HAVE_extv (arm_arch_thumb2) |
| #define HAVE_extv_regsi 1 |
| #define HAVE_negdi2 1 |
| #define HAVE_negsi2 1 |
| #define HAVE_negsf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP) |
| #define HAVE_negdf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE) |
| #define HAVE_abssi2 1 |
| #define HAVE_abssf2 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_absdf2 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_sqrtsf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP) |
| #define HAVE_sqrtdf2 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE) |
| #define HAVE_one_cmplsi2 1 |
| #define HAVE_floatsihf2 1 |
| #define HAVE_floatdihf2 1 |
| #define HAVE_floatsisf2 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_floatsidf2 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_fix_trunchfsi2 1 |
| #define HAVE_fix_trunchfdi2 1 |
| #define HAVE_fix_truncsfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_fix_truncdfsi2 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_truncdfsf2 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_truncdfhf2 1 |
| #define HAVE_zero_extendhisi2 1 |
| #define HAVE_zero_extendqisi2 1 |
| #define HAVE_extendhisi2 1 |
| #define HAVE_extendhisi2_mem (TARGET_ARM) |
| #define HAVE_extendqihi2 (TARGET_ARM) |
| #define HAVE_extendqisi2 1 |
| #define HAVE_extendsfdf2 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_extendhfdf2 1 |
| #define HAVE_movdi 1 |
| #define HAVE_movsi 1 |
| #define HAVE_calculate_pic_address (flag_pic) |
| #define HAVE_builtin_setjmp_receiver (flag_pic) |
| #define HAVE_storehi (TARGET_ARM) |
| #define HAVE_storehi_bigend (TARGET_ARM) |
| #define HAVE_storeinthi (TARGET_ARM) |
| #define HAVE_storehi_single_op (TARGET_32BIT && arm_arch4) |
| #define HAVE_movhi 1 |
| #define HAVE_movhi_bytes (TARGET_ARM) |
| #define HAVE_movhi_bigend (TARGET_ARM) |
| #define HAVE_thumb_movhi_clobber (TARGET_THUMB1) |
| #define HAVE_reload_outhi 1 |
| #define HAVE_reload_inhi 1 |
| #define HAVE_movqi 1 |
| #define HAVE_movhf 1 |
| #define HAVE_movsf 1 |
| #define HAVE_movdf 1 |
| #define HAVE_reload_outdf (TARGET_THUMB2) |
| #define HAVE_load_multiple (TARGET_32BIT) |
| #define HAVE_store_multiple (TARGET_32BIT) |
| #define HAVE_movmemqi 1 |
| #define HAVE_cbranchsi4 1 |
| #define HAVE_cbranchqi4 (TARGET_THUMB1) |
| #define HAVE_cbranchsf4 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_cbranchdf4 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_cbranchdi4 (TARGET_32BIT) |
| #define HAVE_cbranch_cc (TARGET_32BIT) |
| #define HAVE_cstore_cc (TARGET_32BIT) |
| #define HAVE_cstoresi4 (TARGET_32BIT || TARGET_THUMB1) |
| #define HAVE_cstoresf4 (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_cstoredf4 (TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE) |
| #define HAVE_cstoredi4 (TARGET_32BIT) |
| #define HAVE_cstoresi_eq0_thumb1 (TARGET_THUMB1) |
| #define HAVE_cstoresi_ne0_thumb1 (TARGET_THUMB1) |
| #define HAVE_movsicc (TARGET_32BIT) |
| #define HAVE_movsfcc (TARGET_32BIT && TARGET_HARD_FLOAT) |
| #define HAVE_movdfcc (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE) |
| #define HAVE_jump 1 |
| #define HAVE_call 1 |
| #define HAVE_call_internal 1 |
| #define HAVE_call_value 1 |
| #define HAVE_call_value_internal 1 |
| #define HAVE_sibcall (TARGET_32BIT) |
| #define HAVE_sibcall_value (TARGET_32BIT) |
| #define HAVE_return ((TARGET_ARM || (TARGET_THUMB2 \ |
| && ARM_FUNC_TYPE (arm_current_func_type ()) == ARM_FT_NORMAL \ |
| && !IS_STACKALIGN (arm_current_func_type ()))) \ |
| && USE_RETURN_INSN (FALSE)) |
| #define HAVE_simple_return ((TARGET_ARM || (TARGET_THUMB2 \ |
| && ARM_FUNC_TYPE (arm_current_func_type ()) == ARM_FT_NORMAL \ |
| && !IS_STACKALIGN (arm_current_func_type ()))) \ |
| && use_simple_return_p ()) |
| #define HAVE_return_addr_mask (TARGET_ARM) |
| #define HAVE_untyped_call 1 |
| #define HAVE_untyped_return 1 |
| #define HAVE_casesi (TARGET_32BIT || optimize_size || flag_pic) |
| #define HAVE_thumb1_casesi_internal_pic (TARGET_THUMB1) |
| #define HAVE_indirect_jump 1 |
| #define HAVE_prologue 1 |
| #define HAVE_epilogue 1 |
| #define HAVE_sibcall_epilogue (TARGET_32BIT) |
| #define HAVE_eh_epilogue 1 |
| #define HAVE_tablejump (TARGET_THUMB1) |
| #define HAVE_ctzsi2 (TARGET_32BIT && arm_arch_thumb2) |
| #define HAVE_eh_return 1 |
| #define HAVE_get_thread_pointersi 1 |
| #define HAVE_arm_legacy_rev (TARGET_32BIT) |
| #define HAVE_thumb_legacy_rev (TARGET_THUMB) |
| #define HAVE_bswapsi2 (TARGET_EITHER && (arm_arch6 || !optimize_size)) |
| #define HAVE_bswaphi2 (arm_arch6) |
| #define HAVE_movv2di (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode))) |
| #define HAVE_movv2si (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_movv4hi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_movv8qi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_movv2sf (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode))) |
| #define HAVE_movv4si (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_movv8hi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_movv16qi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_movv4sf (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode))) |
| #define HAVE_addv2di3 ((TARGET_NEON && ((V2DImode != V2SFmode && V2DImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode))) |
| #define HAVE_addv2si3 ((TARGET_NEON && ((V2SImode != V2SFmode && V2SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_addv4hi3 ((TARGET_NEON && ((V4HImode != V2SFmode && V4HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_addv8qi3 ((TARGET_NEON && ((V8QImode != V2SFmode && V8QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_addv2sf3 ((TARGET_NEON && ((V2SFmode != V2SFmode && V2SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode))) |
| #define HAVE_addv4si3 ((TARGET_NEON && ((V4SImode != V2SFmode && V4SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_addv8hi3 ((TARGET_NEON && ((V8HImode != V2SFmode && V8HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_addv16qi3 ((TARGET_NEON && ((V16QImode != V2SFmode && V16QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_addv4sf3 ((TARGET_NEON && ((V4SFmode != V2SFmode && V4SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode))) |
| #define HAVE_subv2di3 ((TARGET_NEON && ((V2DImode != V2SFmode && V2DImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode))) |
| #define HAVE_subv2si3 ((TARGET_NEON && ((V2SImode != V2SFmode && V2SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_subv4hi3 ((TARGET_NEON && ((V4HImode != V2SFmode && V4HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_subv8qi3 ((TARGET_NEON && ((V8QImode != V2SFmode && V8QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_subv2sf3 ((TARGET_NEON && ((V2SFmode != V2SFmode && V2SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode))) |
| #define HAVE_subv4si3 ((TARGET_NEON && ((V4SImode != V2SFmode && V4SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_subv8hi3 ((TARGET_NEON && ((V8HImode != V2SFmode && V8HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_subv16qi3 ((TARGET_NEON && ((V16QImode != V2SFmode && V16QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_subv4sf3 ((TARGET_NEON && ((V4SFmode != V2SFmode && V4SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode))) |
| #define HAVE_mulv2si3 ((TARGET_NEON && ((V2SImode != V2SFmode && V2SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V2SImode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv4hi3 ((TARGET_NEON && ((V4HImode != V2SFmode && V4HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V4HImode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv8qi3 ((TARGET_NEON && ((V8QImode != V2SFmode && V8QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V8QImode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv2sf3 ((TARGET_NEON && ((V2SFmode != V2SFmode && V2SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V2SFmode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv4si3 ((TARGET_NEON && ((V4SImode != V2SFmode && V4SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V4SImode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv8hi3 ((TARGET_NEON && ((V8HImode != V2SFmode && V8HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V8HImode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv16qi3 ((TARGET_NEON && ((V16QImode != V2SFmode && V16QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V16QImode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_mulv4sf3 ((TARGET_NEON && ((V4SFmode != V2SFmode && V4SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (V4SFmode == V4HImode && TARGET_REALLY_IWMMXT)) |
| #define HAVE_sminv2si3 ((TARGET_NEON && ((V2SImode != V2SFmode && V2SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_sminv4hi3 ((TARGET_NEON && ((V4HImode != V2SFmode && V4HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_sminv8qi3 ((TARGET_NEON && ((V8QImode != V2SFmode && V8QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_sminv2sf3 ((TARGET_NEON && ((V2SFmode != V2SFmode && V2SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode))) |
| #define HAVE_sminv4si3 ((TARGET_NEON && ((V4SImode != V2SFmode && V4SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_sminv8hi3 ((TARGET_NEON && ((V8HImode != V2SFmode && V8HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_sminv16qi3 ((TARGET_NEON && ((V16QImode != V2SFmode && V16QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_sminv4sf3 ((TARGET_NEON && ((V4SFmode != V2SFmode && V4SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode))) |
| #define HAVE_uminv2si3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_uminv4hi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_uminv8qi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_uminv4si3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_uminv8hi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_uminv16qi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_smaxv2si3 ((TARGET_NEON && ((V2SImode != V2SFmode && V2SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_smaxv4hi3 ((TARGET_NEON && ((V4HImode != V2SFmode && V4HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_smaxv8qi3 ((TARGET_NEON && ((V8QImode != V2SFmode && V8QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_smaxv2sf3 ((TARGET_NEON && ((V2SFmode != V2SFmode && V2SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode))) |
| #define HAVE_smaxv4si3 ((TARGET_NEON && ((V4SImode != V2SFmode && V4SImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_smaxv8hi3 ((TARGET_NEON && ((V8HImode != V2SFmode && V8HImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_smaxv16qi3 ((TARGET_NEON && ((V16QImode != V2SFmode && V16QImode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_smaxv4sf3 ((TARGET_NEON && ((V4SFmode != V2SFmode && V4SFmode != V4SFmode) \ |
| || flag_unsafe_math_optimizations)) \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode))) |
| #define HAVE_umaxv2si3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_umaxv4hi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_umaxv8qi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_umaxv4si3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_umaxv8hi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_umaxv16qi3 (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_vec_perm_constv2di (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2DImode))) |
| #define HAVE_vec_perm_constv2si (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SImode))) |
| #define HAVE_vec_perm_constv4hi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4HImode))) |
| #define HAVE_vec_perm_constv8qi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8QImode))) |
| #define HAVE_vec_perm_constv2sf (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V2SFmode))) |
| #define HAVE_vec_perm_constv4si (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SImode))) |
| #define HAVE_vec_perm_constv8hi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V8HImode))) |
| #define HAVE_vec_perm_constv16qi (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V16QImode))) |
| #define HAVE_vec_perm_constv4sf (TARGET_NEON \ |
| || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (V4SFmode))) |
| #define HAVE_vec_permv8qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_permv16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_iwmmxt_setwcgr0 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_setwcgr1 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_setwcgr2 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_setwcgr3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_getwcgr0 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_getwcgr1 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_getwcgr2 (TARGET_REALLY_IWMMXT) |
| #define HAVE_iwmmxt_getwcgr3 (TARGET_REALLY_IWMMXT) |
| #define HAVE_doloop_end (TARGET_32BIT) |
| #define HAVE_movti (TARGET_NEON) |
| #define HAVE_movei (TARGET_NEON) |
| #define HAVE_movoi (TARGET_NEON) |
| #define HAVE_movci (TARGET_NEON) |
| #define HAVE_movxi (TARGET_NEON) |
| #define HAVE_movmisalignv8qi (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv16qi (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv4hi (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv8hi (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv2si (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv4si (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv2sf (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv4sf (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisaligndi (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_movmisalignv2di (TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access) |
| #define HAVE_vec_setv8qi (TARGET_NEON) |
| #define HAVE_vec_setv16qi (TARGET_NEON) |
| #define HAVE_vec_setv4hi (TARGET_NEON) |
| #define HAVE_vec_setv8hi (TARGET_NEON) |
| #define HAVE_vec_setv2si (TARGET_NEON) |
| #define HAVE_vec_setv4si (TARGET_NEON) |
| #define HAVE_vec_setv2sf (TARGET_NEON) |
| #define HAVE_vec_setv4sf (TARGET_NEON) |
| #define HAVE_vec_setv2di (TARGET_NEON) |
| #define HAVE_vec_initv8qi (TARGET_NEON) |
| #define HAVE_vec_initv16qi (TARGET_NEON) |
| #define HAVE_vec_initv4hi (TARGET_NEON) |
| #define HAVE_vec_initv8hi (TARGET_NEON) |
| #define HAVE_vec_initv2si (TARGET_NEON) |
| #define HAVE_vec_initv4si (TARGET_NEON) |
| #define HAVE_vec_initv2sf (TARGET_NEON) |
| #define HAVE_vec_initv4sf (TARGET_NEON) |
| #define HAVE_vec_initv2di (TARGET_NEON) |
| #define HAVE_vashrv8qi3 (TARGET_NEON) |
| #define HAVE_vashrv16qi3 (TARGET_NEON) |
| #define HAVE_vashrv4hi3 (TARGET_NEON) |
| #define HAVE_vashrv8hi3 (TARGET_NEON) |
| #define HAVE_vashrv2si3 (TARGET_NEON) |
| #define HAVE_vashrv4si3 (TARGET_NEON) |
| #define HAVE_vlshrv8qi3 (TARGET_NEON) |
| #define HAVE_vlshrv16qi3 (TARGET_NEON) |
| #define HAVE_vlshrv4hi3 (TARGET_NEON) |
| #define HAVE_vlshrv8hi3 (TARGET_NEON) |
| #define HAVE_vlshrv2si3 (TARGET_NEON) |
| #define HAVE_vlshrv4si3 (TARGET_NEON) |
| #define HAVE_vec_shr_v8qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v4hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v2si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v2sf (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v4sf (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shr_v2di (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v8qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v4hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v2si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v2sf (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v4sf (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_shl_v2di (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_move_hi_quad_v2di (TARGET_NEON) |
| #define HAVE_move_hi_quad_v2df (TARGET_NEON) |
| #define HAVE_move_hi_quad_v16qi (TARGET_NEON) |
| #define HAVE_move_hi_quad_v8hi (TARGET_NEON) |
| #define HAVE_move_hi_quad_v4si (TARGET_NEON) |
| #define HAVE_move_hi_quad_v4sf (TARGET_NEON) |
| #define HAVE_move_lo_quad_v2di (TARGET_NEON) |
| #define HAVE_move_lo_quad_v2df (TARGET_NEON) |
| #define HAVE_move_lo_quad_v16qi (TARGET_NEON) |
| #define HAVE_move_lo_quad_v8hi (TARGET_NEON) |
| #define HAVE_move_lo_quad_v4si (TARGET_NEON) |
| #define HAVE_move_lo_quad_v4sf (TARGET_NEON) |
| #define HAVE_reduc_splus_v8qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_splus_v4hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_splus_v2si (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_splus_v2sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_splus_v16qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_splus_v8hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_splus_v4si (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_splus_v4sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_uplus_v8qi (TARGET_NEON && (true || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_uplus_v16qi (TARGET_NEON && (false || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_uplus_v4hi (TARGET_NEON && (true || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_uplus_v8hi (TARGET_NEON && (false || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_uplus_v2si (TARGET_NEON && (true || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_uplus_v4si (TARGET_NEON && (false || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_uplus_v2di (TARGET_NEON && (false || !BYTES_BIG_ENDIAN)) |
| #define HAVE_reduc_smin_v8qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smin_v4hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smin_v2si (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smin_v2sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smin_v16qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smin_v8hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smin_v4si (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smin_v4sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smax_v8qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smax_v4hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smax_v2si (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smax_v2sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_reduc_smax_v16qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smax_v8hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smax_v4si (TARGET_NEON && (!false || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_smax_v4sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations) \ |
| && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_umin_v8qi (TARGET_NEON) |
| #define HAVE_reduc_umin_v4hi (TARGET_NEON) |
| #define HAVE_reduc_umin_v2si (TARGET_NEON) |
| #define HAVE_reduc_umin_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_umin_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_umin_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_umax_v8qi (TARGET_NEON) |
| #define HAVE_reduc_umax_v4hi (TARGET_NEON) |
| #define HAVE_reduc_umax_v2si (TARGET_NEON) |
| #define HAVE_reduc_umax_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_umax_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_reduc_umax_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vcondv8qiv8qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv16qiv16qi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv4hiv4hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv8hiv8hi (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv2siv2si (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv4siv4si (TARGET_NEON && (!false || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv2sfv2sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_vcondv4sfv4sf (TARGET_NEON && (!true || flag_unsafe_math_optimizations)) |
| #define HAVE_vconduv8qiv8qi (TARGET_NEON) |
| #define HAVE_vconduv16qiv16qi (TARGET_NEON) |
| #define HAVE_vconduv4hiv4hi (TARGET_NEON) |
| #define HAVE_vconduv8hiv8hi (TARGET_NEON) |
| #define HAVE_vconduv2siv2si (TARGET_NEON) |
| #define HAVE_vconduv4siv4si (TARGET_NEON) |
| #define HAVE_neon_vaddv8qi (TARGET_NEON) |
| #define HAVE_neon_vaddv16qi (TARGET_NEON) |
| #define HAVE_neon_vaddv4hi (TARGET_NEON) |
| #define HAVE_neon_vaddv8hi (TARGET_NEON) |
| #define HAVE_neon_vaddv2si (TARGET_NEON) |
| #define HAVE_neon_vaddv4si (TARGET_NEON) |
| #define HAVE_neon_vaddv2sf (TARGET_NEON) |
| #define HAVE_neon_vaddv4sf (TARGET_NEON) |
| #define HAVE_neon_vadddi (TARGET_NEON) |
| #define HAVE_neon_vaddv2di (TARGET_NEON) |
| #define HAVE_neon_vmlav8qi (TARGET_NEON) |
| #define HAVE_neon_vmlav16qi (TARGET_NEON) |
| #define HAVE_neon_vmlav4hi (TARGET_NEON) |
| #define HAVE_neon_vmlav8hi (TARGET_NEON) |
| #define HAVE_neon_vmlav2si (TARGET_NEON) |
| #define HAVE_neon_vmlav4si (TARGET_NEON) |
| #define HAVE_neon_vmlav2sf (TARGET_NEON) |
| #define HAVE_neon_vmlav4sf (TARGET_NEON) |
| #define HAVE_neon_vfmav2sf (TARGET_NEON && TARGET_FMA) |
| #define HAVE_neon_vfmav4sf (TARGET_NEON && TARGET_FMA) |
| #define HAVE_neon_vfmsv2sf (TARGET_NEON && TARGET_FMA) |
| #define HAVE_neon_vfmsv4sf (TARGET_NEON && TARGET_FMA) |
| #define HAVE_neon_vmlsv8qi (TARGET_NEON) |
| #define HAVE_neon_vmlsv16qi (TARGET_NEON) |
| #define HAVE_neon_vmlsv4hi (TARGET_NEON) |
| #define HAVE_neon_vmlsv8hi (TARGET_NEON) |
| #define HAVE_neon_vmlsv2si (TARGET_NEON) |
| #define HAVE_neon_vmlsv4si (TARGET_NEON) |
| #define HAVE_neon_vmlsv2sf (TARGET_NEON) |
| #define HAVE_neon_vmlsv4sf (TARGET_NEON) |
| #define HAVE_neon_vsubv8qi (TARGET_NEON) |
| #define HAVE_neon_vsubv16qi (TARGET_NEON) |
| #define HAVE_neon_vsubv4hi (TARGET_NEON) |
| #define HAVE_neon_vsubv8hi (TARGET_NEON) |
| #define HAVE_neon_vsubv2si (TARGET_NEON) |
| #define HAVE_neon_vsubv4si (TARGET_NEON) |
| #define HAVE_neon_vsubv2sf (TARGET_NEON) |
| #define HAVE_neon_vsubv4sf (TARGET_NEON) |
| #define HAVE_neon_vsubdi (TARGET_NEON) |
| #define HAVE_neon_vsubv2di (TARGET_NEON) |
| #define HAVE_neon_vpaddv8qi (TARGET_NEON) |
| #define HAVE_neon_vpaddv4hi (TARGET_NEON) |
| #define HAVE_neon_vpaddv2si (TARGET_NEON) |
| #define HAVE_neon_vpaddv2sf (TARGET_NEON) |
| #define HAVE_neon_vabsv8qi (TARGET_NEON) |
| #define HAVE_neon_vabsv16qi (TARGET_NEON) |
| #define HAVE_neon_vabsv4hi (TARGET_NEON) |
| #define HAVE_neon_vabsv8hi (TARGET_NEON) |
| #define HAVE_neon_vabsv2si (TARGET_NEON) |
| #define HAVE_neon_vabsv4si (TARGET_NEON) |
| #define HAVE_neon_vabsv2sf (TARGET_NEON) |
| #define HAVE_neon_vabsv4sf (TARGET_NEON) |
| #define HAVE_neon_vnegv8qi (TARGET_NEON) |
| #define HAVE_neon_vnegv16qi (TARGET_NEON) |
| #define HAVE_neon_vnegv4hi (TARGET_NEON) |
| #define HAVE_neon_vnegv8hi (TARGET_NEON) |
| #define HAVE_neon_vnegv2si (TARGET_NEON) |
| #define HAVE_neon_vnegv4si (TARGET_NEON) |
| #define HAVE_neon_vnegv2sf (TARGET_NEON) |
| #define HAVE_neon_vnegv4sf (TARGET_NEON) |
| #define HAVE_neon_vclzv8qi (TARGET_NEON) |
| #define HAVE_neon_vclzv16qi (TARGET_NEON) |
| #define HAVE_neon_vclzv4hi (TARGET_NEON) |
| #define HAVE_neon_vclzv8hi (TARGET_NEON) |
| #define HAVE_neon_vclzv2si (TARGET_NEON) |
| #define HAVE_neon_vclzv4si (TARGET_NEON) |
| #define HAVE_neon_vcntv8qi (TARGET_NEON) |
| #define HAVE_neon_vcntv16qi (TARGET_NEON) |
| #define HAVE_neon_vmvnv8qi (TARGET_NEON) |
| #define HAVE_neon_vmvnv16qi (TARGET_NEON) |
| #define HAVE_neon_vmvnv4hi (TARGET_NEON) |
| #define HAVE_neon_vmvnv8hi (TARGET_NEON) |
| #define HAVE_neon_vmvnv2si (TARGET_NEON) |
| #define HAVE_neon_vmvnv4si (TARGET_NEON) |
| #define HAVE_neon_vget_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vget_lanev16qi (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vget_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vget_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vget_lanedi (TARGET_NEON) |
| #define HAVE_neon_vget_lanev2di (TARGET_NEON) |
| #define HAVE_neon_vset_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vset_lanev16qi (TARGET_NEON) |
| #define HAVE_neon_vset_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vset_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vset_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vset_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vset_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vset_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vset_lanev2di (TARGET_NEON) |
| #define HAVE_neon_vset_lanedi (TARGET_NEON) |
| #define HAVE_neon_vcreatev8qi (TARGET_NEON) |
| #define HAVE_neon_vcreatev4hi (TARGET_NEON) |
| #define HAVE_neon_vcreatev2si (TARGET_NEON) |
| #define HAVE_neon_vcreatev2sf (TARGET_NEON) |
| #define HAVE_neon_vcreatedi (TARGET_NEON) |
| #define HAVE_neon_vdup_ndi (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev8qi (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev16qi (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev4hi (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev8hi (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev2si (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev4si (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev2sf (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev4sf (TARGET_NEON) |
| #define HAVE_neon_vdup_lanedi (TARGET_NEON) |
| #define HAVE_neon_vdup_lanev2di (TARGET_NEON) |
| #define HAVE_neon_vget_highv16qi (TARGET_NEON) |
| #define HAVE_neon_vget_highv8hi (TARGET_NEON) |
| #define HAVE_neon_vget_highv4si (TARGET_NEON) |
| #define HAVE_neon_vget_highv4sf (TARGET_NEON) |
| #define HAVE_neon_vget_highv2di (TARGET_NEON) |
| #define HAVE_neon_vget_lowv16qi (TARGET_NEON) |
| #define HAVE_neon_vget_lowv8hi (TARGET_NEON) |
| #define HAVE_neon_vget_lowv4si (TARGET_NEON) |
| #define HAVE_neon_vget_lowv4sf (TARGET_NEON) |
| #define HAVE_neon_vget_lowv2di (TARGET_NEON) |
| #define HAVE_neon_vmul_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vmul_nv2si (TARGET_NEON) |
| #define HAVE_neon_vmul_nv2sf (TARGET_NEON) |
| #define HAVE_neon_vmul_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vmul_nv4si (TARGET_NEON) |
| #define HAVE_neon_vmul_nv4sf (TARGET_NEON) |
| #define HAVE_neon_vmull_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vmull_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmull_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmull_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vqdmulh_nv4si (TARGET_NEON) |
| #define HAVE_neon_vmla_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vmla_nv2si (TARGET_NEON) |
| #define HAVE_neon_vmla_nv2sf (TARGET_NEON) |
| #define HAVE_neon_vmla_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vmla_nv4si (TARGET_NEON) |
| #define HAVE_neon_vmla_nv4sf (TARGET_NEON) |
| #define HAVE_neon_vmlal_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vmlal_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmlal_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmlal_nv2si (TARGET_NEON) |
| #define HAVE_neon_vmls_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vmls_nv2si (TARGET_NEON) |
| #define HAVE_neon_vmls_nv2sf (TARGET_NEON) |
| #define HAVE_neon_vmls_nv8hi (TARGET_NEON) |
| #define HAVE_neon_vmls_nv4si (TARGET_NEON) |
| #define HAVE_neon_vmls_nv4sf (TARGET_NEON) |
| #define HAVE_neon_vmlsl_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vmlsl_nv2si (TARGET_NEON) |
| #define HAVE_neon_vqdmlsl_nv4hi (TARGET_NEON) |
| #define HAVE_neon_vqdmlsl_nv2si (TARGET_NEON) |
| #define HAVE_neon_vbslv8qi (TARGET_NEON) |
| #define HAVE_neon_vbslv16qi (TARGET_NEON) |
| #define HAVE_neon_vbslv4hi (TARGET_NEON) |
| #define HAVE_neon_vbslv8hi (TARGET_NEON) |
| #define HAVE_neon_vbslv2si (TARGET_NEON) |
| #define HAVE_neon_vbslv4si (TARGET_NEON) |
| #define HAVE_neon_vbslv2sf (TARGET_NEON) |
| #define HAVE_neon_vbslv4sf (TARGET_NEON) |
| #define HAVE_neon_vbsldi (TARGET_NEON) |
| #define HAVE_neon_vbslv2di (TARGET_NEON) |
| #define HAVE_neon_vtrnv8qi_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv16qi_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv4hi_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv8hi_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv2si_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv4si_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv2sf_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv4sf_internal (TARGET_NEON) |
| #define HAVE_neon_vtrnv8qi (TARGET_NEON) |
| #define HAVE_neon_vtrnv16qi (TARGET_NEON) |
| #define HAVE_neon_vtrnv4hi (TARGET_NEON) |
| #define HAVE_neon_vtrnv8hi (TARGET_NEON) |
| #define HAVE_neon_vtrnv2si (TARGET_NEON) |
| #define HAVE_neon_vtrnv4si (TARGET_NEON) |
| #define HAVE_neon_vtrnv2sf (TARGET_NEON) |
| #define HAVE_neon_vtrnv4sf (TARGET_NEON) |
| #define HAVE_neon_vzipv8qi_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv16qi_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv4hi_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv8hi_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv2si_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv4si_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv2sf_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv4sf_internal (TARGET_NEON) |
| #define HAVE_neon_vzipv8qi (TARGET_NEON) |
| #define HAVE_neon_vzipv16qi (TARGET_NEON) |
| #define HAVE_neon_vzipv4hi (TARGET_NEON) |
| #define HAVE_neon_vzipv8hi (TARGET_NEON) |
| #define HAVE_neon_vzipv2si (TARGET_NEON) |
| #define HAVE_neon_vzipv4si (TARGET_NEON) |
| #define HAVE_neon_vzipv2sf (TARGET_NEON) |
| #define HAVE_neon_vzipv4sf (TARGET_NEON) |
| #define HAVE_neon_vuzpv8qi_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv16qi_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv4hi_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv8hi_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv2si_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv4si_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv2sf_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv4sf_internal (TARGET_NEON) |
| #define HAVE_neon_vuzpv8qi (TARGET_NEON) |
| #define HAVE_neon_vuzpv16qi (TARGET_NEON) |
| #define HAVE_neon_vuzpv4hi (TARGET_NEON) |
| #define HAVE_neon_vuzpv8hi (TARGET_NEON) |
| #define HAVE_neon_vuzpv2si (TARGET_NEON) |
| #define HAVE_neon_vuzpv4si (TARGET_NEON) |
| #define HAVE_neon_vuzpv2sf (TARGET_NEON) |
| #define HAVE_neon_vuzpv4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8qiv8qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8qiv4hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8qiv2si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8qiv2sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8qidi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4hiv8qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4hiv4hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4hiv2si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4hiv2sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4hidi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2siv8qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2siv4hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2siv2si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2siv2sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2sidi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2sfv8qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2sfv4hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2sfv2si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2sfv2sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2sfdi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretdiv8qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretdiv4hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretdiv2si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretdiv2sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretdidi (TARGET_NEON) |
| #define HAVE_neon_vreinterprettiv16qi (TARGET_NEON) |
| #define HAVE_neon_vreinterprettiv8hi (TARGET_NEON) |
| #define HAVE_neon_vreinterprettiv4si (TARGET_NEON) |
| #define HAVE_neon_vreinterprettiv4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterprettiv2di (TARGET_NEON) |
| #define HAVE_neon_vreinterprettiti (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv16qiv16qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv16qiv8hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv16qiv4si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv16qiv4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv16qiv2di (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv16qiti (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8hiv16qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8hiv8hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8hiv4si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8hiv4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8hiv2di (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv8hiti (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4siv16qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4siv8hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4siv4si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4siv4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4siv2di (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4siti (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4sfv16qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4sfv8hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4sfv4si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4sfv4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4sfv2di (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv4sfti (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2div16qi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2div8hi (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2div4si (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2div4sf (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2div2di (TARGET_NEON) |
| #define HAVE_neon_vreinterpretv2diti (TARGET_NEON) |
| #define HAVE_vec_load_lanesv8qiv8qi (TARGET_NEON) |
| #define HAVE_vec_load_lanesv16qiv16qi (TARGET_NEON) |
| #define HAVE_vec_load_lanesv4hiv4hi (TARGET_NEON) |
| #define HAVE_vec_load_lanesv8hiv8hi (TARGET_NEON) |
| #define HAVE_vec_load_lanesv2siv2si (TARGET_NEON) |
| #define HAVE_vec_load_lanesv4siv4si (TARGET_NEON) |
| #define HAVE_vec_load_lanesv2sfv2sf (TARGET_NEON) |
| #define HAVE_vec_load_lanesv4sfv4sf (TARGET_NEON) |
| #define HAVE_vec_load_lanesdidi (TARGET_NEON) |
| #define HAVE_vec_load_lanesv2div2di (TARGET_NEON) |
| #define HAVE_neon_vld1_dupdi (TARGET_NEON) |
| #define HAVE_vec_store_lanesv8qiv8qi (TARGET_NEON) |
| #define HAVE_vec_store_lanesv16qiv16qi (TARGET_NEON) |
| #define HAVE_vec_store_lanesv4hiv4hi (TARGET_NEON) |
| #define HAVE_vec_store_lanesv8hiv8hi (TARGET_NEON) |
| #define HAVE_vec_store_lanesv2siv2si (TARGET_NEON) |
| #define HAVE_vec_store_lanesv4siv4si (TARGET_NEON) |
| #define HAVE_vec_store_lanesv2sfv2sf (TARGET_NEON) |
| #define HAVE_vec_store_lanesv4sfv4sf (TARGET_NEON) |
| #define HAVE_vec_store_lanesdidi (TARGET_NEON) |
| #define HAVE_vec_store_lanesv2div2di (TARGET_NEON) |
| #define HAVE_vec_load_lanestiv8qi (TARGET_NEON) |
| #define HAVE_vec_load_lanestiv4hi (TARGET_NEON) |
| #define HAVE_vec_load_lanestiv2si (TARGET_NEON) |
| #define HAVE_vec_load_lanestiv2sf (TARGET_NEON) |
| #define HAVE_vec_load_lanestidi (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv16qi (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv8hi (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv4si (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv4sf (TARGET_NEON) |
| #define HAVE_vec_store_lanestiv8qi (TARGET_NEON) |
| #define HAVE_vec_store_lanestiv4hi (TARGET_NEON) |
| #define HAVE_vec_store_lanestiv2si (TARGET_NEON) |
| #define HAVE_vec_store_lanestiv2sf (TARGET_NEON) |
| #define HAVE_vec_store_lanestidi (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv16qi (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv8hi (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv4si (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv4sf (TARGET_NEON) |
| #define HAVE_vec_load_laneseiv8qi (TARGET_NEON) |
| #define HAVE_vec_load_laneseiv4hi (TARGET_NEON) |
| #define HAVE_vec_load_laneseiv2si (TARGET_NEON) |
| #define HAVE_vec_load_laneseiv2sf (TARGET_NEON) |
| #define HAVE_vec_load_laneseidi (TARGET_NEON) |
| #define HAVE_vec_load_lanesciv16qi (TARGET_NEON) |
| #define HAVE_vec_load_lanesciv8hi (TARGET_NEON) |
| #define HAVE_vec_load_lanesciv4si (TARGET_NEON) |
| #define HAVE_vec_load_lanesciv4sf (TARGET_NEON) |
| #define HAVE_neon_vld3v16qi (TARGET_NEON) |
| #define HAVE_neon_vld3v8hi (TARGET_NEON) |
| #define HAVE_neon_vld3v4si (TARGET_NEON) |
| #define HAVE_neon_vld3v4sf (TARGET_NEON) |
| #define HAVE_vec_store_laneseiv8qi (TARGET_NEON) |
| #define HAVE_vec_store_laneseiv4hi (TARGET_NEON) |
| #define HAVE_vec_store_laneseiv2si (TARGET_NEON) |
| #define HAVE_vec_store_laneseiv2sf (TARGET_NEON) |
| #define HAVE_vec_store_laneseidi (TARGET_NEON) |
| #define HAVE_vec_store_lanesciv16qi (TARGET_NEON) |
| #define HAVE_vec_store_lanesciv8hi (TARGET_NEON) |
| #define HAVE_vec_store_lanesciv4si (TARGET_NEON) |
| #define HAVE_vec_store_lanesciv4sf (TARGET_NEON) |
| #define HAVE_neon_vst3v16qi (TARGET_NEON) |
| #define HAVE_neon_vst3v8hi (TARGET_NEON) |
| #define HAVE_neon_vst3v4si (TARGET_NEON) |
| #define HAVE_neon_vst3v4sf (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv8qi (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv4hi (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv2si (TARGET_NEON) |
| #define HAVE_vec_load_lanesoiv2sf (TARGET_NEON) |
| #define HAVE_vec_load_lanesoidi (TARGET_NEON) |
| #define HAVE_vec_load_lanesxiv16qi (TARGET_NEON) |
| #define HAVE_vec_load_lanesxiv8hi (TARGET_NEON) |
| #define HAVE_vec_load_lanesxiv4si (TARGET_NEON) |
| #define HAVE_vec_load_lanesxiv4sf (TARGET_NEON) |
| #define HAVE_neon_vld4v16qi (TARGET_NEON) |
| #define HAVE_neon_vld4v8hi (TARGET_NEON) |
| #define HAVE_neon_vld4v4si (TARGET_NEON) |
| #define HAVE_neon_vld4v4sf (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv8qi (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv4hi (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv2si (TARGET_NEON) |
| #define HAVE_vec_store_lanesoiv2sf (TARGET_NEON) |
| #define HAVE_vec_store_lanesoidi (TARGET_NEON) |
| #define HAVE_vec_store_lanesxiv16qi (TARGET_NEON) |
| #define HAVE_vec_store_lanesxiv8hi (TARGET_NEON) |
| #define HAVE_vec_store_lanesxiv4si (TARGET_NEON) |
| #define HAVE_vec_store_lanesxiv4sf (TARGET_NEON) |
| #define HAVE_neon_vst4v16qi (TARGET_NEON) |
| #define HAVE_neon_vst4v8hi (TARGET_NEON) |
| #define HAVE_neon_vst4v4si (TARGET_NEON) |
| #define HAVE_neon_vst4v4sf (TARGET_NEON) |
| #define HAVE_neon_vandv8qi (TARGET_NEON) |
| #define HAVE_neon_vandv16qi (TARGET_NEON) |
| #define HAVE_neon_vandv4hi (TARGET_NEON) |
| #define HAVE_neon_vandv8hi (TARGET_NEON) |
| #define HAVE_neon_vandv2si (TARGET_NEON) |
| #define HAVE_neon_vandv4si (TARGET_NEON) |
| #define HAVE_neon_vandv2sf (TARGET_NEON) |
| #define HAVE_neon_vandv4sf (TARGET_NEON) |
| #define HAVE_neon_vanddi (TARGET_NEON) |
| #define HAVE_neon_vandv2di (TARGET_NEON) |
| #define HAVE_neon_vorrv8qi (TARGET_NEON) |
| #define HAVE_neon_vorrv16qi (TARGET_NEON) |
| #define HAVE_neon_vorrv4hi (TARGET_NEON) |
| #define HAVE_neon_vorrv8hi (TARGET_NEON) |
| #define HAVE_neon_vorrv2si (TARGET_NEON) |
| #define HAVE_neon_vorrv4si (TARGET_NEON) |
| #define HAVE_neon_vorrv2sf (TARGET_NEON) |
| #define HAVE_neon_vorrv4sf (TARGET_NEON) |
| #define HAVE_neon_vorrdi (TARGET_NEON) |
| #define HAVE_neon_vorrv2di (TARGET_NEON) |
| #define HAVE_neon_veorv8qi (TARGET_NEON) |
| #define HAVE_neon_veorv16qi (TARGET_NEON) |
| #define HAVE_neon_veorv4hi (TARGET_NEON) |
| #define HAVE_neon_veorv8hi (TARGET_NEON) |
| #define HAVE_neon_veorv2si (TARGET_NEON) |
| #define HAVE_neon_veorv4si (TARGET_NEON) |
| #define HAVE_neon_veorv2sf (TARGET_NEON) |
| #define HAVE_neon_veorv4sf (TARGET_NEON) |
| #define HAVE_neon_veordi (TARGET_NEON) |
| #define HAVE_neon_veorv2di (TARGET_NEON) |
| #define HAVE_neon_vbicv8qi (TARGET_NEON) |
| #define HAVE_neon_vbicv16qi (TARGET_NEON) |
| #define HAVE_neon_vbicv4hi (TARGET_NEON) |
| #define HAVE_neon_vbicv8hi (TARGET_NEON) |
| #define HAVE_neon_vbicv2si (TARGET_NEON) |
| #define HAVE_neon_vbicv4si (TARGET_NEON) |
| #define HAVE_neon_vbicv2sf (TARGET_NEON) |
| #define HAVE_neon_vbicv4sf (TARGET_NEON) |
| #define HAVE_neon_vbicdi (TARGET_NEON) |
| #define HAVE_neon_vbicv2di (TARGET_NEON) |
| #define HAVE_neon_vornv8qi (TARGET_NEON) |
| #define HAVE_neon_vornv16qi (TARGET_NEON) |
| #define HAVE_neon_vornv4hi (TARGET_NEON) |
| #define HAVE_neon_vornv8hi (TARGET_NEON) |
| #define HAVE_neon_vornv2si (TARGET_NEON) |
| #define HAVE_neon_vornv4si (TARGET_NEON) |
| #define HAVE_neon_vornv2sf (TARGET_NEON) |
| #define HAVE_neon_vornv4sf (TARGET_NEON) |
| #define HAVE_neon_vorndi (TARGET_NEON) |
| #define HAVE_neon_vornv2di (TARGET_NEON) |
| #define HAVE_vec_unpacks_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacku_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacks_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacku_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacks_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacku_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacks_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacku_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacks_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacku_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacks_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacku_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_smult_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_umult_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_smult_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_umult_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_smult_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_umult_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_smult_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_umult_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_smult_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_umult_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_smult_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_umult_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_sshiftl_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_ushiftl_lo_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_sshiftl_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_ushiftl_lo_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_sshiftl_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_ushiftl_lo_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_sshiftl_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_ushiftl_hi_v16qi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_sshiftl_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_ushiftl_hi_v8hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_sshiftl_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_widen_ushiftl_hi_v4si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_unpacks_lo_v8qi (TARGET_NEON) |
| #define HAVE_vec_unpacku_lo_v8qi (TARGET_NEON) |
| #define HAVE_vec_unpacks_lo_v4hi (TARGET_NEON) |
| #define HAVE_vec_unpacku_lo_v4hi (TARGET_NEON) |
| #define HAVE_vec_unpacks_lo_v2si (TARGET_NEON) |
| #define HAVE_vec_unpacku_lo_v2si (TARGET_NEON) |
| #define HAVE_vec_unpacks_hi_v8qi (TARGET_NEON) |
| #define HAVE_vec_unpacku_hi_v8qi (TARGET_NEON) |
| #define HAVE_vec_unpacks_hi_v4hi (TARGET_NEON) |
| #define HAVE_vec_unpacku_hi_v4hi (TARGET_NEON) |
| #define HAVE_vec_unpacks_hi_v2si (TARGET_NEON) |
| #define HAVE_vec_unpacku_hi_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_smult_hi_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_umult_hi_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_smult_hi_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_umult_hi_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_smult_hi_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_umult_hi_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_smult_lo_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_umult_lo_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_smult_lo_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_umult_lo_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_smult_lo_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_umult_lo_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_sshiftl_hi_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_ushiftl_hi_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_sshiftl_hi_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_ushiftl_hi_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_sshiftl_hi_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_ushiftl_hi_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_sshiftl_lo_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_ushiftl_lo_v8qi (TARGET_NEON) |
| #define HAVE_vec_widen_sshiftl_lo_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_ushiftl_lo_v4hi (TARGET_NEON) |
| #define HAVE_vec_widen_sshiftl_lo_v2si (TARGET_NEON) |
| #define HAVE_vec_widen_ushiftl_lo_v2si (TARGET_NEON) |
| #define HAVE_vec_pack_trunc_v4hi (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_pack_trunc_v2si (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_vec_pack_trunc_di (TARGET_NEON && !BYTES_BIG_ENDIAN) |
| #define HAVE_memory_barrier (TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_loaddi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN) |
| #define HAVE_atomic_compare_and_swapqi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_compare_and_swaphi (TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_compare_and_swapsi (TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_atomic_compare_and_swapdi (TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \ |
| && TARGET_HAVE_MEMORY_BARRIER) |
| #define HAVE_mulqq3 (TARGET_DSP_MULTIPLY && arm_arch_thumb2) |
| #define HAVE_mulhq3 (TARGET_DSP_MULTIPLY && arm_arch_thumb2) |
| #define HAVE_mulsq3 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_mulsa3 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_mulusa3 (TARGET_32BIT && arm_arch3m) |
| #define HAVE_mulha3 (TARGET_DSP_MULTIPLY && arm_arch_thumb2) |
| #define HAVE_muluha3 (TARGET_DSP_MULTIPLY) |
| #define HAVE_ssmulha3 (TARGET_32BIT && TARGET_DSP_MULTIPLY && arm_arch6) |
| #define HAVE_usmuluha3 (TARGET_INT_SIMD) |
| extern rtx gen_addsi3_compare0 (rtx, rtx, rtx); |
| extern rtx gen_cmpsi2_addneg (rtx, rtx, rtx, rtx); |
| extern rtx gen_thumb1_subsi3_insn (rtx, rtx, rtx); |
| extern rtx gen_subsi3_compare (rtx, rtx, rtx); |
| extern rtx gen_mulhisi3 (rtx, rtx, rtx); |
| extern rtx gen_maddhisi4 (rtx, rtx, rtx, rtx); |
| extern rtx gen_maddhidi4 (rtx, rtx, rtx, rtx); |
| extern rtx gen_insv_zero (rtx, rtx, rtx); |
| extern rtx gen_insv_t2 (rtx, rtx, rtx, rtx); |
| extern rtx gen_andsi_notsi_si (rtx, rtx, rtx); |
| extern rtx gen_thumb1_bicsi3 (rtx, rtx, rtx); |
| extern rtx gen_andsi_not_shiftsi_si (rtx, rtx, rtx, rtx, rtx); |
| extern rtx gen_arm_ashldi3_1bit (rtx, rtx); |
| extern rtx gen_arm_ashrdi3_1bit (rtx, rtx); |
| extern rtx gen_arm_lshrdi3_1bit (rtx, rtx); |
| extern rtx gen_unaligned_loadsi (rtx, rtx); |
| extern rtx gen_unaligned_loadhis (rtx, rtx); |
| extern rtx gen_unaligned_loadhiu (rtx, rtx); |
| extern rtx gen_unaligned_storesi (rtx, rtx); |
| extern rtx gen_unaligned_storehi (rtx, rtx); |
| extern rtx gen_unaligned_loaddi (rtx, rtx); |
| extern rtx gen_unaligned_storedi (rtx, rtx); |
| extern rtx gen_extzv_t2 (rtx, rtx, rtx, rtx); |
| extern rtx gen_divsi3 (rtx, rtx, rtx); |
| extern rtx gen_udivsi3 (rtx, rtx, rtx); |
| extern rtx gen_one_cmpldi2 (rtx, rtx); |
| extern rtx gen_zero_extendqidi2 (rtx, rtx); |
| extern rtx gen_zero_extendhidi2 (rtx, rtx); |
| extern rtx gen_zero_extendsidi2 (rtx, rtx); |
| extern rtx gen_extendqidi2 (rtx, rtx); |
| extern rtx gen_extendhidi2 (rtx, rtx); |
| extern rtx gen_extendsidi2 (rtx, rtx); |
| extern rtx gen_thumb1_extendhisi2 (rtx, rtx); |
| extern rtx gen_thumb1_extendqisi2 (rtx, rtx); |
| extern rtx gen_pic_load_addr_unified (rtx, rtx, rtx); |
| extern rtx gen_pic_load_addr_32bit (rtx, rtx); |
| extern rtx gen_pic_load_addr_thumb1 (rtx, rtx); |
| extern rtx gen_pic_add_dot_plus_four (rtx, rtx, rtx); |
| extern rtx gen_pic_add_dot_plus_eight (rtx, rtx, rtx); |
| extern rtx gen_tls_load_dot_plus_eight (rtx, rtx, rtx); |
| static inline rtx gen_pic_offset_arm (rtx, rtx, rtx); |
| static inline rtx |
| gen_pic_offset_arm(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b), rtx ARG_UNUSED (c)) |
| { |
| return 0; |
| } |
| extern rtx gen_movmem12b (rtx, rtx, rtx, rtx); |
| extern rtx gen_movmem8b (rtx, rtx, rtx, rtx); |
| extern rtx gen_cbranchsi4_insn (rtx, rtx, rtx, rtx); |
| extern rtx gen_cbranchsi4_scratch (rtx, rtx, rtx, rtx, rtx); |
| extern rtx gen_arm_cond_branch (rtx, rtx, rtx); |
| extern rtx gen_cstoresi_nltu_thumb1 (rtx, rtx, rtx); |
| extern rtx gen_cstoresi_ltu_thumb1 (rtx, rtx, rtx); |
| extern rtx gen_thumb1_addsi3_addgeu (rtx, rtx, rtx, rtx, rtx); |
| extern rtx gen_blockage (void); |
| extern rtx gen_arm_casesi_internal (rtx, rtx, rtx, rtx); |
| extern rtx gen_thumb1_casesi_dispatch (rtx); |
| extern rtx gen_nop (void); |
| extern rtx gen_trap (void); |
| extern rtx gen_movcond_addsi (rtx, rtx, rtx, rtx, rtx, rtx); |
| extern rtx gen_movcond (rtx, rtx, rtx, rtx, rtx, rtx); |
| extern rtx gen_prologue_thumb1_interwork (void); |
| extern rtx gen_stack_tie (rtx, rtx); |
| extern rtx gen_align_4 (void); |
| extern rtx gen_align_8 (void); |
| extern rtx gen_consttable_end (void); |
| extern rtx gen_consttable_1 (rtx); |
| extern rtx gen_consttable_2 (rtx); |
| extern rtx gen_consttable_4 (rtx); |
| extern rtx gen_consttable_8 (rtx); |
| extern rtx gen_consttable_16 (rtx); |
| extern rtx gen_clzsi2 (rtx, rtx); |
| extern rtx gen_rbitsi2 (rtx, rtx); |
| extern rtx gen_prefetch (rtx, rtx, rtx); |
| extern rtx gen_force_register_use (rtx); |
| extern rtx gen_arm_eh_return (rtx); |
| extern rtx gen_thumb_eh_return (rtx); |
| extern rtx gen_load_tp_hard (rtx); |
| extern rtx gen_load_tp_soft (void); |
| extern rtx gen_tlscall (rtx, rtx); |
| extern rtx gen_crc32b (rtx, rtx, rtx); |
| extern rtx gen_crc32h (rtx, rtx, rtx); |
| extern rtx gen_crc32w (rtx, rtx, rtx); |
| extern rtx gen_crc32cb (rtx, rtx, rtx); |
| extern rtx gen_crc32ch (rtx, rtx, rtx); |
| extern rtx gen_crc32cw (rtx, rtx, rtx); |
| extern rtx gen_tbcstv8qi (rtx, rtx); |
| extern rtx gen_tbcstv4hi (rtx, rtx); |
| extern rtx gen_tbcstv2si (rtx, rtx); |
| extern rtx gen_iwmmxt_iordi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_xordi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_anddi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_nanddi3 (rtx, rtx, rtx); |
| extern rtx gen_movv2si_internal (rtx, rtx); |
| extern rtx gen_movv4hi_internal (rtx, rtx); |
| extern rtx gen_movv8qi_internal (rtx, rtx); |
| extern rtx gen_ssaddv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_ssaddv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_ssaddv2si3 (rtx, rtx, rtx); |
| extern rtx gen_usaddv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_usaddv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_usaddv2si3 (rtx, rtx, rtx); |
| extern rtx gen_sssubv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_sssubv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_sssubv2si3 (rtx, rtx, rtx); |
| extern rtx gen_ussubv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_ussubv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_ussubv2si3 (rtx, rtx, rtx); |
| extern rtx gen_smulv4hi3_highpart (rtx, rtx, rtx); |
| extern rtx gen_umulv4hi3_highpart (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wmacs (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wmacsz (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wmacu (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wmacuz (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_clrdi (rtx); |
| extern rtx gen_iwmmxt_clrv8qi (rtx); |
| extern rtx gen_iwmmxt_clrv4hi (rtx); |
| extern rtx gen_iwmmxt_clrv2si (rtx); |
| extern rtx gen_iwmmxt_uavgrndv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_uavgrndv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_uavgv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_uavgv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tinsrb (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tinsrh (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tinsrw (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_textrmub (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_textrmsb (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_textrmuh (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_textrmsh (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_textrmw (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wshufh (rtx, rtx, rtx); |
| extern rtx gen_eqv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_eqv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_eqv2si3 (rtx, rtx, rtx); |
| extern rtx gen_gtuv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_gtuv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_gtuv2si3 (rtx, rtx, rtx); |
| extern rtx gen_gtv8qi3 (rtx, rtx, rtx); |
| extern rtx gen_gtv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_gtv2si3 (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wpackhss (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wpackwss (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wpackdss (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wpackhus (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wpackwus (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wpackdus (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckihb (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckihh (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckihw (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckilb (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckilh (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckilw (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckehub (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckehuh (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckehuw (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckehsb (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckehsh (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckehsw (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckelub (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckeluh (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckeluw (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckelsb (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckelsh (rtx, rtx); |
| extern rtx gen_iwmmxt_wunpckelsw (rtx, rtx); |
| extern rtx gen_rorv4hi3 (rtx, rtx, rtx); |
| extern rtx gen_rorv2si3 (rtx, rtx, rtx); |
| extern rtx gen_rordi3 (rtx, rtx, rtx); |
| extern rtx gen_ashrv4hi3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_ashrv2si3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_ashrdi3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_lshrv4hi3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_lshrv2si3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_lshrdi3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_ashlv4hi3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_ashlv2si3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_ashldi3_iwmmxt (rtx, rtx, rtx); |
| extern rtx gen_rorv4hi3_di (rtx, rtx, rtx); |
| extern rtx gen_rorv2si3_di (rtx, rtx, rtx); |
| extern rtx gen_rordi3_di (rtx, rtx, rtx); |
| extern rtx gen_ashrv4hi3_di (rtx, rtx, rtx); |
| extern rtx gen_ashrv2si3_di (rtx, rtx, rtx); |
| extern rtx gen_ashrdi3_di (rtx, rtx, rtx); |
| extern rtx gen_lshrv4hi3_di (rtx, rtx, rtx); |
| extern rtx gen_lshrv2si3_di (rtx, rtx, rtx); |
| extern rtx gen_lshrdi3_di (rtx, rtx, rtx); |
| extern rtx gen_ashlv4hi3_di (rtx, rtx, rtx); |
| extern rtx gen_ashlv2si3_di (rtx, rtx, rtx); |
| extern rtx gen_ashldi3_di (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wmadds (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_wmaddu (rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmia (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmiaph (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmiabb (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmiatb (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmiabt (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmiatt (rtx, rtx, rtx, rtx); |
| extern rtx gen_iwmmxt_tmovmskb (rtx, rtx); |
| extern rtx gen_iwmmxt_tmovmskh (rtx, rtx); |
| extern rtx gen_iwmmxt_tmovmskw (rtx, rtx); |
| extern rtx gen_iwmmxt_waccb (rtx, rtx); |
| extern rtx gen_iwmmxt_wacch (rtx, rtx); |
| extern rtx gen_iwmmxt_waccw (rtx, rtx); |
|