blob: 4fe1bb2c30bfb4037d5ea8f4de2fbb240f8a6267 [file] [log] [blame]
diff -ru eglibc-2_9_orig/sysdeps/powerpc/powerpc32/memset.S eglibc-2_9/sysdeps/powerpc/powerpc32/memset.S
--- eglibc-2_9_orig/sysdeps/powerpc/powerpc32/memset.S 2007-04-13 08:35:45.000000000 -0700
+++ eglibc-2_9/sysdeps/powerpc/powerpc32/memset.S 2009-05-06 16:52:04.000000000 -0700
@@ -112,11 +112,13 @@
clrrwi. rALIGN, rLEN, 5
mtcrf 0x01, rLEN /* 40th instruction from .align */
+#ifndef BROKEN_PPC_8xx_CPU15
/* Check if we can use the special case for clearing memory using dcbz.
This requires that we know the correct cache line size for this
processor. Getting the __cache_line_size may require establishing GOT
addressability, so branch out of line to set this up. */
beq cr1, L(checklinesize)
+#endif
/* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary.
Can't assume that rCHR is zero or that the cache line size is either
@@ -158,6 +160,7 @@
add rMEMP, rMEMP, rALIGN
b L(medium_tail2) /* 72nd instruction from .align */
+#ifndef BROKEN_PPC_8xx_CPU15
.align 5
nop
/* Clear cache lines of memory in 128-byte chunks.
@@ -191,6 +194,7 @@
bdnz L(zloop)
beqlr cr5
b L(medium_tail2)
+#endif /* ! BROKEN_PPC_8xx_CPU15 */
.align 5
L(small):
@@ -248,6 +252,7 @@
stw rCHR, -8(rMEMP)
blr
+#ifndef BROKEN_PPC_8xx_CPU15
L(checklinesize):
#ifdef SHARED
mflr rTMP
@@ -329,6 +334,7 @@
L(handletail32):
clrrwi. rALIGN, rLEN, 5
b L(nondcbz)
+#endif /* ! BROKEN_PPC_8xx_CPU15 */
END (BP_SYM (memset))
libc_hidden_builtin_def (memset)