| /* Generated automatically by the program `genconstants' |
| from the machine description file `md'. */ |
| |
| #ifndef GCC_INSN_CONSTANTS_H |
| #define GCC_INSN_CONSTANTS_H |
| |
| #define SP_REG 7 |
| #define UNSPEC_COPYSIGN 50 |
| #define UNSPECV_MONITOR 8 |
| #define UNSPEC_SCAS 30 |
| #define UNSPEC_PHMINPOSUW 139 |
| #define MM2_REG 31 |
| #define UNSPEC_FPREM_F 88 |
| #define UNSPEC_XOP_UNSIGNED_CMP 151 |
| #define ST0_REG 8 |
| #define MM4_REG 33 |
| #define ST1_REG 9 |
| #define MM5_REG 34 |
| #define ST2_REG 10 |
| #define BX_REG 3 |
| #define ST3_REG 11 |
| #define MM7_REG 36 |
| #define UNSPEC_FIST_CEIL 75 |
| #define UNSPEC_CRC32 143 |
| #define UNSPEC_MASKSTORE 171 |
| #define ST6_REG 14 |
| #define UNSPEC_LDDQU 47 |
| #define ST7_REG 15 |
| #define MM0_REG 29 |
| #define UNSPEC_FSTCW 34 |
| #define UNSPECV_CMPXCHG 10 |
| #define UNSPEC_FIX_NOTRUNC 40 |
| #define UNSPEC_DTPOFF 6 |
| #define MM3_REG 32 |
| #define CX_REG 2 |
| #define XMM10_REG 47 |
| #define UNSPEC_REP 37 |
| #define UNSPECV_RDTSCP 19 |
| #define MM6_REG 35 |
| #define XMM7_REG 28 |
| #define UNSPECV_EMMS 2 |
| #define MM1_REG 30 |
| #define ST4_REG 12 |
| #define ST5_REG 13 |
| #define UNSPEC_MOVMSK 42 |
| #define UNSPEC_DP 136 |
| #define UNSPEC_PSADBW 46 |
| #define UNSPEC_GOTNTPOFF 7 |
| #define UNSPEC_F2XM1 67 |
| #define UNSPEC_PFRSQRT 42 |
| #define UNSPEC_FYL2X 63 |
| #define UNSPEC_AESKEYGENASSIST 164 |
| #define UNSPEC_REG_SAVE 14 |
| #define UNSPEC_AESENCLAST 160 |
| #define PPERM_REV_INV 0x60 |
| #define XMM0_REG 21 |
| #define UNSPEC_FMA4_INTRINSIC 150 |
| #define XMM1_REG 22 |
| #define UNSPEC_BLENDV 134 |
| #define UNSPEC_PARITY 33 |
| #define UNSPEC_GOTOFF 1 |
| #define UNSPEC_INSERTQ 133 |
| #define UNSPEC_INSERTPS 135 |
| #define XMM4_REG 25 |
| #define UNSPEC_FNSTSW 31 |
| #define XMM5_REG 26 |
| #define XMM6_REG 27 |
| #define UNSPECV_ALIGN 7 |
| #define UNSPEC_SIN 60 |
| #define UNSPECV_VZEROALL 16 |
| #define UNSPEC_SP_TLS_TEST 103 |
| #define UNSPEC_XTRACT_FRACT 84 |
| #define UNSPEC_GOT 0 |
| #define UNSPEC_TLS_LD_BASE 22 |
| #define UNSPEC_PSIGN 121 |
| #define UNSPECV_STACK_PROBE 1 |
| #define UNSPEC_SET_GOT 12 |
| #define UNSPEC_SP_TLS_SET 102 |
| #define UNSPEC_GOTTPOFF 3 |
| #define UNSPECV_PROLOGUE_USE 14 |
| #define UNSPEC_FLDCW 36 |
| #define UNSPEC_MS_TO_SYSV_CALL 48 |
| #define XMM11_REG 48 |
| #define UNSPEC_PCMPESTR 144 |
| #define UNSPEC_FYL2XP1 64 |
| #define XMM12_REG 49 |
| #define UNSPEC_LD_MPIC 38 |
| #define UNSPEC_MASKMOV 41 |
| #define XMM13_REG 50 |
| #define UNSPEC_PCMPISTR 145 |
| #define UNSPEC_NTPOFF 5 |
| #define UNSPEC_MOVU 44 |
| #define UNSPEC_FPREM1_U 91 |
| #define UNSPECV_LWPINS_INTRINSIC 25 |
| #define UNSPECV_MWAIT 9 |
| #define UNSPEC_XOP_TRUEFALSE 152 |
| #define XMM15_REG 52 |
| #define UNSPEC_XTRACT_EXP 85 |
| #define UNSPEC_EXTRQI 130 |
| #define UNSPEC_VTESTP 173 |
| #define UNSPEC_DEF_CFA 15 |
| #define UNSPEC_IEEE_MIN 51 |
| #define UNSPEC_XOP_PERMUTE 153 |
| #define PCOM_TRUE 1 |
| #define UNSPECV_RDPMC 20 |
| #define PPERM_ZERO 0x80 |
| #define UNSPEC_TLS_GD 21 |
| #define UNSPEC_FPREM1_F 90 |
| #define UNSPEC_VPERMIL2F128 169 |
| #define UNSPEC_INSERTQI 132 |
| #define PCOM_FALSE 0 |
| #define UNSPEC_FPREM_U 89 |
| #define FPCR_REG 19 |
| #define UNSPEC_SINCOS_SIN 81 |
| #define UNSPECV_LWPVAL_INTRINSIC 24 |
| #define UNSPECV_BLOCKAGE 0 |
| #define UNSPEC_SINCOS_COS 80 |
| #define COM_FALSE_P 3 |
| #define UNSPEC_TRUNC_NOOP 39 |
| #define COM_FALSE_S 2 |
| #define UNSPEC_FRNDINT_MASK_PM 73 |
| #define XMM2_REG 23 |
| #define UNSPECV_RDTSC 18 |
| #define UNSPEC_INDNTPOFF 8 |
| #define R8_REG 37 |
| #define R9_REG 38 |
| #define XMM3_REG 24 |
| #define UNSPEC_ROUND 141 |
| #define FPSR_REG 18 |
| #define UNSPEC_FMA4_FMSUBADD 152 |
| #define UNSPEC_SAHF 32 |
| #define UNSPEC_PALIGNR 122 |
| #define SI_REG 4 |
| #define UNSPEC_LFENCE 45 |
| #define BP_REG 6 |
| #define UNSPEC_PCLMUL 165 |
| #define UNSPECV_STMXCSR 4 |
| #define DX_REG 1 |
| #define COM_TRUE_P 5 |
| #define UNSPEC_FRCZ 154 |
| #define UNSPEC_FSCALE_FRACT 86 |
| #define UNSPEC_FSCALE_EXP 87 |
| #define UNSPEC_ADD_CARRY 35 |
| #define XMM8_REG 45 |
| #define UNSPEC_CAST 172 |
| #define XMM9_REG 46 |
| #define UNSPEC_FRNDINT_FLOOR 70 |
| #define UNSPEC_FRNDINT 65 |
| #define AX_REG 0 |
| #define PPERM_ONES 0xa0 |
| #define UNSPECV_LLWP_INTRINSIC 22 |
| #define UNSPEC_PLTOFF 9 |
| #define UNSPEC_TLS_IE_SUN 24 |
| #define UNSPEC_PTEST 140 |
| #define UNSPEC_C2_FLAG 95 |
| #define UNSPEC_RCP 45 |
| #define UNSPEC_MEMORY_BLOCKAGE 18 |
| #define UNSPEC_RSQRT 46 |
| #define UNSPEC_FXAM_MEM 96 |
| #define UNSPECV_FEMMS 5 |
| #define UNSPEC_MFENCE 44 |
| #define UNSPEC_SET_GOT_OFFSET 17 |
| #define UNSPEC_FXAM 69 |
| #define PPERM_SRC2 0x10 |
| #define UNSPEC_PCMP 166 |
| #define PPERM_SRC 0x00 |
| #define UNSPEC_MOVNTDQA 137 |
| #define UNSPEC_SSE_PROLOGUE_SAVE 13 |
| #define PPERM_SIGN 0xc0 |
| #define UNSPEC_STACK_ALLOC 11 |
| #define UNSPEC_FIST_FLOOR 74 |
| #define UNSPEC_MACHOPIC_OFFSET 10 |
| #define UNSPEC_PSHUFB 120 |
| #define UNSPECV_LDMXCSR 3 |
| #define UNSPEC_FRNDINT_TRUNC 72 |
| #define UNSPEC_COS 61 |
| #define UNSPEC_IEEE_MAX 52 |
| #define PPERM_SRC1 0x00 |
| #define UNSPEC_FRNDINT_CEIL 71 |
| #define UNSPECV_VSWAPMOV 21 |
| #define UNSPECV_XCHG 12 |
| #define UNSPECV_LOCK 13 |
| #define UNSPEC_FMA4_FMADDSUB 151 |
| #define UNSPEC_MPSADBW 138 |
| #define XMM14_REG 51 |
| #define UNSPEC_VPERMIL 167 |
| #define UNSPEC_GOTPCREL 2 |
| #define UNSPEC_TAN 68 |
| #define UNSPEC_AESDEC 161 |
| #define UNSPEC_SP_TEST 101 |
| #define UNSPEC_TLSDESC 23 |
| #define UNSPEC_PFRCPIT1 40 |
| #define UNSPEC_AESDECLAST 162 |
| #define COM_TRUE_S 4 |
| #define UNSPECV_SLWP_INTRINSIC 23 |
| #define UNSPECV_VZEROUPPER 17 |
| #define UNSPEC_SFENCE 47 |
| #define UNSPEC_AESENC 159 |
| #define UNSPEC_SET_RIP 16 |
| #define UNSPEC_MASKLOAD 170 |
| #define UNSPECV_CLD 15 |
| #define UNSPEC_PFRCPIT2 41 |
| #define PPERM_REVERSE 0x40 |
| #define UNSPEC_FIST 66 |
| #define UNSPEC_PFRSQIT1 43 |
| #define UNSPEC_TPOFF 4 |
| #define UNSPEC_FPATAN 62 |
| #define UNSPEC_EXTRQ 131 |
| #define FLAGS_REG 17 |
| #define UNSPEC_SP_SET 100 |
| #define UNSPEC_VPERMIL2 168 |
| #define PPERM_INV_SIGN 0xe0 |
| #define UNSPEC_TP 20 |
| #define R10_REG 39 |
| #define UNSPEC_MOVNT 43 |
| #define R11_REG 40 |
| #define UNSPEC_AESIMC 163 |
| #define R12_REG 41 |
| #define R13_REG 42 |
| #define DI_REG 5 |
| #define UNSPEC_PFRCP 49 |
| #define PPERM_INVERT 0x20 |
| #define UNSPECV_CLFLUSH 6 |
| |
| #endif /* GCC_INSN_CONSTANTS_H */ |
