arch/powerpc/boot/dts/p1020rdb_camp_core0.dts

/*
 * P1020 RDB  Core0 Device Tree Source in CAMP mode.
 *
 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
 * can be shared, all the other devices must be assigned to one core only.
 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
 * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
 *
 * Please note to add "-b 0" for core0's dts compiling.
 *
 * Copyright 2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/include/ "p1020rdb.dts"

/ {
	model = "fsl,P1020RDB";
	compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";

	aliases {
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		serial0 = &serial0;
		pci0 = &pci0;
		pci1 = &pci1;
	};

	cpus {
		PowerPC,P1020@1 {
			status = "disabled";
		};
	};

	memory {
		device_type = "memory";
	};

	localbus@ffe05000 {
		status = "disabled";
	};

	soc@ffe00000 {
		serial1: serial@4600 {
			status = "disabled";
		};

		enet0: ethernet@b0000 {
			status = "disabled";
		};

		mpic: pic@40000 {
			protected-sources = <
			42 29 30 34	/* serial1, enet0-queue-group0 */
			17 18 24 45	/* enet0-queue-group1, crypto */
			>;
		};
	};
};