blob: f20d7a1cb5adb527bd04d1b8cb911b6e11d42d66 [file] [log] [blame]
/*
* Developed based on Atheros AP143 reference board support
* - Removed LED support since WC LED does not need to display WAN or LAN
* status.
*
* Copyright (c) 2013 The Linux Foundation. All rights reserved.
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gfmn100.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define AP143_MAC0_OFFSET 0
#define AP143_MAC1_OFFSET 6
#define AP143_WMAC_CALDATA_OFFSET 0x1000
void set_gpio_reg(u32 gpio_reg, u32 val)
{
__raw_writel(val, (u32 *)KSEG1ADDR(AR71XX_GPIO_BASE + gpio_reg));
}
static void __init windcharger_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1ffe0000);
ath79_register_gfmn100();
ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0);
/* WAN port */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(4);
ath79_register_eth(0);
/* LAN ports */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_100;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(1);
set_gpio_reg(GFMN_GPIO_REG_OE, (GFMN_GPIO_POE | GFMN_GPIO_UART_RX |
GFMN_GPIO_RESET_SW | GFMN_GPIO_SPI_MISO));
set_gpio_reg(GFMN_GPIO_REG_OUT, (GFMN_GPIO_SPI_CS | GFMN_GPIO_TEMP_CS |
GFMN_GPIO_LEDR));
set_gpio_reg(GFMN_GPIO_REG_OUT_FUNC0, 0);
set_gpio_reg(GFMN_GPIO_REG_OUT_FUNC1,
GFMN_GPIO_FUNC1_GPIO_5_SET(GFMN_GPIO_MUX_SPI_CS_0) |
GFMN_GPIO_FUNC1_GPIO_6_SET(GFMN_GPIO_MUX_SPI_CLK) |
GFMN_GPIO_FUNC1_GPIO_7_SET(GFMN_GPIO_MUX_SPI_MOSI));
set_gpio_reg(GFMN_GPIO_REG_OUT_FUNC2,
GFMN_GPIO_FUNC2_GPIO_10_SET(GFMN_GPIO_MUX_UART_TX));
set_gpio_reg(GFMN_GPIO_REG_OUT_FUNC3, 0);
set_gpio_reg(GFMN_GPIO_REG_OUT_FUNC4,
GFMN_GPIO_FUNC4_GPIO_17_SET(GFMN_GPIO_MUX_SYS_RST_L));
}
MIPS_MACHINE(ATH79_MACH_GF_WINDCHARGER, "MN100",
"Google Fiber windcharger MN100 board",
windcharger_setup);