tree 195cc2ab092d085cd945c5ae18e60ffdc0b80bb0
parent 8a335a2331c72e60c6b3ef09b2dedd3ba00da1b1
author Bob Moore <robert.moore@intel.com> 1236587540 +0800
committer Len Brown <len.brown@intel.com> 1238170263 -0400

ACPICA: Change handling of PM1 Status register ignored bit

Ignored bits must be preserved according to the ACPI spec.
Usually this means a read/modify/write when writing to the
register.  However, for status registers, writing a one means
clear the event.  Writing a zero means preserve the event (do not
clear.) This behavior is clarified in the ACPI 4.0 spec, and the
ACPICA code now simply always writes a zero to the ignored bit.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>