/* autogenerated */

#define MUC_TX_STATS_NAMES_TABLE { \
	"bcn_enq_failed", \
	"tx_status_set", \
	"pkt_from_host", \
	"host_intr", \
	"netbuf_alloc_failed", \
	"mgm_before_encap", \
	"mgm_after_encap", \
	"pkt_before_encap", \
	"pkt_after_encap", \
	"pkt_push_back", \
	"pkt_to_hw", \
	"pkt_to_hw_deferred", \
	"fd_absent", \
	"fd_not_ready", \
	"pkt_fd_available", \
	"pkt_add_node", \
	"pkt_add_q", \
	"pkt_qtn_hardstart", \
	"tx_reserved", \
	"tx_reserve_fail", \
	"txalert_mu_ndp_update", \
	"txalert_mu_rpt_poll", \
	"txalert_mu_queue_full", \
	"txalert_mu_queue_fail", \
	"sample_rate_mu", \
	"sample_bw_mu", \
	"txdone_intr", \
	"txalert_intr", \
	"txalert_tasklet", \
	"txalert_bcn_update", \
	"txalert_ndp_update", \
	"tx_ndp_q_occupied", \
	"tx_ndp_start", \
	"tx_pwr", \
	"bcn_scheme_power_save", \
	"bcn_scheme", \
	"tx_mcast_pwr", \
	"tx_mcast_defer", \
	"tx_mcast_defer_hwq", \
	"tx_limit_drop", \
	"fd_acquire", \
	"fd_release", \
	"fd_acq_fail", \
	"fd_acq_fail_frms", \
	"fd_acq_hal_fail", \
	"fd_acq_hal_fail_frms", \
	"ba_send", \
	"ba_del", \
	"fd_free_nodeclean", \
	"msdu_expired", \
	"tx_window_locked", \
	"tx_window_failed", \
	"tx_restrict_probe", \
	"tx_restrict_mode", \
	"tx_restrict_drop", \
	"tx_restrict_delay", \
	"tx_restrict_send", \
	"tx_sample_pkts", \
	"tx_sample_bytes", \
	"tx_underflow", \
	"tx_hal_enqueued", \
	"txbf_mode", \
	"psel_matrix", \
	"sample_rate", \
	"sample_bw", \
	"ra_flags", \
	"fd_balance", \
	"invalid_delay", \
	"halt_tx", \
	"resume_tx", \
	"rfctrl_on", \
	"rfctrl_off", \
	"go_offchan", \
	"go_datachan", \
	"defer_cc", \
	"deferred_cc_done", \
	"off_chan_sample", \
	"off_chan_scan", \
	"off_chan_cac", \
	"cca_pri", \
	"cca_sec", \
	"cca_sec40", \
	"cca_busy", \
	"cca_fat", \
	"cca_intf", \
	"cca_trfc", \
	"mu_prec_snd_tx", \
	"mu_prec_snd_wait_done", \
	"mu_grp_sel_snd_tx", \
	"mu_grp_sel_snd_wait_done", \
	"oc_auctx_timeout", \
	"oc_auctx_overwrite", \
	"oc_auctx_fail", \
	"gi_cnt", \
	"gi_ncidx", \
	"gi_val", \
	"select_state_ncidx", \
	"select_state_val", \
	"pppc_scale_cnt", \
	"pppc_scale_ncidx", \
	"pppc_scale_val", \
	"pppc_scale_last_gput", \
	"pppc_scale_last_gput_idx", \
	"pppc_scale_base_cnt", \
	"pppc_scale_base_20m", \
	"pppc_scale_base_40m", \
	"pppc_scale_base_80m", \
	"pppc_scale_base_copy", \
	"pppc_scale_overstep", \
	"pppc_scale_rollback", \
	"pppc_0_gput", \
	"tx_max_power", \
	"nc_csr_read_count", \
	"nc_csr_write_count", \
	"nc_csr_done_watermark", \
	"nc_csr_watermark_count", \
	"auc_dtim_notify", \
	"auc_ps_notify", \
	"tx_beacon_done", \
	"sfs_peer_rts", \
	"sfs_peer_rts_flags", \
	"sfs_local_rts", \
	"sfs_local_rts_flags", \
	"sfs_dyn_wmm", \
	"sfs_dyn_wmm_flags", \
	"auc_wmm_ps_notify", \
	"tx_wmm_ps_null_frames", \
	"qtn_bcn_stop", \
	"mu_grp_snd_queue_is_not_empty", \
	"mu_prec_snd_queue_is_not_empty", \
	"mu_group_delete", \
	"mu_group_install", \
	"mu_group_rate_node_updates", \
	"mu_update_rates_mu", \
	"mu_update_rates_su", \
	"autocs_sample_bits", \
	"autocs_adjust_bits", \
	"autocs_step_size", \
	"autocs_cs_thresh", \
	"autocs_min_rssi", \
	"bmps_null_tx_success", \
	"bmps_null_tx_fail", \
	"bmps_null_tx_timeout", \
	"txqueue_g1q0_deadline_frozen", \
	"auc_ipc_retry", \
	"auc_ipc_hwm", \
	"auc_ipc_send_delay", \
	"auc_ipc_send_delay_hwm", \
}

#define MUC_RX_STATS_NAMES_TABLE { \
	"rxdesc_pop_from_host", \
	"rxdesc_get_from_queue", \
	"rxdesc_push_to_host", \
	"rxdesc_non_aggr_push_to_host", \
	"rxdesc_flush_to_host", \
	"rxdesc_reuse_push", \
	"rxdesc_reuse_pop", \
	"rxdesc_status_bad_dur", \
	"rxdesc_status_bad_len", \
	"rxdesc_slow_status", \
	"rxdesc_fast_status", \
	"rxdesc_status_crc_err", \
	"rxdesc_status_cmic_err", \
	"rxdesc_status_cmic_no_crc_err", \
	"rxdesc_status_retry", \
	"agg_stored", \
	"agg_duplicate", \
	"accel_mpdu", \
	"accel_msdu", \
	"accel_no_buffer", \
	"accel_fwt_lu_timeout", \
	"accel_mcast_send", \
	"accel_mcast_drop", \
	"accel_no_match", \
	"accel_drop", \
	"accel_err", \
	"rate_train_chk", \
	"rate_train_err", \
	"rate_train_delay", \
	"rate_train_none", \
	"rate_train_hash_bad", \
	"rate_train_hash_good", \
	"agg_oldpkts", \
	"agg_very_oldpkts", \
	"agg_evict_in_order", \
	"agg_evict_in_move", \
	"agg_evict_empty", \
	"agg_timeout", \
	"agg_rxwin_reset", \
	"rx_qnum_err", \
	"rx_mgmt", \
	"rx_ctrl", \
	"rx_pspoll", \
	"rx_pwr_mgmt", \
	"rx_delba", \
	"rx_pwr_mgmt_set", \
	"rx_pwr_mgmt_reset", \
	"rx_emergency", \
	"rx_underflow", \
	"rx_desc_underflow", \
	"rx_desc_linkerr", \
	"rx_notify", \
	"rx_df_numelems", \
	"last_recv_seq", \
	"rx_node_not_found", \
	"rx_non_qos_duplicate", \
	"rx_11n_ndp", \
	"rx_11ac_ndp", \
	"rx_ndp_inv_slot", \
	"rx_11n_ndp_no_capt", \
	"rx_ndp_sw_processed", \
	"rx_ndp_lockup", \
	"rx_11n_bf_act", \
	"rx_11ac_bf_act", \
	"rx_bf_act_inv_slot", \
	"rx_amsdu", \
	"rx_data", \
	"prev_rx_data", \
	"rx_recv_qnull", \
	"rx_recv_act", \
	"rx_recv_bcn", \
	"rx_recv_auth", \
	"rx_recv_assoc_req", \
	"rx_recv_assoc_res", \
	"rx_recv_deauth", \
	"rx_recv_disassoc", \
	"rx_mcs_gt_76", \
	"tkip_keys", \
	"rx_tkip_mic_err", \
	"icv_errs", \
	"tmic_errs", \
	"cmic_errs", \
	"crc_errs", \
	"ba_tx", \
	"ba_rx", \
	"ba_rx_fail", \
	"sec_oflow", \
	"str_oflow", \
	"oflow_fixup_timeout", \
	"rxdone_intr", \
	"rxtypedone_intr", \
	"ipc_a2m_intr", \
	"tqe_intr", \
	"tqe_in_port_lhost", \
	"tqe_in_port_bad", \
	"tqe_a2m_type_txfb", \
	"tqe_a2m_type_rxpkt", \
	"tqe_a2m_type_unknown", \
	"tqe_reschedule_task", \
	"tqe_desc_unowned", \
	"bb_intr", \
	"bb_irq_dleaf_oflow", \
	"bb_irq_leaf_uflow", \
	"bb_irq_leaf_ldpc_uflow", \
	"bb_irq_tx_td_oflow_intr", \
	"bb_irq_tx_td_uflow_intr", \
	"bb_irq_rx_sm_wdg_intr", \
	"bb_irq_rx_long_dur", \
	"bb_irq_rx_11ac_timeout", \
	"bb_irq_tx_sm_wdg_intr", \
	"bb_irq_main_sm_wdg_intr", \
	"bb_irq_hready_wdg_intr", \
	"mac_irq_rx_sec_buff_oflow", \
	"mac_irq_rx_strq_oflow", \
	"mac_irq_rx_bb_uflow_intr", \
	"mac_irq_rx_bb_oflow_intr", \
	"bb_irq_hready_wdg_reset", \
	"sreset_wdg_begin", \
	"sreset_wdg_end", \
	"sreset_wdg_in_place", \
	"sreset_wdg_tx_beacon_hang", \
	"sreset_wdg_tx_hang", \
	"sreset_wdg_pm_corrupt", \
	"sreset_wdg_tcm_corrupt", \
	"sreset_wdg_rx_done", \
	"sreset_wdg_in_place_try", \
	"sreset_wdg_tasklet_sched_1", \
	"sreset_wdg_tasklet_sched_2", \
	"sreset_tasklet_sched", \
	"sreset_tasklet_begin", \
	"sreset_tasklet_end", \
	"hreset_req", \
	"sreset_begin", \
	"sreset_end", \
	"sreset_dma_rx_inprog", \
	"sreset_dma_tx_inprog", \
	"sreset_dma_rx_max_wait", \
	"sreset_dma_tx_max_wait", \
	"sreset_dma_tx_hang", \
	"sreset_dma_rx_hang", \
	"sreset_dma_rx_wait_timeout", \
	"sreset_dma_tx_wait_timeout", \
	"sreset_drop_not_valid", \
	"sreset_drop_bad_addr", \
	"rf_cmpvtune_out", \
	"rf_cal_freq", \
	"ac_max", \
	"ac_min", \
	"ac_cur", \
	"ac_adj", \
	"rx_gain", \
	"rd_cache_indx", \
	"logger_sreset_wmac1_dma_rx_inprog", \
	"logger_sreset_wmac1_dma_tx_inprog", \
	"logger_sreset_wmac1_dma_rx_max_wait", \
	"logger_sreset_wmac1_dma_tx_max_wait", \
	"logger_sreset_wmac1_dma_tx_hang", \
	"logger_sreset_wmac1_dma_rx_hang", \
	"logger_sreset_wmac1_dma_rx_wait_timeout", \
	"logger_sreset_wmac1_dma_tx_wait_timeout", \
	"mu_rx_pkt", \
	"pduty_sleep", \
	"pduty_rxoff", \
	"pduty_period", \
	"pduty_pct", \
	"soft_ring_push_to_tqe", \
	"soft_ring_empty", \
	"soft_ring_not_empty", \
	"soft_ring_add_force", \
	"soft_ring_add_to_head", \
	"soft_ring_add_continue", \
	"soft_ring_free_pool_empty", \
	"mimo_ps_mode_switch", \
	"rx_vlan_drop", \
	"auto_cca_state", \
	"auto_cca_th", \
	"auto_cca_spre", \
	"auto_cca_intf", \
	"total_dmem_alloc", \
	"total_dram_alloc", \
	"dmem_alloc_fails", \
	"dram_alloc_fails", \
	"total_dmem_free", \
	"total_dram_free", \
	"rx_bw_80", \
	"rx_bw_40", \
	"rx_bw_20", \
	"rx_wmm_ps_trigger", \
	"rx_wmm_ps_set", \
	"rx_wmm_ps_reset", \
	"rx_intr_next_ptr_0", \
	"rx_hbm_pool_depleted", \
	"rxq_intr[0]", \
	"rxq_intr[1]", \
	"rxq_intr[2]", \
	"rxq_fill[0]", \
	"rxq_fill[1]", \
	"rxq_fill[2]", \
	"rxq_nobuf[0]", \
	"rxq_nobuf[1]", \
	"rxq_nobuf[2]", \
	"rxq_stop[0]", \
	"rxq_stop[1]", \
	"rxq_stop[2]", \
	"rxq_pkt[0]", \
	"rxq_pkt[1]", \
	"rxq_pkt[2]", \
	"rxq_bad_status[0]", \
	"rxq_bad_status[1]", \
	"rxq_bad_status[2]", \
	"rxq_pkt_oversize[0]", \
	"rxq_pkt_oversize[1]", \
	"rxq_pkt_oversize[2]", \
	"rxq_pkt_delivered[0]", \
	"rxq_pkt_delivered[1]", \
	"rxq_pkt_delivered[2]", \
	"rxq_status_hole_chk_num[0]", \
	"rxq_status_hole_chk_num[1]", \
	"rxq_status_hole_chk_num[2]", \
	"rxq_status_hole_chk_step_sum[0]", \
	"rxq_status_hole_chk_step_sum[1]", \
	"rxq_status_hole_chk_step_sum[2]", \
	"rxq_status_hole_chk_step_max[0]", \
	"rxq_status_hole_chk_step_max[1]", \
	"rxq_status_hole_chk_step_max[2]", \
	"rxq_status_hole[0]", \
	"rxq_status_hole[1]", \
	"rxq_status_hole[2]", \
	"rxq_status_hole_max_size[0]", \
	"rxq_status_hole_max_size[1]", \
	"rxq_status_hole_max_size[2]", \
	"rxq_process_max[0]", \
	"rxq_process_max[1]", \
	"rxq_process_max[2]", \
	"rxq_process_sum[0]", \
	"rxq_process_sum[1]", \
	"rxq_process_sum[2]", \
	"rxq_process_num[0]", \
	"rxq_process_num[1]", \
	"rxq_process_num[2]", \
	"rxq_process_limited[0]", \
	"rxq_process_limited[1]", \
	"rxq_process_limited[2]", \
	"rxq_desc_chain_empty[0]", \
	"rxq_desc_chain_empty[1]", \
	"rxq_desc_chain_empty[2]", \
	"rx_data_last_seqfrag", \
	"rx_data_last_ip_id", \
	"rx_opmode_notify", \
	"accel_l2_ext_filter", \
	"accel_mc_send_l2_ext_filter", \
	"accel_mc_drop_l2_ext_filter", \
	"rx_frame_addressed_to_wrong_bss", \
}