diff --git a/arch/arc/boot/dts/prowl.dts b/arch/arc/boot/dts/prowl.dts
new file mode 100644
index 0000000..57b88d9
--- /dev/null
+++ b/arch/arc/boot/dts/prowl.dts
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2016 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "qtn,qsr1000";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&core_intc>;
+
+	aliases {
+		serial0 = &uart0;
+	};
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+	memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x00000000 0x80000000 0x40000000>;
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+	core_clk: core_clk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <500000000>;  /* 500 MHZ */
+	};
+	core_intc: arc700-intc@cpu {
+		compatible = "snps,arc700-intc";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+	uart0: dw-apb-uart {
+		compatible = "snps,dw-apb-uart", "ns16550a";
+		reg = <0xF0000000 0x100>;
+		clock-frequency = <125000000>;
+		interrupt-parent = <&core_intc>;
+		interrupts = <24>;
+		baud = <115200>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
+	pcie: pcie@e9000000 {
+		compatible = "snps,dw-pcie";
+		reg = <0xe9000000 0x2000>,   /* Controller registers */
+		      <0xcf000000 0x10000>;  /* PCI config space */
+		reg-names = "ctrlreg", "config";
+		device_type = "pci";
+		num-lanes = <1>;
+		interrupt-parent = <&core_intc>;
+		interrupts = <28>, <18>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x82000000 0 0xc0000000 0xc0000000 0 0x01000000
+		          0x83000000 0 0xc1000000 0xc1000000 0 0x01000000>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0x0 0 0 1>;
+		interrupt-map = <0x0 0 0 1 &core_intc 28>;
+	};
+};