/*
 * Copyright (C) 2016 Google, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

/include/ "skeleton.dtsi"

/ {
	compatible = "qtn,qsr1000";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&core_intc>;

	aliases {
		serial0 = &uart0;
	};
	chosen {
		stdout-path = "serial0:115200n8";
	};
	memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x80000000 0x40000000>;
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};
	core_clk: core_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <500000000>;  /* 500 MHZ */
	};
	core_intc: arc700-intc@cpu {
		compatible = "snps,arc700-intc";
		interrupt-controller;
		#interrupt-cells = <1>;
	};
	uart0: dw-apb-uart {
		compatible = "snps,dw-apb-uart", "ns16550a";
		reg = <0xF0000000 0x100>;
		clock-frequency = <125000000>;
		interrupt-parent = <&core_intc>;
		interrupts = <24>;
		baud = <115200>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};
	pcie: pcie@e9000000 {
		compatible = "snps,dw-pcie";
		reg = <0xe9000000 0x2000>,   /* Controller registers */
		      <0xcf000000 0x10000>;  /* PCI config space */
		reg-names = "ctrlreg", "config";
		device_type = "pci";
		num-lanes = <1>;
		interrupt-parent = <&core_intc>;
		interrupts = <28>, <18>;
		#address-cells = <3>;
		#size-cells = <2>;
		ranges = <0x82000000 0 0xc0000000 0xc0000000 0 0x01000000
		          0x83000000 0 0xc1000000 0xc1000000 0 0x01000000>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0x0 0 0 1>;
		interrupt-map = <0x0 0 0 1 &core_intc 28>;
	};
	/*
	 * mdio device is instantiated by the emac_lib driver, which does
	 * not depend upon the device tree for discovery. The driver is
	 * updated to search for the entry named 'mdio' and associate this
	 * device tree node.
	 */
	mdio0: mdio {
		compatible = "virtual,mdio_bus";
		#address-cells = <1>;
		#size-cells = <0>;

		phy_port1: phy@0 {
			reg = <0>;
		};

		phy_port2: phy@1 {
			reg = <1>;
		};

		phy_port3: phy@2 {
			reg = <2>;
		};

		phy_port4: phy@3 {
			reg = <3>;
		};

		phy_port5: phy@4 {
			reg = <4>;
		};
	};
	/*
	 * wan0 device is instantiated by the switch_emac driver, which does
	 * not depend upon the device tree for discovery. The driver is
	 * updated to search for the entry named 'wan0' and associate this
	 * device tree node.
	 */
	wan0: wan0 {
		status = "ok";
		phy-mode = "rgmii";
		qcom,id = <1>;

		fixed-link {
			speed = <1000>;
			full-duplex;
		};
	};
	/*
	 * lan0 device is instantiated by the switch_emac driver, which does
	 * not depend upon the device tree for discovery. The driver is
	 * updated to search for the entry named 'lan0' and associate this
	 * device tree node.
	 */
	lan0: lan0 {
		status = "ok";
		phy-mode = "rgmii";
		qcom,id = <2>;

		fixed-link {
			speed = <1000>;
			full-duplex;
		};
	};
	/*
	 * qca8k offload uses DSA (distributed switch architecture).
	 * DSA requires access to the mdio bus and ethernet net_device.
	 */
	dsa@0 {
		compatible = "qca,ar8xxx";
		#address-cells = <2>;
		#size-cells = <0>;

		dsa,ethernet = <&wan0>;
		dsa,mii-bus = <&mdio0>;

		switch@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0 0>;	/* MDIO address 0, switch 0 in tree */

			port@0 {
				reg = <0>;
				label = "cpu";
			};

			port@1 {
				reg = <1>;
				label = "lan1";
				phy-handle = <&phy_port1>;
			};

			port@2 {
				reg = <2>;
				label = "lan2";
				phy-handle = <&phy_port2>;
			};

			port@3 {
				reg = <3>;
				label = "lan3";
				phy-handle = <&phy_port3>;
			};

			port@4 {
				reg = <4>;
				label = "lan4";
				phy-handle = <&phy_port4>;
			};

			wan_port: port@5 {
				reg = <5>;
				label = "wan";
				phy-handle = <&phy_port5>;
			};
		};
	};
};