tree 1391ca01bf6b30cc00e7f5126d10bd9d65001e74
parent ad7d5c1d453a02d46ba25b616092921a0ea0bf92
author Sean Howarth <showarth@google.com> 1368064549 -0700
committer Sean Howarth <showarth@google.com> 1368064549 -0700

feroceon-kw2: lower i2c bus speed to 96 khz.

I2C bus speed is derived from the following:

Fscl = Ftclk / (10 * (M + 1) * 2^(N + 1))

Current settings for M and N were based on 133 MHz Tclk, but yield a 139 KHz
Fscl with our 200 MHz Tclk.

Change-Id: Iabb10f31a209ac4e91d1edacefdea1cd82714a9a