feroceon-kw2: lower i2c bus speed to 96 khz.

I2C bus speed is derived from the following:

Fscl = Ftclk / (10 * (M + 1) * 2^(N + 1))

Current settings for M and N were based on 133 MHz Tclk, but yield a 139 KHz
Fscl with our 200 MHz Tclk.

Change-Id: Iabb10f31a209ac4e91d1edacefdea1cd82714a9a
1 file changed