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*******************************************************************************/

#define MV_ASMLANGUAGE
#include "mvCommon.h"
#include "mvOsAsm.h"
#include "ctrlEnv/mvCtrlEnvSpec.h"
#include "mvDeviceId.h"
#include "mvCtrlEnvRegs.h"
#include "mvCpuIfRegs.h"
#include "mvCtrlEnvAsm.h"

/*******************************************************************************
* mvCpuIfPreInit - Make early initialization of CPU interface.
*
* DESCRIPTION:
*       The function will initialize the CPU interface parameters that must
*       be initialize before any BUS activity towards the DDR interface,
*       which means it must be executed from ROM. Because of that, the function
*       is implemented in assembly code.
*       The function configure the following CPU config register parameters:
*       1) CPU2MbusLTickDrv
*       2) CPU2MbusLTickSample.
*       NOTE: This function must be called AFTER the internal register
*       base is modified to INTER_REGS_BASE.
*
* INPUT:
*       None.
*
* OUTPUT:
*       None.
*
* RETURN:
*       None.
*
*       r11 holds return function address.
*******************************************************************************/
#define MV88F6281_PCKG_OPT	2
#define MV88F6192_PCKG_OPT	1
#define MV88F6180_PCKG_OPT	0

.global _mvCpuIfPreInit

_mvCpuIfPreInit:

mov r11, LR			/* Save link register */
    b done
#if 0
    /* Read device ID  */
MV_CTRL_MODEL_GET_ASM(r4, r5);

	/* goto calcConfigReg if device is 6281/6282 */
ldr r5, = MV88F6281_PCKG_OPT cmp r4, r5 beq calcConfigReg
    /* goto calcConfigReg if device is 6192/6190 */
    ldr r5, = MV88F6192_PCKG_OPT cmp r4, r5 beq calcConfigReg
    /* Else 6180 */
    /* Get the "sample on reset" register */
MV_REG_READ_ASM(r4, r5, MPP_SAMPLE_AT_RESET)
ldr r5, = MSAR_CPUCLCK_MASK_6180 and r5, r4, r5 mov r5, r5, lsr
#MSAR_CPUCLCK_OFFS_6180
    ldr r4, = CPU_2_MBUSL_DDR_CLK_1x3 cmp r5,
#CPU_2_DDR_CLK_1x3_1
    beq setConfigReg ldr r4, = CPU_2_MBUSL_DDR_CLK_1x4 cmp r5,
#CPU_2_DDR_CLK_1x4_1
beq setConfigReg b setConfigReg calcConfigReg:
	/* Get the "sample on reset" register */
MV_REG_READ_ASM(r4, r5, MPP_SAMPLE_AT_RESET)
ldr r5, = MSAR_DDRCLCK_RTIO_MASK and r5, r4, r5 mov r5, r5, lsr
#MSAR_DDRCLCK_RTIO_OFFS
    ldr r4, = CPU_2_MBUSL_DDR_CLK_1x3 cmp r5,
#CPU_2_DDR_CLK_1x3
    beq setConfigReg ldr r4, = CPU_2_MBUSL_DDR_CLK_1x4 cmp r5,
#CPU_2_DDR_CLK_1x4
    beq setConfigReg
    /* Else */
ldr r4, = 0 setConfigReg:
	/* Read CPU Config register */
MV_REG_READ_ASM(r7, r5, CPU_CONFIG_REG)
    ldr r5, = ~(CCR_CPU_2_MBUSL_TICK_DRV_MASK | CCR_CPU_2_MBUSL_TICK_SMPL_MASK)
and r7, r7, r5			/* Clear register fields */
 orr r7, r7, r4			/* Set the values according to the findings */
MV_REG_WRITE_ASM(r7, r5, CPU_CONFIG_REG)
#endif
done:mov PC, r11		/* r11 is saved link register */