/include/ "skeleton.dtsi"

/ {
	compatible = "nvidia,tegra20";
	interrupt-parent = <&intc>;

	intc: interrupt-controller@50041000 {
		compatible = "nvidia,tegra20-gic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = < 0x50041000 0x1000 >,
		      < 0x50040100 0x0100 >;
	};

	i2c@7000c000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-i2c";
		reg = <0x7000C000 0x100>;
		interrupts = < 70 >;
	};

	i2c@7000c400 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-i2c";
		reg = <0x7000C400 0x100>;
		interrupts = < 116 >;
	};

	i2c@7000c500 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-i2c";
		reg = <0x7000C500 0x100>;
		interrupts = < 124 >;
	};

	i2c@7000d000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-i2c";
		reg = <0x7000D000 0x200>;
		interrupts = < 85 >;
	};

	i2s@70002800 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-i2s";
		reg = <0x70002800 0x200>;
		interrupts = < 45 >;
		dma-channel = < 2 >;
	};

	i2s@70002a00 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-i2s";
		reg = <0x70002a00 0x200>;
		interrupts = < 35 >;
		dma-channel = < 1 >;
	};

	das@70000c00 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nvidia,tegra20-das";
		reg = <0x70000c00 0x80>;
	};

	gpio: gpio@6000d000 {
		compatible = "nvidia,tegra20-gpio";
		reg = < 0x6000d000 0x1000 >;
		interrupts = < 64 65 66 67 87 119 121 >;
		#gpio-cells = <2>;
		gpio-controller;
	};

	pinmux: pinmux@70000000 {
		compatible = "nvidia,tegra20-pinmux";
		reg = < 0x70000014 0x10    /* Tri-state registers */
			0x70000080 0x20    /* Mux registers */
			0x700000a0 0x14    /* Pull-up/down registers */
			0x70000868 0xa8 >; /* Pad control registers */
	};

	serial@70006000 {
		compatible = "nvidia,tegra20-uart";
		reg = <0x70006000 0x40>;
		reg-shift = <2>;
		interrupts = < 68 >;
	};

	serial@70006040 {
		compatible = "nvidia,tegra20-uart";
		reg = <0x70006040 0x40>;
		reg-shift = <2>;
		interrupts = < 69 >;
	};

	serial@70006200 {
		compatible = "nvidia,tegra20-uart";
		reg = <0x70006200 0x100>;
		reg-shift = <2>;
		interrupts = < 78 >;
	};

	serial@70006300 {
		compatible = "nvidia,tegra20-uart";
		reg = <0x70006300 0x100>;
		reg-shift = <2>;
		interrupts = < 122 >;
	};

	serial@70006400 {
		compatible = "nvidia,tegra20-uart";
		reg = <0x70006400 0x100>;
		reg-shift = <2>;
		interrupts = < 123 >;
	};

	sdhci@c8000000 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000000 0x200>;
		interrupts = < 46 >;
	};

	sdhci@c8000200 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000200 0x200>;
		interrupts = < 47 >;
	};

	sdhci@c8000400 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000400 0x200>;
		interrupts = < 51 >;
	};

	sdhci@c8000600 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000600 0x200>;
		interrupts = < 63 >;
	};
};