commit 018e1b87fad65e63d83240d8b7c4949d3079ba15
author Matthias Kaehlcke <mka@google.com> Mon Mar 28 14:01:15 2016 -0700
committer Matthias Kaehlcke <mka@google.com> Tue Mar 29 16:07:10 2016 -0700
tree 4e5c821fd6eaf38c610df15e7091dcc487b15140
parent 210586663e1ed78e04b6a01dad4cc2bcd6ddd552

ARM Cortex A9: Add support for stalled cycle perf counters

Change-Id: I226e86010769d874c4a7253efdd6f071095ab47c

arch/arm/kernel/perf_event_v7.c

diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 1049319..47f1f07 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -329,6 +329,8 @@
 	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
 	[PERF_COUNT_HW_BRANCH_MISSES]	    = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
 	[PERF_COUNT_HW_BUS_CYCLES]	    = ARMV7_PERFCTR_CLOCK_CYCLES,
+	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES,
+	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV7_PERFCTR_ISSUE_STAGE_NO_INST,
 };
 
 static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]