/***************************************************************************
 *     Copyright (c) 1999-2009, Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 *
 * Module Description:
 *                     DO NOT EDIT THIS FILE DIRECTLY
 *
 * This module was generated magically with RDB from a source description
 * file. You must edit the source file for changes to be made to this file.
 *
 *
 * Date:           Generated on         Mon May  4 16:36:35 2009
 *                 MD5 Checksum         41a22724f57416cfb69cc3f3286da43f
 *
 * Compiled with:  RDB Utility          combo_header.pl
 *                 RDB Parser           3.0
 *                 unknown              unknown
 *                 Perl Interpreter     5.008008
 *                 Operating System     linux
 *
 * Revision History:
 *
 * $brcm_Log: /magnum/basemodules/chp/7550/rdb/a0/bchp_irq1.h $
 * 
 * Hydra_Software_Devel/1   5/4/09 7:07p albertl
 * PR54730: Initial revision.
 *
 ***************************************************************************/

#ifndef BCHP_IRQ1_H__
#define BCHP_IRQ1_H__

/***************************************************************************
 *IRQ1 - Level 2 PCI Interrupt Enable/Status
 ***************************************************************************/
#define BCHP_IRQ1_IRQEN                          0x004067c0 /* UPG Shared Interrupt Enable */
#define BCHP_IRQ1_IRQSTAT                        0x004067c4 /* UPG Shared Interrupt Status */
#define BCHP_IRQ1_SPI_IRQEN                      0x004067c8 /* SPI Master Interrupt Enable */
#define BCHP_IRQ1_SPI_IRQSTAT                    0x004067cc /* SPI Master Interrupt Status */
#define BCHP_IRQ1_BSC_IRQEN                      0x004067d0 /* BSC Master Interrupt Enable */
#define BCHP_IRQ1_BSC_IRQSTAT                    0x004067d4 /* BSC Master Interrupt Status */
#define BCHP_IRQ1_UART_IRQEN                     0x004067d8 /* UART Channel 0 Interrupt Enable */
#define BCHP_IRQ1_UART_IRQSTAT                   0x004067dc /* UART Channel 0 Interrupt Status */
#define BCHP_IRQ1_GPIO_IRQEN                     0x004067e0 /* GPIO Interrupt Enable */
#define BCHP_IRQ1_GPIO_IRQSTAT                   0x004067e4 /* GPIO Interrupt Status */
#define BCHP_IRQ1_ANT_IRQEN                      0x004067e8 /* Antenna Interface Interrupt Enable */
#define BCHP_IRQ1_ANT_IRQSTAT                    0x004067ec /* Antenna Interface Interrupt Status */

#endif /* #ifndef BCHP_IRQ1_H__ */

/* End of File */