/***************************************************************************
 *     Copyright (c) 1999-2011, Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 *
 * Module Description:
 *                     DO NOT EDIT THIS FILE DIRECTLY
 *
 * This module was generated magically with RDB from a source description
 * file. You must edit the source file for changes to be made to this file.
 *
 *
 * Date:           Generated on         Wed Sep  7 23:22:11 2011
 *                 MD5 Checksum         aff3518aefc2f3a6bc037a41f665574e
 *
 * Compiled with:  RDB Utility          combo_header.pl
 *                 RDB Parser           3.0
 *                 unknown              unknown
 *                 Perl Interpreter     5.008008
 *                 Operating System     linux
 *
 * Revision History:
 *
 * $brcm_Log: W:/pntruong/views/pntruong_97552_devel_sview/magnum/basemodules/chp/7552/rdb/b0/bchp_common.h $
 * 
 * Hydra_Software_Devel/2   9/8/11 1:01a pntruong
 * SW7552-89: Synced up with central rdb.
 *
 ***************************************************************************/

#ifndef BCHP_COMMON_H__
#define BCHP_COMMON_H__

/***************************************************************************
 *BCM7552_B0
 ***************************************************************************/
#define BCHP_PHYSICAL_OFFSET                               0x10000000
#define BCHP_REGISTER_START                                0x00000000 /* DECODE_RBNODE_REGS_0 is first */
#define BCHP_REGISTER_END                                  0x00d0fc10 /* THD_GR is last */
#define BCHP_REGISTER_SIZE                                 0x00343f04 /* Number of registers */

/****************************************************************************
 * Core instance register start address.
 ***************************************************************************/
#define BCHP_DECODE_RBNODE_REGS_0_REG_START                0x00000000
#define BCHP_DECODE_RBNODE_REGS_0_REG_END                  0x0000007c
#define BCHP_DECODE_MAIN_0_REG_START                       0x00000100
#define BCHP_DECODE_MAIN_0_REG_END                         0x000001fc
#define BCHP_SDRAM_DEBUG_0_REG_START                       0x00000200
#define BCHP_SDRAM_DEBUG_0_REG_END                         0x0000027c
#define BCHP_DECODE_MCOM_0_REG_START                       0x00000300
#define BCHP_DECODE_MCOM_0_REG_END                         0x0000031c
#define BCHP_DECODE_SPRE_0_REG_START                       0x00000320
#define BCHP_DECODE_SPRE_0_REG_END                         0x0000033c
#define BCHP_DECODE_WPRD_0_REG_START                       0x00000340
#define BCHP_DECODE_WPRD_0_REG_END                         0x0000035c
#define BCHP_DECODE_DQNT_0_REG_START                       0x00000400
#define BCHP_DECODE_DQNT_0_REG_END                         0x0000045c
#define BCHP_DECODE_DQNT_8X8_0_REG_START                   0x00000500
#define BCHP_DECODE_DQNT_8X8_0_REG_END                     0x0000057c
#define BCHP_DECODE_XFRM_0_REG_START                       0x00000700
#define BCHP_DECODE_XFRM_0_REG_END                         0x0000071c
#define BCHP_DECODE_DBLK_0_REG_START                       0x00000720
#define BCHP_DECODE_DBLK_0_REG_END                         0x0000073c
#define BCHP_DECODE_MB_0_REG_START                         0x00000740
#define BCHP_DECODE_MB_0_REG_END                           0x0000075c
#define BCHP_REG_CABAC2BINS_0_REG_START                    0x00000b00
#define BCHP_REG_CABAC2BINS_0_REG_END                      0x00000bfc
#define BCHP_DECODE_SINT_0_REG_START                       0x00000c00
#define BCHP_DECODE_SINT_0_REG_END                         0x00000dfc
#define BCHP_DECODE_RVC_0_REG_START                        0x00000e00
#define BCHP_DECODE_RVC_0_REG_END                          0x00000efc
#define BCHP_DECODE_CPUREGS_0_REG_START                    0x00000f00
#define BCHP_DECODE_CPUREGS_0_REG_END                      0x00000f7c
#define BCHP_DECODE_CPUREGS2_0_REG_START                   0x00000f80
#define BCHP_DECODE_CPUREGS2_0_REG_END                     0x00000ffc
#define BCHP_DECODE_CPUDMA_0_REG_START                     0x00001800
#define BCHP_DECODE_CPUDMA_0_REG_END                       0x000018fc
#define BCHP_DECODE_DMAMEM_0_REG_START                     0x00001a00
#define BCHP_DECODE_DMAMEM_0_REG_END                       0x000021fc
#define BCHP_REG_CABAC2BINS2_0_REG_START                   0x00002400
#define BCHP_REG_CABAC2BINS2_0_REG_END                     0x000027fc
#define BCHP_DECODE_WPTBL_0_REG_START                      0x00003000
#define BCHP_DECODE_WPTBL_0_REG_END                        0x000031fc
#define BCHP_DECODE_SINT_OLOOP_0_REG_START                 0x0000cc00
#define BCHP_DECODE_SINT_OLOOP_0_REG_END                   0x0000ccfc
#define BCHP_DECODE_SD_0_REG_START                         0x00040800
#define BCHP_DECODE_SD_0_REG_END                           0x00040ffc
#define BCHP_DECODE_IND_SDRAM_REGS_0_REG_START             0x00041000
#define BCHP_DECODE_IND_SDRAM_REGS_0_REG_END               0x0004107c
#define BCHP_DECODE_CPUCORE_0_REG_START                    0x00044000
#define BCHP_DECODE_CPUCORE_0_REG_END                      0x00044ffc
#define BCHP_DECODE_CPUAUX_0_REG_START                     0x00045000
#define BCHP_DECODE_CPUAUX_0_REG_END                       0x00045ffc
#define BCHP_DECODE_CPUIMEM_0_REG_START                    0x00046000
#define BCHP_DECODE_CPUIMEM_0_REG_END                      0x00047ffc
#define BCHP_DECODE_CPUDMEM_0_REG_START                    0x00048000
#define BCHP_DECODE_CPUDMEM_0_REG_END                      0x0004fffc
#define BCHP_DECODE_IND_SDRAM_REGS2_0_REG_START            0x00051000
#define BCHP_DECODE_IND_SDRAM_REGS2_0_REG_END              0x0005107c
#define BCHP_DECODE_CPUDMA2_0_REG_START                    0x00051800
#define BCHP_DECODE_CPUDMA2_0_REG_END                      0x000518fc
#define BCHP_DECODE_DMAMEM2_0_REG_START                    0x00051a00
#define BCHP_DECODE_DMAMEM2_0_REG_END                      0x000521fc
#define BCHP_DECODE_CPUCORE2_0_REG_START                   0x00054000
#define BCHP_DECODE_CPUCORE2_0_REG_END                     0x00054ffc
#define BCHP_DECODE_CPUAUX2_0_REG_START                    0x00055000
#define BCHP_DECODE_CPUAUX2_0_REG_END                      0x00055ffc
#define BCHP_DECODE_CPUIMEM2_0_REG_START                   0x00056000
#define BCHP_DECODE_CPUIMEM2_0_REG_END                     0x00057ffc
#define BCHP_DECODE_CPUDMEM2_0_REG_START                   0x00058000
#define BCHP_DECODE_CPUDMEM2_0_REG_END                     0x0005fffc
#define BCHP_DECODE_IP_SHIM_0_REG_START                    0x00060000
#define BCHP_DECODE_IP_SHIM_0_REG_END                      0x00060080
#define BCHP_AVD_CACHE_0_REG_START                         0x00062000
#define BCHP_AVD_CACHE_0_REG_END                           0x0006203c
#define BCHP_AVD_INTR2_0_REG_START                         0x00080000
#define BCHP_AVD_INTR2_0_REG_END                           0x0008002c
#define BCHP_AVD_RGR_0_REG_START                           0x00080400
#define BCHP_AVD_RGR_0_REG_END                             0x00080410
#define BCHP_VICH_0_REG_START                              0x00170000
#define BCHP_VICH_0_REG_END                                0x0017008b
#define BCHP_BESTROM_REG_START                             0x00200000
#define BCHP_BESTROM_REG_END                               0x00203ffc
#define BCHP_BSP_CMDBUF_REG_START                          0x00329800
#define BCHP_BSP_CMDBUF_REG_END                            0x00329ffc
#define BCHP_BSP_GLB_CONTROL_REG_START                     0x0032b000
#define BCHP_BSP_GLB_CONTROL_REG_END                       0x0032b098
#define BCHP_BSP_PKL_REG_START                             0x0032b300
#define BCHP_BSP_PKL_REG_END                               0x0032b37c
#define BCHP_BSP_INST_PATCH_CTRL_REG_START                 0x0032b400
#define BCHP_BSP_INST_PATCH_CTRL_REG_END                   0x0032b404
#define BCHP_BSP_CONTROL_INTR2_REG_START                   0x0032b800
#define BCHP_BSP_CONTROL_INTR2_REG_END                     0x0032b82c
#define BCHP_BSP_INST_PATCHRAM_REG_START                   0x0032c000
#define BCHP_BSP_INST_PATCHRAM_REG_END                     0x0032fffc
#define BCHP_XPT_SECURITY_REG_START                        0x00360000
#define BCHP_XPT_SECURITY_REG_END                          0x0036fffc
#define BCHP_MMSCRAM_REG_START                             0x00370000
#define BCHP_MMSCRAM_REG_END                               0x00371ffc
#define BCHP_MEM_DMA_SECURE_REG_START                      0x00372000
#define BCHP_MEM_DMA_SECURE_REG_END                        0x0037200c
#define BCHP_SECTOP_GRB_REG_START                          0x00374000
#define BCHP_SECTOP_GRB_REG_END                            0x0037400c
#define BCHP_JTAG_OTP_REG_START                            0x00374100
#define BCHP_JTAG_OTP_REG_END                              0x00374138
#define BCHP_MEM_DMA_0_REG_START                           0x00374200
#define BCHP_MEM_DMA_0_REG_END                             0x00374224
#define BCHP_XPT_SECURITY_NS_REG_START                     0x00374300
#define BCHP_XPT_SECURITY_NS_REG_END                       0x00374310
#define BCHP_MEMC_GEN_0_REG_START                          0x003b0000
#define BCHP_MEMC_GEN_0_REG_END                            0x003b04f8
#define BCHP_MEMC_ARB_0_REG_START                          0x003b1000
#define BCHP_MEMC_ARB_0_REG_END                            0x003b1244
#define BCHP_MEMC_DDR_0_REG_START                          0x003b2000
#define BCHP_MEMC_DDR_0_REG_END                            0x003b22fc
#define BCHP_MEMC_L2_0_REG_START                           0x003b3000
#define BCHP_MEMC_L2_0_REG_END                             0x003b302c
#define BCHP_MEMC_L2_1_0_REG_START                         0x003b3800
#define BCHP_MEMC_L2_1_0_REG_END                           0x003b382c
#define BCHP_MEMC_RGRB_0_REG_START                         0x003b4000
#define BCHP_MEMC_RGRB_0_REG_END                           0x003b4010
#define BCHP_MEMC_MISC_0_REG_START                         0x003b5000
#define BCHP_MEMC_MISC_0_REG_END                           0x003b5010
#define BCHP_DDR40_PHY_CONTROL_REGS_0_REG_START            0x003b6000
#define BCHP_DDR40_PHY_CONTROL_REGS_0_REG_END              0x003b60c4
#define BCHP_DDR40_PHY_WORD_LANE_0_0_REG_START             0x003b6200
#define BCHP_DDR40_PHY_WORD_LANE_0_0_REG_END               0x003b63b0
#define BCHP_MEMC_DDR23_SHIM_ADDR_CNTL_0_REG_START         0x003b8000
#define BCHP_MEMC_DDR23_SHIM_ADDR_CNTL_0_REG_END           0x003b8138
#define BCHP_S_MEMC_0_REG_START                            0x003ba000
#define BCHP_S_MEMC_0_REG_END                              0x003ba220
#define BCHP_SUN_GISB_ARB_REG_START                        0x00400000
#define BCHP_SUN_GISB_ARB_REG_END                          0x004000d8
#define BCHP_SUN_RGR_REG_START                             0x00400400
#define BCHP_SUN_RGR_REG_END                               0x00400410
#define BCHP_SUN_RG_REG_START                              0x00400800
#define BCHP_SUN_RG_REG_END                                0x0040080c
#define BCHP_SUN_L2_REG_START                              0x00403000
#define BCHP_SUN_L2_REG_END                                0x0040302c
#define BCHP_SM_L2_REG_START                               0x00403400
#define BCHP_SM_L2_REG_END                                 0x0040342c
#define BCHP_SM_REG_START                                  0x00403800
#define BCHP_SM_REG_END                                    0x00403824
#define BCHP_SM_FAST_REG_START                             0x00403c00
#define BCHP_SM_FAST_REG_END                               0x00403c18
#define BCHP_SUN_TOP_CTRL_REG_START                        0x00404000
#define BCHP_SUN_TOP_CTRL_REG_END                          0x00404518
#define BCHP_IRB_REG_START                                 0x00406000
#define BCHP_IRB_REG_END                                   0x00406138
#define BCHP_PM_REG_START                                  0x00406180
#define BCHP_PM_REG_END                                    0x00406188
#define BCHP_BSCA_REG_START                                0x00406200
#define BCHP_BSCA_REG_END                                  0x00406254
#define BCHP_BSCB_REG_START                                0x00406280
#define BCHP_BSCB_REG_END                                  0x004062d4
#define BCHP_BSCC_REG_START                                0x00406300
#define BCHP_BSCC_REG_END                                  0x00406354
#define BCHP_PWM_REG_START                                 0x00406400
#define BCHP_PWM_REG_END                                   0x00406424
#define BCHP_GIO_REG_START                                 0x00406500
#define BCHP_GIO_REG_END                                   0x0040659c
#define BCHP_IRQ0_REG_START                                0x00406600
#define BCHP_IRQ0_REG_END                                  0x00406604
#define BCHP_IRQ1_REG_START                                0x00406640
#define BCHP_IRQ1_REG_END                                  0x00406644
#define BCHP_TIMER_REG_START                               0x00406680
#define BCHP_TIMER_REG_END                                 0x004066bc
#define BCHP_UARTA_REG_START                               0x00406800
#define BCHP_UARTA_REG_END                                 0x0040681c
#define BCHP_UARTB_REG_START                               0x00406840
#define BCHP_UARTB_REG_END                                 0x0040685c
#define BCHP_UARTC_REG_START                               0x00406880
#define BCHP_UARTC_REG_END                                 0x0040689c
#define BCHP_SCA_REG_START                                 0x00406a00
#define BCHP_SCA_REG_END                                   0x00406abc
#define BCHP_SCB_REG_START                                 0x00406b00
#define BCHP_SCB_REG_END                                   0x00406bbc
#define BCHP_SCIRQ0_REG_START                              0x00406c00
#define BCHP_SCIRQ0_REG_END                                0x00406c04
#define BCHP_SCIRQ1_REG_START                              0x00406c80
#define BCHP_SCIRQ1_REG_END                                0x00406c84
#define BCHP_MCIF_REG_START                                0x00406d00
#define BCHP_MCIF_REG_END                                  0x00406d20
#define BCHP_MCIF_INTR2_REG_START                          0x00406d40
#define BCHP_MCIF_INTR2_REG_END                            0x00406d6c
#define BCHP_AON_CTRL_REG_START                            0x00408000
#define BCHP_AON_CTRL_REG_END                              0x004083fc
#define BCHP_AON_L2_REG_START                              0x00408400
#define BCHP_AON_L2_REG_END                                0x0040842c
#define BCHP_AON_PM_L2_REG_START                           0x00408440
#define BCHP_AON_PM_L2_REG_END                             0x0040846c
#define BCHP_AON_PIN_CTRL_REG_START                        0x00408500
#define BCHP_AON_PIN_CTRL_REG_END                          0x0040851c
#define BCHP_AON_HDMI_TX_REG_START                         0x00408600
#define BCHP_AON_HDMI_TX_REG_END                           0x00408698
#define BCHP_LDK_REG_START                                 0x00408800
#define BCHP_LDK_REG_END                                   0x0040883c
#define BCHP_PM_AON_REG_START                              0x00408840
#define BCHP_PM_AON_REG_END                                0x00408848
#define BCHP_ICAP_REG_START                                0x00408880
#define BCHP_ICAP_REG_END                                  0x004088bc
#define BCHP_KBD1_REG_START                                0x004088c0
#define BCHP_KBD1_REG_END                                  0x004088fc
#define BCHP_KBD2_REG_START                                0x00408900
#define BCHP_KBD2_REG_END                                  0x0040893c
#define BCHP_KBD3_REG_START                                0x00408940
#define BCHP_KBD3_REG_END                                  0x0040897c
#define BCHP_BSCD_REG_START                                0x00408980
#define BCHP_BSCD_REG_END                                  0x004089d4
#define BCHP_MSPI_REG_START                                0x00408a00
#define BCHP_MSPI_REG_END                                  0x00408b7c
#define BCHP_IRQ0_AON_REG_START                            0x00408b80
#define BCHP_IRQ0_AON_REG_END                              0x00408b84
#define BCHP_IRQ1_AON_REG_START                            0x00408b88
#define BCHP_IRQ1_AON_REG_END                              0x00408b8c
#define BCHP_GIO_AON_REG_START                             0x00408c00
#define BCHP_GIO_AON_REG_END                               0x00408c5c
#define BCHP_BICAP_REG_START                               0x00408e00
#define BCHP_BICAP_REG_END                                 0x00408e38
#define BCHP_UPG_AUX_AON_INTR2_REG_START                   0x00408e40
#define BCHP_UPG_AUX_AON_INTR2_REG_END                     0x00408e6c
#define BCHP_WKTMR_REG_START                               0x00408e80
#define BCHP_WKTMR_REG_END                                 0x00408e90
#define BCHP_SYS_GISB_ARB_SEC_REG_START                    0x0040e000
#define BCHP_SYS_GISB_ARB_SEC_REG_END                      0x0040e0b4
#define BCHP_SYS_TOP_CTRL_SEC_REG_START                    0x0040e700
#define BCHP_SYS_TOP_CTRL_SEC_REG_END                      0x0040e704
#define BCHP_AON_CTRL_SECURE_REG_START                     0x0040e800
#define BCHP_AON_CTRL_SECURE_REG_END                       0x0040e87c
#define BCHP_SDIO_0_HOST_REG_START                         0x00410000
#define BCHP_SDIO_0_HOST_REG_END                           0x004100fc
#define BCHP_SDIO_0_CFG_REG_START                          0x00410100
#define BCHP_SDIO_0_CFG_REG_END                            0x004101fc
#define BCHP_MISB_BRIDGE_REG_START                         0x00410400
#define BCHP_MISB_BRIDGE_REG_END                           0x00410410
#define BCHP_EBI_REG_START                                 0x00410800
#define BCHP_EBI_REG_END                                   0x00410bfc
#define BCHP_HIF_INTR2_REG_START                           0x00411000
#define BCHP_HIF_INTR2_REG_END                             0x0041102c
#define BCHP_IPI0_INTR2_REG_START                          0x00411100
#define BCHP_IPI0_INTR2_REG_END                            0x0041112c
#define BCHP_IPI1_INTR2_REG_START                          0x00411200
#define BCHP_IPI1_INTR2_REG_END                            0x0041122c
#define BCHP_HIF_CPU_INTR1_REG_START                       0x00411400
#define BCHP_HIF_CPU_INTR1_REG_END                         0x0041142c
#define BCHP_HIF_RGR_REG_START                             0x00411800
#define BCHP_HIF_RGR_REG_END                               0x00411810
#define BCHP_HIF_SPI_INTR2_REG_START                       0x00411d00
#define BCHP_HIF_SPI_INTR2_REG_END                         0x00411d2c
#define BCHP_HIF_TOP_CTRL_REG_START                        0x00412400
#define BCHP_HIF_TOP_CTRL_REG_END                          0x0041241c
#define BCHP_NAND_REG_START                                0x00412800
#define BCHP_NAND_REG_END                                  0x00412bfc
#define BCHP_BSPI_REG_START                                0x00413000
#define BCHP_BSPI_REG_END                                  0x0041304c
#define BCHP_BSPI_RAF_REG_START                            0x00413100
#define BCHP_BSPI_RAF_REG_END                              0x00413120
#define BCHP_HIF_MSPI_REG_START                            0x00413200
#define BCHP_HIF_MSPI_REG_END                              0x00413384
#define BCHP_MICH_REG_START                                0x00414000
#define BCHP_MICH_REG_END                                  0x00414000
#define BCHP_HIF_SECURE_CTRL_REG_START                     0x00414100
#define BCHP_HIF_SECURE_CTRL_REG_END                       0x00414100
#define BCHP_HIF_SECURE_BSPI_REG_START                     0x00414200
#define BCHP_HIF_SECURE_BSPI_REG_END                       0x00414200
#define BCHP_HIF_SECURE_LR_SPI_REG_START                   0x00414300
#define BCHP_HIF_SECURE_LR_SPI_REG_END                     0x00414300
#define BCHP_NAND_SECURE_REG_START                         0x00414400
#define BCHP_NAND_SECURE_REG_END                           0x00414400
#define BCHP_HIF_SECURE_INDIRECT_SPI_PIPE_REG_START        0x00414800
#define BCHP_HIF_SECURE_INDIRECT_SPI_PIPE_REG_END          0x00414800
#define BCHP_CLKGEN_REG_START                              0x00420000
#define BCHP_CLKGEN_REG_END                                0x00420370
#define BCHP_VCXO_RM_REG_START                             0x00422800
#define BCHP_VCXO_RM_REG_END                               0x0042282c
#define BCHP_AVS_HW_MNTR_REG_START                         0x00423000
#define BCHP_AVS_HW_MNTR_REG_END                           0x00423074
#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START                 0x00423100
#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END                   0x0042311c
#define BCHP_AVS_ASB_REGISTERS_REG_START                   0x00423200
#define BCHP_AVS_ASB_REGISTERS_REG_END                     0x00423218
#define BCHP_AVS_RO_REGISTERS_0_REG_START                  0x00423300
#define BCHP_AVS_RO_REGISTERS_0_REG_END                    0x004233dc
#define BCHP_AVS_RO_REGISTERS_1_REG_START                  0x00423400
#define BCHP_AVS_RO_REGISTERS_1_REG_END                    0x004234a4
#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START                0x00423500
#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END                  0x004235e4
#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START                0x00423600
#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END                  0x004236e4
#define BCHP_CLKGEN_INTR2_REG_START                        0x00424000
#define BCHP_CLKGEN_INTR2_REG_END                          0x0042402c
#define BCHP_CLKGEN_GR_REG_START                           0x00424800
#define BCHP_CLKGEN_GR_REG_END                             0x0042480c
#define BCHP_GENET_0_SYS_REG_START                         0x00430000
#define BCHP_GENET_0_SYS_REG_END                           0x0043000c
#define BCHP_GENET_0_GR_BRIDGE_REG_START                   0x00430040
#define BCHP_GENET_0_GR_BRIDGE_REG_END                     0x0043004c
#define BCHP_GENET_0_EXT_REG_START                         0x00430080
#define BCHP_GENET_0_EXT_REG_END                           0x00430098
#define BCHP_GENET_0_INTRL2_0_REG_START                    0x00430200
#define BCHP_GENET_0_INTRL2_0_REG_END                      0x0043022c
#define BCHP_GENET_0_INTRL2_1_REG_START                    0x00430240
#define BCHP_GENET_0_INTRL2_1_REG_END                      0x0043026c
#define BCHP_GENET_0_RBUF_REG_START                        0x00430300
#define BCHP_GENET_0_RBUF_REG_END                          0x004303ec
#define BCHP_GENET_0_TBUF_REG_START                        0x00430600
#define BCHP_GENET_0_TBUF_REG_END                          0x00430628
#define BCHP_GENET_0_UMAC_REG_START                        0x00430800
#define BCHP_GENET_0_UMAC_REG_END                          0x00430ed8
#define BCHP_GENET_0_HFB_REG_START                         0x00431000
#define BCHP_GENET_0_HFB_REG_END                           0x00432010
#define BCHP_GENET_0_RDMA_REG_START                        0x00433000
#define BCHP_GENET_0_RDMA_REG_END                          0x00433cb4
#define BCHP_GENET_0_TDMA_REG_START                        0x00434000
#define BCHP_GENET_0_TDMA_REG_END                          0x00434c88
#define BCHP_M2MC_REG_START                                0x00450000
#define BCHP_M2MC_REG_END                                  0x004507fc
#define BCHP_M2MC_TOP_L2_REG_START                         0x00451000
#define BCHP_M2MC_TOP_L2_REG_END                           0x0045102c
#define BCHP_M2MC_TOP_GR_BRIDGE_REG_START                  0x00452000
#define BCHP_M2MC_TOP_GR_BRIDGE_REG_END                    0x0045200c
#define BCHP_USB_INTR2_REG_START                           0x00480000
#define BCHP_USB_INTR2_REG_END                             0x0048002c
#define BCHP_USB_GR_BRIDGE_REG_START                       0x00480100
#define BCHP_USB_GR_BRIDGE_REG_END                         0x0048010c
#define BCHP_USB_CTRL_REG_START                            0x00480200
#define BCHP_USB_CTRL_REG_END                              0x00480238
#define BCHP_USB_EHCI_REG_START                            0x00480300
#define BCHP_USB_EHCI_REG_END                              0x004803a4
#define BCHP_USB_OHCI_REG_START                            0x00480400
#define BCHP_USB_OHCI_REG_END                              0x00480458
#define BCHP_BOOTROM_REG_START                             0x00500000
#define BCHP_BOOTROM_REG_END                               0x00500ffc
#define BCHP_MFD_0_REG_START                               0x00600000
#define BCHP_MFD_0_REG_END                                 0x006001fc
#define BCHP_VFD_0_REG_START                               0x00601000
#define BCHP_VFD_0_REG_END                                 0x006011fc
#define BCHP_VFD_1_REG_START                               0x00601200
#define BCHP_VFD_1_REG_END                                 0x006013fc
#define BCHP_RDC_REG_START                                 0x00602000
#define BCHP_RDC_REG_END                                   0x006029fc
#define BCHP_BVNF_INTR2_0_REG_START                        0x00603000
#define BCHP_BVNF_INTR2_0_REG_END                          0x0060302c
#define BCHP_BVNF_INTR2_1_REG_START                        0x00603100
#define BCHP_BVNF_INTR2_1_REG_END                          0x0060312c
#define BCHP_BVNF_INTR2_3_REG_START                        0x00603300
#define BCHP_BVNF_INTR2_3_REG_END                          0x0060332c
#define BCHP_BVNF_INTR2_4_REG_START                        0x00603400
#define BCHP_BVNF_INTR2_4_REG_END                          0x0060342c
#define BCHP_BVNF_INTR2_5_REG_START                        0x00603500
#define BCHP_BVNF_INTR2_5_REG_END                          0x0060352c
#define BCHP_BVNF_INTR2_6_REG_START                        0x00603600
#define BCHP_BVNF_INTR2_6_REG_END                          0x0060362c
#define BCHP_BVNF_INTR2_7_REG_START                        0x00603700
#define BCHP_BVNF_INTR2_7_REG_END                          0x0060372c
#define BCHP_FMISC_REG_START                               0x00604000
#define BCHP_FMISC_REG_END                                 0x00604020
#define BCHP_SCL_0_REG_START                               0x00620000
#define BCHP_SCL_0_REG_END                                 0x006203fc
#define BCHP_SCL_1_REG_START                               0x00620800
#define BCHP_SCL_1_REG_END                                 0x00620bfc
#define BCHP_VNET_F_REG_START                              0x00622000
#define BCHP_VNET_F_REG_END                                0x0062209c
#define BCHP_VNET_B_REG_START                              0x00622200
#define BCHP_VNET_B_REG_END                                0x006222ac
#define BCHP_MMISC_REG_START                               0x00622800
#define BCHP_MMISC_REG_END                                 0x00622820
#define BCHP_LBOX_0_REG_START                              0x00625000
#define BCHP_LBOX_0_REG_END                                0x00625070
#define BCHP_BVNM_INTR2_0_REG_START                        0x00626000
#define BCHP_BVNM_INTR2_0_REG_END                          0x0062602c
#define BCHP_DNR_0_REG_START                               0x00627000
#define BCHP_DNR_0_REG_END                                 0x006270a4
#define BCHP_CAP_0_REG_START                               0x00640000
#define BCHP_CAP_0_REG_END                                 0x0064007c
#define BCHP_CAP_1_REG_START                               0x00640200
#define BCHP_CAP_1_REG_END                                 0x0064027c
#define BCHP_GFD_0_REG_START                               0x00641000
#define BCHP_GFD_0_REG_END                                 0x00641228
#define BCHP_GFD_1_REG_START                               0x00641400
#define BCHP_GFD_1_REG_END                                 0x00641628
#define BCHP_CMP_0_REG_START                               0x00642000
#define BCHP_CMP_0_REG_END                                 0x00642264
#define BCHP_CMP_1_REG_START                               0x00642800
#define BCHP_CMP_1_REG_END                                 0x00642cb4
#define BCHP_TNT_CMP_0_V0_REG_START                        0x00643000
#define BCHP_TNT_CMP_0_V0_REG_END                          0x006430a4
#define BCHP_MASK_0_REG_START                              0x00643400
#define BCHP_MASK_0_REG_END                                0x0064341c
#define BCHP_PEP_CMP_0_V0_REG_START                        0x00644000
#define BCHP_PEP_CMP_0_V0_REG_END                          0x00645484
#define BCHP_BVNB_INTR2_REG_START                          0x00646000
#define BCHP_BVNB_INTR2_REG_END                            0x0064602c
#define BCHP_BMISC_REG_START                               0x00646400
#define BCHP_BMISC_REG_END                                 0x0064641c
#define BCHP_MVP_TOP_0_REG_START                           0x00660000
#define BCHP_MVP_TOP_0_REG_END                             0x0066002c
#define BCHP_SIOB_0_REG_START                              0x00660200
#define BCHP_SIOB_0_REG_END                                0x006602fc
#define BCHP_HSCL_0_REG_START                              0x00660400
#define BCHP_HSCL_0_REG_END                                0x006607fc
#define BCHP_MDI_TOP_0_REG_START                           0x00662000
#define BCHP_MDI_TOP_0_REG_END                             0x00662044
#define BCHP_MDI_PPB_0_REG_START                           0x00662800
#define BCHP_MDI_PPB_0_REG_END                             0x00662bfc
#define BCHP_MDI_FCN_0_REG_START                           0x00662c00
#define BCHP_MDI_FCN_0_REG_END                             0x00662ffc
#define BCHP_MISC_REG_START                                0x00680000
#define BCHP_MISC_REG_END                                  0x0068007c
#define BCHP_IT_0_REG_START                                0x00681000
#define BCHP_IT_0_REG_END                                  0x006817fc
#define BCHP_IT_1_REG_START                                0x00682000
#define BCHP_IT_1_REG_END                                  0x006827fc
#define BCHP_VF_0_REG_START                                0x00683000
#define BCHP_VF_0_REG_END                                  0x00683134
#define BCHP_VF_1_REG_START                                0x00683200
#define BCHP_VF_1_REG_END                                  0x00683334
#define BCHP_SECAM_0_REG_START                             0x00683400
#define BCHP_SECAM_0_REG_END                               0x00683414
#define BCHP_SM_0_REG_START                                0x00683480
#define BCHP_SM_0_REG_END                                  0x006834ac
#define BCHP_SDSRC_0_REG_START                             0x00683500
#define BCHP_SDSRC_0_REG_END                               0x0068350c
#define BCHP_HDSRC_0_REG_START                             0x00683520
#define BCHP_HDSRC_0_REG_END                               0x0068353c
#define BCHP_CSC_0_REG_START                               0x00683580
#define BCHP_CSC_0_REG_END                                 0x006835b0
#define BCHP_CSC_1_REG_START                               0x00683600
#define BCHP_CSC_1_REG_END                                 0x00683630
#define BCHP_RM_0_REG_START                                0x00683680
#define BCHP_RM_0_REG_END                                  0x006836a4
#define BCHP_RM_1_REG_START                                0x006836c0
#define BCHP_RM_1_REG_END                                  0x006836e4
#define BCHP_ANA_DEBUG_0_REG_START                         0x00683700
#define BCHP_ANA_DEBUG_0_REG_END                           0x00683744
#define BCHP_GRPD_0_REG_START                              0x00683800
#define BCHP_GRPD_0_REG_END                                0x006838ec
#define BCHP_DTRAM_0_REG_START                             0x00684000
#define BCHP_DTRAM_0_REG_END                               0x0068447c
#define BCHP_DVI_DTG_0_REG_START                           0x00684800
#define BCHP_DVI_DTG_0_REG_END                             0x00684954
#define BCHP_DVI_CSC_0_REG_START                           0x00684a00
#define BCHP_DVI_CSC_0_REG_END                             0x00684a30
#define BCHP_DVI_DVF_0_REG_START                           0x00684b00
#define BCHP_DVI_DVF_0_REG_END                             0x00684b14
#define BCHP_DVI_DEBUG_0_REG_START                         0x00684c00
#define BCHP_DVI_DEBUG_0_REG_END                           0x00684c44
#define BCHP_VEC_CFG_REG_START                             0x00685000
#define BCHP_VEC_CFG_REG_END                               0x006850d4
#define BCHP_VIDEO_ENC_INTR2_REG_START                     0x00685400
#define BCHP_VIDEO_ENC_INTR2_REG_END                       0x0068542c
#define BCHP_VIDEO_ENC_TPG_0_REG_START                     0x00685500
#define BCHP_VIDEO_ENC_TPG_0_REG_END                       0x00685518
#define BCHP_VIDEO_ENC_DECIM_0_REG_START                   0x00685600
#define BCHP_VIDEO_ENC_DECIM_0_REG_END                     0x00685608
#define BCHP_DVP_DGEN_0_REG_START                          0x00685700
#define BCHP_DVP_DGEN_0_REG_END                            0x00685738
#define BCHP_VBI_ENC_REG_START                             0x00686000
#define BCHP_VBI_ENC_REG_END                               0x00686054
#define BCHP_CCE_0_REG_START                               0x00686400
#define BCHP_CCE_0_REG_END                                 0x00686458
#define BCHP_CCE_1_REG_START                               0x00686500
#define BCHP_CCE_1_REG_END                                 0x00686558
#define BCHP_WSE_0_REG_START                               0x00686600
#define BCHP_WSE_0_REG_END                                 0x00686614
#define BCHP_WSE_1_REG_START                               0x00686700
#define BCHP_WSE_1_REG_END                                 0x00686714
#define BCHP_CGMSAE_0_REG_START                            0x00686800
#define BCHP_CGMSAE_0_REG_END                              0x00686858
#define BCHP_CGMSAE_1_REG_START                            0x00686900
#define BCHP_CGMSAE_1_REG_END                              0x00686958
#define BCHP_TTE_0_REG_START                               0x00686a00
#define BCHP_TTE_0_REG_END                                 0x00686a28
#define BCHP_TTE_1_REG_START                               0x00686b00
#define BCHP_TTE_1_REG_END                                 0x00686b28
#define BCHP_GSE_0_REG_START                               0x00686c00
#define BCHP_GSE_0_REG_END                                 0x00686c80
#define BCHP_GSE_1_REG_START                               0x00686d00
#define BCHP_GSE_1_REG_END                                 0x00686d80
#define BCHP_AMOLE_0_REG_START                             0x00686e00
#define BCHP_AMOLE_0_REG_END                               0x00686e8c
#define BCHP_AMOLE_1_REG_START                             0x00686f00
#define BCHP_AMOLE_1_REG_END                               0x00686f8c
#define BCHP_DVP_HT_REG_START                              0x006a0000
#define BCHP_DVP_HT_REG_END                                0x006a0070
#define BCHP_HDMI_REG_START                                0x006a0800
#define BCHP_HDMI_REG_END                                  0x006a09b4
#define BCHP_HDMI_TX_PHY_REG_START                         0x006a0a80
#define BCHP_HDMI_TX_PHY_REG_END                           0x006a0ac0
#define BCHP_HDMI_RM_REG_START                             0x006a0b00
#define BCHP_HDMI_RM_REG_END                               0x006a0b2c
#define BCHP_HDMI_TX_INTR2_REG_START                       0x006a0b40
#define BCHP_HDMI_TX_INTR2_REG_END                         0x006a0b6c
#define BCHP_HDMI_RAM_REG_START                            0x006a0c00
#define BCHP_HDMI_RAM_REG_END                              0x006a0dfc
#define BCHP_BVN_RGR_REG_START                             0x006a8000
#define BCHP_BVN_RGR_REG_END                               0x006a8010
#define BCHP_RAAGA_DSP_RGR_REG_START                       0x00800000
#define BCHP_RAAGA_DSP_RGR_REG_END                         0x00800008
#define BCHP_RAAGA_DSP_MISC_REG_START                      0x00820000
#define BCHP_RAAGA_DSP_MISC_REG_END                        0x0082044c
#define BCHP_RAAGA_DSP_TIMERS_REG_START                    0x00821000
#define BCHP_RAAGA_DSP_TIMERS_REG_END                      0x00821058
#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START             0x00821080
#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END               0x0082109c
#define BCHP_RAAGA_DSP_PERI_SW_REG_START                   0x00821100
#define BCHP_RAAGA_DSP_PERI_SW_REG_END                     0x00821154
#define BCHP_RAAGA_DSP_DMA_REG_START                       0x00821400
#define BCHP_RAAGA_DSP_DMA_REG_END                         0x00821664
#define BCHP_RAAGA_DSP_ESR_SI_REG_START                    0x00822000
#define BCHP_RAAGA_DSP_ESR_SI_REG_END                      0x00822014
#define BCHP_RAAGA_DSP_INTH_REG_START                      0x00822200
#define BCHP_RAAGA_DSP_INTH_REG_END                        0x0082222c
#define BCHP_RAAGA_DSP_FW_INTH_REG_START                   0x00822400
#define BCHP_RAAGA_DSP_FW_INTH_REG_END                     0x0082242c
#define BCHP_RAAGA_DSP_FW_CFG_REG_START                    0x00823000
#define BCHP_RAAGA_DSP_FW_CFG_REG_END                      0x0082357c
#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START             0x00830000
#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END               0x0083bffc
#define BCHP_AIO_MISC_REG_START                            0x00880000
#define BCHP_AIO_MISC_REG_END                              0x00880010
#define BCHP_AIO_INTH_REG_START                            0x00880800
#define BCHP_AIO_INTH_REG_END                              0x0088082c
#define BCHP_AIO_INTD0_REG_START                           0x00880a00
#define BCHP_AIO_INTD0_REG_END                             0x00880a14
#define BCHP_AUD_FMM_MISC_REG_START                        0x008a0000
#define BCHP_AUD_FMM_MISC_REG_END                          0x008a010c
#define BCHP_AUD_FMM_BF_CTRL_REG_START                     0x008a2000
#define BCHP_AUD_FMM_BF_CTRL_REG_END                       0x008a2b7c
#define BCHP_AUD_FMM_BF_ESR0_H_REG_START                   0x008a3000
#define BCHP_AUD_FMM_BF_ESR0_H_REG_END                     0x008a3014
#define BCHP_AUD_FMM_BF_ESR1_H_REG_START                   0x008a3020
#define BCHP_AUD_FMM_BF_ESR1_H_REG_END                     0x008a3034
#define BCHP_AUD_FMM_BF_ESR2_H_REG_START                   0x008a3040
#define BCHP_AUD_FMM_BF_ESR2_H_REG_END                     0x008a3054
#define BCHP_AUD_FMM_BF_ESR0_D0_REG_START                  0x008a3100
#define BCHP_AUD_FMM_BF_ESR0_D0_REG_END                    0x008a3114
#define BCHP_AUD_FMM_BF_ESR1_D0_REG_START                  0x008a3120
#define BCHP_AUD_FMM_BF_ESR1_D0_REG_END                    0x008a3134
#define BCHP_AUD_FMM_BF_ESR2_D0_REG_START                  0x008a3140
#define BCHP_AUD_FMM_BF_ESR2_D0_REG_END                    0x008a3154
#define BCHP_AUD_FMM_SRC_CTRL0_REG_START                   0x008a4000
#define BCHP_AUD_FMM_SRC_CTRL0_REG_END                     0x008a4bfc
#define BCHP_AUD_FMM_SRC_ESR0_REG_START                    0x008a5000
#define BCHP_AUD_FMM_SRC_ESR0_REG_END                      0x008a5014
#define BCHP_AUD_FMM_DP_CTRL0_REG_START                    0x008a8000
#define BCHP_AUD_FMM_DP_CTRL0_REG_END                      0x008a98ec
#define BCHP_AUD_FMM_DP_ESR00_REG_START                    0x008abc00
#define BCHP_AUD_FMM_DP_ESR00_REG_END                      0x008abc14
#define BCHP_AUD_FMM_DP_ESR20_REG_START                    0x008abc80
#define BCHP_AUD_FMM_DP_ESR20_REG_END                      0x008abc94
#define BCHP_AUD_FMM_IOP_CTRL_REG_START                    0x008b8000
#define BCHP_AUD_FMM_IOP_CTRL_REG_END                      0x008b8144
#define BCHP_AUD_FMM_IOP_ESR_REG_START                     0x008b8400
#define BCHP_AUD_FMM_IOP_ESR_REG_END                       0x008b8414
#define BCHP_AUD_FMM_OP_CTRL_REG_START                     0x008ba000
#define BCHP_AUD_FMM_OP_CTRL_REG_END                       0x008ba1fc
#define BCHP_AUD_FMM_OP_ESR_REG_START                      0x008ba400
#define BCHP_AUD_FMM_OP_ESR_REG_END                        0x008ba414
#define BCHP_AUD_FMM_PLL0_REG_START                        0x008ba800
#define BCHP_AUD_FMM_PLL0_REG_END                          0x008ba834
#define BCHP_AUD_FMM_PLL1_REG_START                        0x008ba900
#define BCHP_AUD_FMM_PLL1_REG_END                          0x008ba934
#define BCHP_HIFIDAC_CTRL0_REG_START                       0x008bb000
#define BCHP_HIFIDAC_CTRL0_REG_END                         0x008bb1fc
#define BCHP_HIFIDAC_RM0_REG_START                         0x008bb200
#define BCHP_HIFIDAC_RM0_REG_END                           0x008bb224
#define BCHP_HIFIDAC_ESR0_REG_START                        0x008bb300
#define BCHP_HIFIDAC_ESR0_REG_END                          0x008bb314
#define BCHP_AUD_FMM_MS_CTRL_REG_START                     0x008bc000
#define BCHP_AUD_FMM_MS_CTRL_REG_END                       0x008bdbfc
#define BCHP_AUD_FMM_MS_ESR_REG_START                      0x008be000
#define BCHP_AUD_FMM_MS_ESR_REG_END                        0x008be014
#define BCHP_RAAGA_DSP_SEC0_REG_START                      0x00900000
#define BCHP_RAAGA_DSP_SEC0_REG_END                        0x00900000
#define BCHP_XPT_BUS_IF_REG_START                          0x00a00000
#define BCHP_XPT_BUS_IF_REG_END                            0x00a00088
#define BCHP_XPT_XMEMIF_REG_START                          0x00a01000
#define BCHP_XPT_XMEMIF_REG_END                            0x00a0109c
#define BCHP_XPT_PMU_REG_START                             0x00a01800
#define BCHP_XPT_PMU_REG_END                               0x00a01808
#define BCHP_XPT_WAKEUP_REG_START                          0x00a02000
#define BCHP_XPT_WAKEUP_REG_END                            0x00a02fbc
#define BCHP_XPT_RMX0_IO_REG_START                         0x00a03000
#define BCHP_XPT_RMX0_IO_REG_END                           0x00a03020
#define BCHP_XPT_RMX1_IO_REG_START                         0x00a03100
#define BCHP_XPT_RMX1_IO_REG_END                           0x00a03120
#define BCHP_XPT_FE_REG_START                              0x00a04000
#define BCHP_XPT_FE_REG_END                                0x00a04ffc
#define BCHP_XPT_DPCR0_REG_START                           0x00a06000
#define BCHP_XPT_DPCR0_REG_END                             0x00a06074
#define BCHP_XPT_DPCR1_REG_START                           0x00a06080
#define BCHP_XPT_DPCR1_REG_END                             0x00a060f4
#define BCHP_XPT_DPCR2_REG_START                           0x00a06100
#define BCHP_XPT_DPCR2_REG_END                             0x00a06174
#define BCHP_XPT_DPCR3_REG_START                           0x00a06180
#define BCHP_XPT_DPCR3_REG_END                             0x00a061f4
#define BCHP_XPT_DPCR_PP_REG_START                         0x00a06400
#define BCHP_XPT_DPCR_PP_REG_END                           0x00a06404
#define BCHP_XPT_PSUB_REG_START                            0x00a06600
#define BCHP_XPT_PSUB_REG_END                              0x00a066c8
#define BCHP_XPT_RSBUFF_REG_START                          0x00a06800
#define BCHP_XPT_RSBUFF_REG_END                            0x00a06f2c
#define BCHP_XPT_PB0_REG_START                             0x00a07000
#define BCHP_XPT_PB0_REG_END                               0x00a07060
#define BCHP_XPT_PB1_REG_START                             0x00a07080
#define BCHP_XPT_PB1_REG_END                               0x00a070e0
#define BCHP_XPT_PB2_REG_START                             0x00a07100
#define BCHP_XPT_PB2_REG_END                               0x00a07160
#define BCHP_XPT_PB3_REG_START                             0x00a07180
#define BCHP_XPT_PB3_REG_END                               0x00a071e0
#define BCHP_XPT_MPOD_REG_START                            0x00a08000
#define BCHP_XPT_MPOD_REG_END                              0x00a08020
#define BCHP_XPT_RMX0_REG_START                            0x00a08400
#define BCHP_XPT_RMX0_REG_END                              0x00a08408
#define BCHP_XPT_RMX1_REG_START                            0x00a08500
#define BCHP_XPT_RMX1_REG_END                              0x00a08508
#define BCHP_XPT_XCBUFF_REG_START                          0x00a0a000
#define BCHP_XPT_XCBUFF_REG_END                            0x00a0bcc8
#define BCHP_XPT_RAVE_REG_START                            0x00a10000
#define BCHP_XPT_RAVE_REG_END                              0x00a1a69c
#define BCHP_XPT_PCROFFSET_REG_START                       0x00a1b000
#define BCHP_XPT_PCROFFSET_REG_END                         0x00a1bffc
#define BCHP_XPT_MSG_REG_START                             0x00a20000
#define BCHP_XPT_MSG_REG_END                               0x00a24814
#define BCHP_XPT_GR_REG_START                              0x00a25000
#define BCHP_XPT_GR_REG_END                                0x00a2500c
#define BCHP_XPT_FULL_PID_PARSER_REG_START                 0x00a26000
#define BCHP_XPT_FULL_PID_PARSER_REG_END                   0x00a27050
#define BCHP_XPT_XPU_REG_START                             0x00a28000
#define BCHP_XPT_XPU_REG_END                               0x00a2c7fc
#define BCHP_XPT_SECURE_BUS_IF_REG_START                   0x00a38000
#define BCHP_XPT_SECURE_BUS_IF_REG_END                     0x00a38000
#define BCHP_RFM_SYSCLK_REG_START                          0x00b00000
#define BCHP_RFM_SYSCLK_REG_END                            0x00b00118
#define BCHP_RFM_CLK27_REG_START                           0x00b00000
#define BCHP_RFM_CLK27_REG_END                             0x00b00470
#define BCHP_RFM_L2_REG_START                              0x00b00c00
#define BCHP_RFM_L2_REG_END                                0x00b00c2c
#define BCHP_RFM_GRB_REG_START                             0x00b01000
#define BCHP_RFM_GRB_REG_END                               0x00b0100c
#define BCHP_UFE_AFE_REG_START                             0x00c00000
#define BCHP_UFE_AFE_REG_END                               0x00c00104
#define BCHP_SDADC_REG_START                               0x00c00200
#define BCHP_SDADC_REG_END                                 0x00c0021c
#define BCHP_OBADC_REG_START                               0x00c00300
#define BCHP_OBADC_REG_END                                 0x00c0030c
#define BCHP_WBADC_AI_REG_START                            0x00c00400
#define BCHP_WBADC_AI_REG_END                              0x00c0047c
#define BCHP_UFE_MISC_REG_START                            0x00c00600
#define BCHP_UFE_MISC_REG_END                              0x00c006c4
#define BCHP_UFE_GR_BRIDGE_REG_START                       0x00c00700
#define BCHP_UFE_GR_BRIDGE_REG_END                         0x00c0070c
#define BCHP_UFE_MISC2_REG_START                           0x00c00780
#define BCHP_UFE_MISC2_REG_END                             0x00c00780
#define BCHP_UFE_REG_START                                 0x00c00800
#define BCHP_UFE_REG_END                                   0x00c00868
#define BCHP_UFE_SAW_REG_START                             0x00c00900
#define BCHP_UFE_SAW_REG_END                               0x00c00980
#define BCHP_UFE_HRC0_REG_START                            0x00c00a00
#define BCHP_UFE_HRC0_REG_END                              0x00c00a68
#define BCHP_UFE_SAW_HRC0_REG_START                        0x00c00b00
#define BCHP_UFE_SAW_HRC0_REG_END                          0x00c00b80
#define BCHP_UFE_HRC1_REG_START                            0x00c00c00
#define BCHP_UFE_HRC1_REG_END                              0x00c00c68
#define BCHP_UFE_SAW_HRC1_REG_START                        0x00c00d00
#define BCHP_UFE_SAW_HRC1_REG_END                          0x00c00d80
#define BCHP_UFE_OOB_REG_START                             0x00c00e00
#define BCHP_UFE_OOB_REG_END                               0x00c00e68
#define BCHP_UFE_SAW_OOB_REG_START                         0x00c00f00
#define BCHP_UFE_SAW_OOB_REG_END                           0x00c00f80
#define BCHP_HRC_REG_START                                 0x00c01000
#define BCHP_HRC_REG_END                                   0x00c01024
#define BCHP_HRC_FIR_REG_START                             0x00c01200
#define BCHP_HRC_FIR_REG_END                               0x00c013fc
#define BCHP_OOB_REG_START                                 0x00c20000
#define BCHP_OOB_REG_END                                   0x00c201f8
#define BCHP_DS_GR_REG_START                               0x00c21f00
#define BCHP_DS_GR_REG_END                                 0x00c21f0c
#define BCHP_DS_TOPM_REG_START                             0x00c22000
#define BCHP_DS_TOPM_REG_END                               0x00c22060
#define BCHP_DS_TOPS_REG_START                             0x00c23000
#define BCHP_DS_TOPS_REG_END                               0x00c2309c
#define BCHP_DS_REG_START                                  0x00c24000
#define BCHP_DS_REG_END                                    0x00c25090
#define BCHP_THD_CORE_REG_START                            0x00d00000
#define BCHP_THD_CORE_REG_END                              0x00d003f8
#define BCHP_THD_INTR2_REG_START                           0x00d0a000
#define BCHP_THD_INTR2_REG_END                             0x00d0a02c
#define BCHP_THD_INTR_REG_START                            0x00d0c000
#define BCHP_THD_INTR_REG_END                              0x00d0c014
#define BCHP_THD_INTR2B_REG_START                          0x00d0d000
#define BCHP_THD_INTR2B_REG_END                            0x00d0d02c
#define BCHP_THD_INTRB_REG_START                           0x00d0f000
#define BCHP_THD_INTRB_REG_END                             0x00d0f014
#define BCHP_THD_GR_REG_START                              0x00d0fc00
#define BCHP_THD_GR_REG_END                                0x00d0fc0c


/***************************************************************************
 *AUD_FMM_MS_CTRL
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer
 ***************************************************************************/
/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0

/***************************************************************************
 *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits
 ***************************************************************************/
/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK  0xffffffff
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0

/***************************************************************************
 *AUD_FMM_OP_CTRL
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI
 ***************************************************************************/
/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */
#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *BVN_MVFD_MFD
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff
#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0

/***************************************************************************
 *BVN_MVFD_VFD
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff
#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0

/***************************************************************************
 *GFD
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK      0xffffffff
#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT     0

/***************************************************************************
 *HIFIDAC_CTRL
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset
 ***************************************************************************/
/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */
#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *ABSTRACT_02_MUTE_USAGE - Mute usage
 ***************************************************************************/
/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */
#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change
 ***************************************************************************/
/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */
#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *M2MC
 ***************************************************************************/
/***************************************************************************
 *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract
 ***************************************************************************/
/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */
#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK          0xffffffff
#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT         0

/***************************************************************************
 *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0
 ***************************************************************************/
/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK              0xf0000000
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT             28

/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK          0x0fffffe0
#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT         5

/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK              0x0000001e
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT             1

/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK           0x00000001
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT          0
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid   0
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1

/***************************************************************************
 *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1
 ***************************************************************************/
/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK              0xffff8000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT             15

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK   0x00004000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT  14
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK   0x00002000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT  13
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK         0x00000800
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT        11
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE   1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE  0

/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK  0x00000400
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK  0x00000200
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK          0x00000100
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT         8
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE    1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE   0

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK   0x00000020
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT  5
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK     0x00000002
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT    1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK     0x00000001
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT    0
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0

/***************************************************************************
 *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER
 ***************************************************************************/
/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK  0xffffffff
#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER
 ***************************************************************************/
/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK  0xffffffff
#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER
 ***************************************************************************/
/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT
 ***************************************************************************/
/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK        0xffffffff
#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT       0

/***************************************************************************
 *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM
 ***************************************************************************/
/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM
 ***************************************************************************/
/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP
 ***************************************************************************/
/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK         0xffffffff
#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT        0

/***************************************************************************
 *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY
 ***************************************************************************/
/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY
 ***************************************************************************/
/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF
 ***************************************************************************/
/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK  0xffffffff
#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX
 ***************************************************************************/
/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_11_DST_COLOR_MATRIX_N - Linked-List Packet Word N for group DST_COLOR_MATRIX
 ***************************************************************************/
/* M2MC :: LIST_PKT_11_DST_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_11_DST_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_11_DST_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_12_OUTPUT_COLOR_MATRIX_N - Linked-List Packet Word N for group OUTPUT_COLOR_MATRIX
 ***************************************************************************/
/* M2MC :: LIST_PKT_12_OUTPUT_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_12_OUTPUT_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_12_OUTPUT_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_13_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT
 ***************************************************************************/
/* M2MC :: LIST_PKT_13_SRC_CLUT :: reserved0 [31:29] */
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_reserved0_MASK              0xe0000000
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_reserved0_SHIFT             29

/* M2MC :: LIST_PKT_13_SRC_CLUT :: REGISTER_CONTENTS [28:00] */
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_REGISTER_CONTENTS_MASK      0x1fffffff
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_REGISTER_CONTENTS_SHIFT     0

/***************************************************************************
 *LIST_PKT_14_DST_CLUT - Linked-List Packet Word for group DST_CLUT
 ***************************************************************************/
/* M2MC :: LIST_PKT_14_DST_CLUT :: reserved0 [31:29] */
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_reserved0_MASK              0xe0000000
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_reserved0_SHIFT             29

/* M2MC :: LIST_PKT_14_DST_CLUT :: REGISTER_CONTENTS [28:00] */
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_REGISTER_CONTENTS_MASK      0x1fffffff
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_REGISTER_CONTENTS_SHIFT     0

/***************************************************************************
 *TYPE_CLUT_COLOR_DATA - color data for color look up table
 ***************************************************************************/
/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK                  0xff000000
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT                 24

/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK                    0x00ff0000
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT                   16

/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK                  0x0000ff00
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT                 8

/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK                   0x000000ff
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT                  0

/***************************************************************************
 *MEM_DMA
 ***************************************************************************/
/***************************************************************************
 *DESC_WORD0 - MEM DMA Descriptor Word 0
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD0 :: READ_ADDR [31:00] */
#define BCHP_MEM_DMA_DESC_WORD0_READ_ADDR_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD0_READ_ADDR_SHIFT                    0

/***************************************************************************
 *DESC_WORD1 - MEM DMA Descriptor Word 1
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD1 :: WRITE_ADDR [31:00] */
#define BCHP_MEM_DMA_DESC_WORD1_WRITE_ADDR_MASK                    0xffffffff
#define BCHP_MEM_DMA_DESC_WORD1_WRITE_ADDR_SHIFT                   0

/***************************************************************************
 *DESC_WORD2 - MEM DMA Descriptor Word 2
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD2 :: INTR_ENABLE [31:31] */
#define BCHP_MEM_DMA_DESC_WORD2_INTR_ENABLE_MASK                   0x80000000
#define BCHP_MEM_DMA_DESC_WORD2_INTR_ENABLE_SHIFT                  31

/* MEM_DMA :: DESC_WORD2 :: LAST [30:30] */
#define BCHP_MEM_DMA_DESC_WORD2_LAST_MASK                          0x40000000
#define BCHP_MEM_DMA_DESC_WORD2_LAST_SHIFT                         30

/* MEM_DMA :: DESC_WORD2 :: AUTO_APPEND [29:29] */
#define BCHP_MEM_DMA_DESC_WORD2_AUTO_APPEND_MASK                   0x20000000
#define BCHP_MEM_DMA_DESC_WORD2_AUTO_APPEND_SHIFT                  29

/* MEM_DMA :: DESC_WORD2 :: reserved0 [28:25] */
#define BCHP_MEM_DMA_DESC_WORD2_reserved0_MASK                     0x1e000000
#define BCHP_MEM_DMA_DESC_WORD2_reserved0_SHIFT                    25

/* MEM_DMA :: DESC_WORD2 :: TRANSFER_SIZE [24:00] */
#define BCHP_MEM_DMA_DESC_WORD2_TRANSFER_SIZE_MASK                 0x01ffffff
#define BCHP_MEM_DMA_DESC_WORD2_TRANSFER_SIZE_SHIFT                0

/***************************************************************************
 *DESC_WORD3 - MEM DMA Descriptor Word 3
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD3 :: NEXT_DESC_ADDR [31:05] */
#define BCHP_MEM_DMA_DESC_WORD3_NEXT_DESC_ADDR_MASK                0xffffffe0
#define BCHP_MEM_DMA_DESC_WORD3_NEXT_DESC_ADDR_SHIFT               5

/* MEM_DMA :: DESC_WORD3 :: reserved0 [04:03] */
#define BCHP_MEM_DMA_DESC_WORD3_reserved0_MASK                     0x00000018
#define BCHP_MEM_DMA_DESC_WORD3_reserved0_SHIFT                    3

/* MEM_DMA :: DESC_WORD3 :: READ_ENDIAN_MODE [02:02] */
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_MASK              0x00000004
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_SHIFT             2
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_BIG_ENDIAN        0
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_LITTLE_ENDIAN     1

/* MEM_DMA :: DESC_WORD3 :: WRITE_ENDIAN_XLATE_MODE [01:00] */
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_MASK       0x00000003
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_SHIFT      0
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_WORD_ALIGNED 0
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_HALF_WORD_ALIGNED 1
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_BYTE_ALIGNED 2
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_reserved   3

/***************************************************************************
 *DESC_WORD4 - MEM DMA Descriptor Word 4
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD4 :: reserved0 [31:16] */
#define BCHP_MEM_DMA_DESC_WORD4_reserved0_MASK                     0xffff0000
#define BCHP_MEM_DMA_DESC_WORD4_reserved0_SHIFT                    16

/* MEM_DMA :: DESC_WORD4 :: SCRAM_CTRL_RSV [15:14] */
#define BCHP_MEM_DMA_DESC_WORD4_SCRAM_CTRL_RSV_MASK                0x0000c000
#define BCHP_MEM_DMA_DESC_WORD4_SCRAM_CTRL_RSV_SHIFT               14

/* MEM_DMA :: DESC_WORD4 :: SG_SCRAM_END [13:13] */
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_END_MASK                  0x00002000
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_END_SHIFT                 13

/* MEM_DMA :: DESC_WORD4 :: SG_SCRAM_START [12:12] */
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_START_MASK                0x00001000
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_START_SHIFT               12

/* MEM_DMA :: DESC_WORD4 :: SG_ENABLE [11:11] */
#define BCHP_MEM_DMA_DESC_WORD4_SG_ENABLE_MASK                     0x00000800
#define BCHP_MEM_DMA_DESC_WORD4_SG_ENABLE_SHIFT                    11

/* MEM_DMA :: DESC_WORD4 :: ENC_DEC_INIT [10:10] */
#define BCHP_MEM_DMA_DESC_WORD4_ENC_DEC_INIT_MASK                  0x00000400
#define BCHP_MEM_DMA_DESC_WORD4_ENC_DEC_INIT_SHIFT                 10

/* MEM_DMA :: DESC_WORD4 :: MODE_SEL [09:08] */
#define BCHP_MEM_DMA_DESC_WORD4_MODE_SEL_MASK                      0x00000300
#define BCHP_MEM_DMA_DESC_WORD4_MODE_SEL_SHIFT                     8

/* MEM_DMA :: DESC_WORD4 :: KEY_SELECT [07:00] */
#define BCHP_MEM_DMA_DESC_WORD4_KEY_SELECT_MASK                    0x000000ff
#define BCHP_MEM_DMA_DESC_WORD4_KEY_SELECT_SHIFT                   0

/***************************************************************************
 *DESC_WORD5 - MEM DMA Descriptor Word 5
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD5 :: reserved0 [31:00] */
#define BCHP_MEM_DMA_DESC_WORD5_reserved0_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD5_reserved0_SHIFT                    0

/***************************************************************************
 *DESC_WORD6 - MEM DMA Descriptor Word 6
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD6 :: reserved0 [31:00] */
#define BCHP_MEM_DMA_DESC_WORD6_reserved0_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD6_reserved0_SHIFT                    0

/***************************************************************************
 *DESC_WORD7 - MEM DMA Descriptor Word 7
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD7 :: reserved0 [31:00] */
#define BCHP_MEM_DMA_DESC_WORD7_reserved0_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD7_reserved0_SHIFT                    0

/***************************************************************************
 *RAAGA_REGSET_DSP_CFG
 ***************************************************************************/
/***************************************************************************
 *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK  0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK     0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT    0
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo   2
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono     1

/***************************************************************************
 *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK    0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3

/***************************************************************************
 *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK  0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3

/***************************************************************************
 *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right 2147483648

/***************************************************************************
 *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right 2147483648

/***************************************************************************
 *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right 2147483648

/***************************************************************************
 *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767

/***************************************************************************
 *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767

/***************************************************************************
 *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK    0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3

/***************************************************************************
 *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3

/***************************************************************************
 *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK  0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7

/***************************************************************************
 *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK    0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off     0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On      1

/***************************************************************************
 *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3

/***************************************************************************
 *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1

/***************************************************************************
 *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768

/***************************************************************************
 *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768

/***************************************************************************
 *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768

/***************************************************************************
 *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK  0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto  0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt  1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo  2

/***************************************************************************
 *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1

/***************************************************************************
 *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK       0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT      0

/***************************************************************************
 *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1

/***************************************************************************
 *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0

/***************************************************************************
 *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3

/***************************************************************************
 *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2

/***************************************************************************
 *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0

/***************************************************************************
 *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0

/***************************************************************************
 *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0

/***************************************************************************
 *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0

/***************************************************************************
 *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK    0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo  0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono    1

/***************************************************************************
 *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK   0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT  0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3

/***************************************************************************
 *RDC
 ***************************************************************************/
/***************************************************************************
 *RUL - RUL Command.
 ***************************************************************************/
/* RDC :: RUL :: opcode [31:24] */
#define BCHP_RDC_RUL_opcode_MASK                                   0xff000000
#define BCHP_RDC_RUL_opcode_SHIFT                                  24
#define BCHP_RDC_RUL_opcode_NOP                                    0
#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM                          1
#define BCHP_RDC_RUL_opcode_REG_WRITE                              2
#define BCHP_RDC_RUL_opcode_REG_READ                               3
#define BCHP_RDC_RUL_opcode_LOAD_IMM                               4
#define BCHP_RDC_RUL_opcode_WINDOW_WRITE                           5
#define BCHP_RDC_RUL_opcode_BLOCK_WRITE                            6
#define BCHP_RDC_RUL_opcode_WINDOW_COPY                            7
#define BCHP_RDC_RUL_opcode_BLOCK_COPY                             8
#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK                        9
#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW                        10
#define BCHP_RDC_RUL_opcode_AND                                    11
#define BCHP_RDC_RUL_opcode_AND_IMM                                12
#define BCHP_RDC_RUL_opcode_OR                                     13
#define BCHP_RDC_RUL_opcode_OR_IMM                                 14
#define BCHP_RDC_RUL_opcode_XOR                                    15
#define BCHP_RDC_RUL_opcode_XOR_IMM                                16
#define BCHP_RDC_RUL_opcode_NOT                                    17
#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT                           18
#define BCHP_RDC_RUL_opcode_SUM                                    19
#define BCHP_RDC_RUL_opcode_SUM_IMM                                20
#define BCHP_RDC_RUL_opcode_COND_SKIP                              21
#define BCHP_RDC_RUL_opcode_SKIP                                   22
#define BCHP_RDC_RUL_opcode_EXIT                                   23
#define BCHP_RDC_RUL_opcode_PLACEHOLDER                            255

/* RDC :: RUL :: reserved0 [23:23] */
#define BCHP_RDC_RUL_reserved0_MASK                                0x00800000
#define BCHP_RDC_RUL_reserved0_SHIFT                               23

/* union - case rdc_args [22:00] */
/* RDC :: RUL :: rdc_args :: rotation [22:18] */
#define BCHP_RDC_RUL_rdc_args_rotation_MASK                        0x007c0000
#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT                       18

/* RDC :: RUL :: rdc_args :: src1 [17:12] */
#define BCHP_RDC_RUL_rdc_args_src1_MASK                            0x0003f000
#define BCHP_RDC_RUL_rdc_args_src1_SHIFT                           12

/* RDC :: RUL :: rdc_args :: src2 [11:06] */
#define BCHP_RDC_RUL_rdc_args_src2_MASK                            0x00000fc0
#define BCHP_RDC_RUL_rdc_args_src2_SHIFT                           6

/* RDC :: RUL :: rdc_args :: dest [05:00] */
#define BCHP_RDC_RUL_rdc_args_dest_MASK                            0x0000003f
#define BCHP_RDC_RUL_rdc_args_dest_SHIFT                           0

/* union - case reg_args [22:00] */
/* RDC :: RUL :: reg_args :: rotation [22:18] */
#define BCHP_RDC_RUL_reg_args_rotation_MASK                        0x007c0000
#define BCHP_RDC_RUL_reg_args_rotation_SHIFT                       18

/* RDC :: RUL :: reg_args :: src1 [17:12] */
#define BCHP_RDC_RUL_reg_args_src1_MASK                            0x0003f000
#define BCHP_RDC_RUL_reg_args_src1_SHIFT                           12

/* RDC :: RUL :: reg_args :: count [11:00] */
#define BCHP_RDC_RUL_reg_args_count_MASK                           0x00000fff
#define BCHP_RDC_RUL_reg_args_count_SHIFT                          0

/***************************************************************************
 *XPT_PB
 ***************************************************************************/
/***************************************************************************
 *DESCRIPTOR_ABSTRACT - Playback Linked-List Descriptor Abstract
 ***************************************************************************/
/* XPT_PB :: DESCRIPTOR_ABSTRACT :: DESCRIPTOR_FORMAT [31:00] */
#define BCHP_XPT_PB_DESCRIPTOR_ABSTRACT_DESCRIPTOR_FORMAT_MASK     0xffffffff
#define BCHP_XPT_PB_DESCRIPTOR_ABSTRACT_DESCRIPTOR_FORMAT_SHIFT    0

/***************************************************************************
 *DESC_0 - Playback Linked-List Descriptor Word 0
 ***************************************************************************/
/* XPT_PB :: DESC_0 :: PB_BUFFER_START_ADDR [31:00] */
#define BCHP_XPT_PB_DESC_0_PB_BUFFER_START_ADDR_MASK               0xffffffff
#define BCHP_XPT_PB_DESC_0_PB_BUFFER_START_ADDR_SHIFT              0

/***************************************************************************
 *DESC_1 - Playback Linked-List Descriptor Word 1
 ***************************************************************************/
/* XPT_PB :: DESC_1 :: PB_BUFFER_LENGTH [31:00] */
#define BCHP_XPT_PB_DESC_1_PB_BUFFER_LENGTH_MASK                   0xffffffff
#define BCHP_XPT_PB_DESC_1_PB_BUFFER_LENGTH_SHIFT                  0

/***************************************************************************
 *DESC_2 - Playback Linked-List Descriptor Word 2
 ***************************************************************************/
/* XPT_PB :: DESC_2 :: PB_INTERRUPT_ENABLE [31:31] */
#define BCHP_XPT_PB_DESC_2_PB_INTERRUPT_ENABLE_MASK                0x80000000
#define BCHP_XPT_PB_DESC_2_PB_INTERRUPT_ENABLE_SHIFT               31

/* XPT_PB :: DESC_2 :: PB_FORCE_RESYNC [30:30] */
#define BCHP_XPT_PB_DESC_2_PB_FORCE_RESYNC_MASK                    0x40000000
#define BCHP_XPT_PB_DESC_2_PB_FORCE_RESYNC_SHIFT                   30

/* XPT_PB :: DESC_2 :: PB_HOST_DATA_INS_EN [29:29] */
#define BCHP_XPT_PB_DESC_2_PB_HOST_DATA_INS_EN_MASK                0x20000000
#define BCHP_XPT_PB_DESC_2_PB_HOST_DATA_INS_EN_SHIFT               29

/* XPT_PB :: DESC_2 :: reserved0 [28:28] */
#define BCHP_XPT_PB_DESC_2_reserved0_MASK                          0x10000000
#define BCHP_XPT_PB_DESC_2_reserved0_SHIFT                         28

/* XPT_PB :: DESC_2 :: PB_DESC_TAG_ID [27:24] */
#define BCHP_XPT_PB_DESC_2_PB_DESC_TAG_ID_MASK                     0x0f000000
#define BCHP_XPT_PB_DESC_2_PB_DESC_TAG_ID_SHIFT                    24

/* XPT_PB :: DESC_2 :: reserved1 [23:00] */
#define BCHP_XPT_PB_DESC_2_reserved1_MASK                          0x00ffffff
#define BCHP_XPT_PB_DESC_2_reserved1_SHIFT                         0

/***************************************************************************
 *DESC_3 - Playback Linked-List Descriptor Word 3
 ***************************************************************************/
/* XPT_PB :: DESC_3 :: PB_NEXT_DESC_ADDR [31:04] */
#define BCHP_XPT_PB_DESC_3_PB_NEXT_DESC_ADDR_MASK                  0xfffffff0
#define BCHP_XPT_PB_DESC_3_PB_NEXT_DESC_ADDR_SHIFT                 4

/* XPT_PB :: DESC_3 :: reserved0 [03:01] */
#define BCHP_XPT_PB_DESC_3_reserved0_MASK                          0x0000000e
#define BCHP_XPT_PB_DESC_3_reserved0_SHIFT                         1

/* XPT_PB :: DESC_3 :: PB_LAST_DESC_IND [00:00] */
#define BCHP_XPT_PB_DESC_3_PB_LAST_DESC_IND_MASK                   0x00000001
#define BCHP_XPT_PB_DESC_3_PB_LAST_DESC_IND_SHIFT                  0

/***************************************************************************
 *XPT_RAVE
 ***************************************************************************/
/***************************************************************************
 *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples
 ***************************************************************************/
/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */
#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0

/***************************************************************************
 *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup
 ***************************************************************************/
/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */
#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0

/***************************************************************************
 *NOTEC_PES_LAYER_SELECTION - PES Layer Selection
 ***************************************************************************/
/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */
#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0

/***************************************************************************
 *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general
 ***************************************************************************/
/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */
#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0

/***************************************************************************
 *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video
 ***************************************************************************/
/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video
 ***************************************************************************/
/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0

#endif /* #ifndef BCHP_COMMON_H__ */

/* End of File */