/***************************************************************************
 *     Copyright (c) 1999-2011, Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 *
 * Module Description:
 *                     DO NOT EDIT THIS FILE DIRECTLY
 *
 * This module was generated magically with RDB from a source description
 * file. You must edit the source file for changes to be made to this file.
 *
 *
 * Date:           Generated on         Tue May 24 13:05:37 2011
 *                 MD5 Checksum         20406eb4287081a441630135cf8f15e2
 *
 * Compiled with:  RDB Utility          combo_header.pl
 *                 RDB Parser           3.0
 *                 unknown              unknown
 *                 Perl Interpreter     5.008008
 *                 Operating System     linux
 *
 * Revision History:
 *
 * $brcm_Log: /magnum/basemodules/chp/7346/rdb/b0/bchp_aon_pin_ctrl.h $
 * 
 * Hydra_Software_Devel/2   5/24/11 5:51p albertl
 * SW7346-143: Updated to match RDB.
 *
 ***************************************************************************/

#ifndef BCHP_AON_PIN_CTRL_H__
#define BCHP_AON_PIN_CTRL_H__

/***************************************************************************
 *AON_PIN_CTRL - AON Pinmux Control Registers
 ***************************************************************************/
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0         0x00408500 /* Pinmux control register 0 */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1         0x00408504 /* Pinmux control register 1 */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2         0x00408508 /* Pinmux control register 2 */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3         0x0040850c /* Pinmux control register 3 */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0     0x00408510 /* Pad pull-up/pull-down control register 0 */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1     0x00408514 /* Pad pull-up/pull-down control register 1 */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2     0x00408518 /* Pad pull-up/pull-down control register 2 */
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0     0x0040851c /* Bypass clock unselect register 0 */

/***************************************************************************
 *PIN_MUX_CTRL_0 - Pinmux control register 0
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_gpio_005 [31:28] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_MASK         0xf0000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_SHIFT        28
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_AON_GPIO_005 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_LED_LS_1     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_SC0_PRES     2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_CI2CHIP_MDI3 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_PKT_VALID4   4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_005_TP_OUT_05    5

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_gpio_004 [27:24] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_MASK         0x0f000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_SHIFT        24
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_AON_GPIO_004 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_LED_LS_0     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_SC0_RST      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_CI2CHIP_MDI2 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_PKT_DATA4    4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_TP_OUT_04    5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_004_PM_AON_GPIO_004 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_sgpio_03 [23:20] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_03_MASK         0x00f00000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_03_SHIFT        20
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_03_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_03_AON_SGPIO_03 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_03_LED_KD_3     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_03_BSC_M4_SDA   2

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_sgpio_02 [19:16] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_02_MASK         0x000f0000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_02_SHIFT        16
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_02_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_02_AON_SGPIO_02 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_02_LED_KD_2     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_sgpio_02_BSC_M4_SCL   2

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_gpio_001 [15:12] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_MASK         0x0000f000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_SHIFT        12
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_AON_GPIO_001 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_LED_KD_1     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_SC_EXT_CLK   2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_CI2CHIP_MIVAL 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_001_PM_AON_GPIO_001 4

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_gpio_000 [11:08] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_MASK         0x00000f00
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_SHIFT        8
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_AON_GPIO_000 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_LED_KD_0     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_SC_CLK_OUT   2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_CI2CHIP_MISTRT 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_000_PM_AON_GPIO_000 4

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: aon_ir_in0 [07:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_ir_in0_MASK           0x000000f0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_ir_in0_SHIFT          4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_ir_in0_DEFAULT        0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_ir_in0_AON_IR_IN0     0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_ir_in0_TP_IN_03       1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_ir_in0_PM_AON_IR_IN0  2

/* AON_PIN_CTRL :: PIN_MUX_CTRL_0 :: hdmi_htplg [03:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_hdmi_htplg_MASK           0x0000000f
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_hdmi_htplg_SHIFT          0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_hdmi_htplg_DEFAULT        0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_hdmi_htplg_HDMI_HTPLG     0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_hdmi_htplg_ALT_TP_OUT_26  1

/***************************************************************************
 *PIN_MUX_CTRL_1 - Pinmux control register 1
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_013 [31:28] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_MASK         0xf0000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_SHIFT        28
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_AON_GPIO_013 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_LED_LD_4     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_SC1_RST      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_CHIP2CI_MDO0 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_EXT_IRQB_1   4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_SPI_M_SS0B   5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_TP_OUT_13    6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_013_PM_AON_GPIO_013 7

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_012 [27:24] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_MASK         0x0f000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_SHIFT        24
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_AON_GPIO_012 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_LED_LD_3     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_SC1_PRES     2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_CHIP2CI_MOSTRT 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_EXT_IRQB_0   4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_TP_OUT_12    5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_012_PM_AON_GPIO_012 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_011 [23:20] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_MASK         0x00f00000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_SHIFT        20
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_AON_GPIO_011 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_LED_LD_2     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_SC1_CLK      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_CHIP2CI_MOVAL 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_IR_OUT       4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_TP_OUT_19    5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_011_PM_AON_GPIO_011 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_010 [19:16] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_MASK         0x000f0000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_SHIFT        16
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_AON_GPIO_010 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_LED_LD_1     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_SC1_IO       2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_CI2CHIP_MICLK 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_010_PM_AON_GPIO_010 4

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_009 [15:12] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_MASK         0x0000f000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_SHIFT        12
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_AON_GPIO_009 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_LED_LD_0     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_SC0_VPP      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_CI2CHIP_MDI7 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_I2S_LR1_OUT  4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_I2S_LR1_IN   5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_009_PM_AON_GPIO_009 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_008 [11:08] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_MASK         0x00000f00
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_SHIFT        8
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_AON_GPIO_008 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_LED_LS_4     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_SC0_AUX_2    2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_CI2CHIP_MDI6 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_I2S_DATA1_OUT 4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_I2S_DATA1_IN 5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_PKT_CLK4     6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_TP_OUT_08    7
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_008_PM_AON_GPIO_008 8

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_007 [07:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_MASK         0x000000f0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_SHIFT        4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_AON_GPIO_007 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_LED_LS_3     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_SC0_AUX_1    2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_CI2CHIP_MDI5 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_I2S_CLK1_OUT 4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_I2S_CLK1_IN  5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_PKT_ERROR4   6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_TP_OUT_24    7
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_007_PM_AON_GPIO_007 8

/* AON_PIN_CTRL :: PIN_MUX_CTRL_1 :: aon_gpio_006 [03:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_MASK         0x0000000f
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_SHIFT        0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_AON_GPIO_006 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_LED_LS_2     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_SC0_VCC      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_CI2CHIP_MDI4 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_PKT_SYNC4    4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_006_TP_OUT_06    5

/***************************************************************************
 *PIN_MUX_CTRL_2 - Pinmux control register 2
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_021 [31:28] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_MASK         0xf0000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_SHIFT        28
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_AON_GPIO_021 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_SPI_M_SCK    1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_CHIP2CI_MOCLK 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_TTX0_REQ     3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_VEC_VSYNC_0  4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_VEC_HSYNC_0  5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_TP_IN_07     6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_021_PM_AON_GPIO_021 7

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_020 [27:24] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_MASK         0x0f000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_SHIFT        24
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_AON_GPIO_020 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_SPI_M_MISO   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_CHIP2CI_MDO7 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_VEC_VSYNC_1  3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_VEC_HSYNC_1  4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_TTX0_DATA    5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_TP_OUT_22    6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_020_PM_AON_GPIO_020 7

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_019 [23:20] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_MASK         0x00f00000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_SHIFT        20
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_AON_GPIO_019 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_SPI_M_MOSI   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_CHIP2CI_MDO6 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_VEC_VSYNC_0  3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_VEC_HSYNC_0  4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_019_TP_OUT_27    5

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_018 [19:16] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_MASK         0x000f0000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_SHIFT        16
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_AON_GPIO_018 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_SPI_M_SCK    1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_CHIP2CI_MDO5 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_018_TP_OUT_16    3

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_017 [15:12] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_MASK         0x0000f000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_SHIFT        12
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_DEFAULT      4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_AON_GPIO_017 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_IR_OUT       1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_SC1_VPP      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_CHIP2CI_MDO4 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_LED_OUT      4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_017_TP_OUT_15    5

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_016 [11:08] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_MASK         0x00000f00
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_SHIFT        8
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_AON_GPIO_016 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_LED_LD_7     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_SC1_AUX_2    2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_CHIP2CI_MDO3 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_EXT_IRQB_4   4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_SPI_M_MISO   5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_TP_IN_21     6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_016_PM_AON_GPIO_016 7

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_015 [07:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_MASK         0x000000f0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_SHIFT        4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_AON_GPIO_015 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_LED_LD_6     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_SC1_AUX_1    2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_CHIP2CI_MDO2 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_EXT_IRQB_3   4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_SPI_M_MOSI   5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_TP_IN_04     6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_015_PM_AON_GPIO_015 7

/* AON_PIN_CTRL :: PIN_MUX_CTRL_2 :: aon_gpio_014 [03:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_MASK         0x0000000f
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_SHIFT        0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_AON_GPIO_014 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_LED_LD_5     1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_SC1_VCC      2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_CHIP2CI_MDO1 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_EXT_IRQB_2   4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_SPI_M_SCK    5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_TP_OUT_14    6
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_014_PM_AON_GPIO_014 7

/***************************************************************************
 *PIN_MUX_CTRL_3 - Pinmux control register 3
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: reserved0 [31:28] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_reserved0_MASK            0xf0000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_reserved0_SHIFT           28

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_sgpio_01 [27:24] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_MASK         0x0f000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_SHIFT        24
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_AON_SGPIO_01 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_BSC_M0_SDA   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_TP_IN_22     2

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_sgpio_00 [23:20] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_00_MASK         0x00f00000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_00_SHIFT        20
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_00_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_00_AON_SGPIO_00 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_00_BSC_M0_SCL   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_00_TP_IN_23     2

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_gpio_026 [19:16] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_MASK         0x000f0000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_SHIFT        16
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_AON_GPIO_026 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_IR_IN1       1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_AUD_FS_CLK1  2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_SDS1_DSEC_TXEN 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_CI2CHIP_MDI1 4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_TP_OUT_00    5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_026_PM_AON_GPIO_026 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_gpio_025 [15:12] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_MASK         0x0000f000
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_SHIFT        12
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_AON_GPIO_025 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_IR_INT       1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_AUD_FS_CLK0  2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_SDS1_DSEC_TXOUT 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_CI2CHIP_MDI0 4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_TP_IN_29     5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_025_PM_AON_GPIO_025 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_gpio_024 [11:08] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_MASK         0x00000f00
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_SHIFT        8
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_AON_GPIO_024 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_SPI_M_SS0B   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_AUD_FS_CLK1  2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_CI2CHIP_MCLKI 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_SC0_CLK      4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_TP_IN_28     5
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_024_PM_AON_GPIO_024 6

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_gpio_023 [07:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_MASK         0x000000f0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_SHIFT        4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_AON_GPIO_023 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_SPI_M_SS1B   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_AUD_FS_CLK0  2
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_CHIP2CI_MCLKO 3
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_SC0_IO       4
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_023_TP_OUT_10    5

/* AON_PIN_CTRL :: PIN_MUX_CTRL_3 :: aon_gpio_022 [03:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_022_MASK         0x0000000f
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_022_SHIFT        0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_022_DEFAULT      0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_022_AON_GPIO_022 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_022_SPI_M_SS2B   1
#define BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_gpio_022_TP_OUT_09    2

/***************************************************************************
 *PIN_MUX_PAD_CTRL_0 - Pad pull-up/pull-down control register 0
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: spare_pad_ctrl_0 [31:30] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_spare_pad_ctrl_0_MASK 0xc0000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_spare_pad_ctrl_0_SHIFT 30
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_spare_pad_ctrl_0_DEFAULT 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_spare_pad_ctrl_0_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_spare_pad_ctrl_0_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_spare_pad_ctrl_0_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_012_pad_ctrl [29:28] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_012_pad_ctrl_MASK 0x30000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_012_pad_ctrl_SHIFT 28
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_012_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_012_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_012_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_012_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_011_pad_ctrl [27:26] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_011_pad_ctrl_MASK 0x0c000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_011_pad_ctrl_SHIFT 26
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_011_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_011_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_011_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_011_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_010_pad_ctrl [25:24] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_010_pad_ctrl_MASK 0x03000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_010_pad_ctrl_SHIFT 24
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_010_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_010_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_010_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_010_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_009_pad_ctrl [23:22] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_009_pad_ctrl_MASK 0x00c00000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_009_pad_ctrl_SHIFT 22
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_009_pad_ctrl_DEFAULT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_009_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_009_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_009_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_008_pad_ctrl [21:20] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_008_pad_ctrl_MASK 0x00300000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_008_pad_ctrl_SHIFT 20
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_008_pad_ctrl_DEFAULT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_008_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_008_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_008_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_007_pad_ctrl [19:18] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_007_pad_ctrl_MASK 0x000c0000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_007_pad_ctrl_SHIFT 18
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_007_pad_ctrl_DEFAULT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_007_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_007_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_007_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: reserved0 [17:14] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_reserved0_MASK        0x0003c000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_reserved0_SHIFT       14

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_004_pad_ctrl [13:12] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_004_pad_ctrl_MASK 0x00003000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_004_pad_ctrl_SHIFT 12
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_004_pad_ctrl_DEFAULT 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_004_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_004_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_004_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: reserved1 [11:08] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_reserved1_MASK        0x00000f00
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_reserved1_SHIFT       8

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_001_pad_ctrl [07:06] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_001_pad_ctrl_MASK 0x000000c0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_001_pad_ctrl_SHIFT 6
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_001_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_001_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_001_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_001_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_gpio_000_pad_ctrl [05:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_000_pad_ctrl_MASK 0x00000030
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_000_pad_ctrl_SHIFT 4
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_000_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_000_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_000_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_gpio_000_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: aon_ir_in0_pad_ctrl [03:02] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_ir_in0_pad_ctrl_MASK 0x0000000c
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_ir_in0_pad_ctrl_SHIFT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_ir_in0_pad_ctrl_DEFAULT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_ir_in0_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_ir_in0_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_aon_ir_in0_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_0 :: reserved2 [01:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_reserved2_MASK        0x00000003
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_0_reserved2_SHIFT       0

/***************************************************************************
 *PIN_MUX_PAD_CTRL_1 - Pad pull-up/pull-down control register 1
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: spare_pad_ctrl_1 [31:30] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_spare_pad_ctrl_1_MASK 0xc0000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_spare_pad_ctrl_1_SHIFT 30
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_spare_pad_ctrl_1_DEFAULT 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_spare_pad_ctrl_1_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_spare_pad_ctrl_1_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_spare_pad_ctrl_1_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: reserved0 [29:28] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_reserved0_MASK        0x30000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_reserved0_SHIFT       28

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_026_pad_ctrl [27:26] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_026_pad_ctrl_MASK 0x0c000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_026_pad_ctrl_SHIFT 26
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_026_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_026_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_026_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_026_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_025_pad_ctrl [25:24] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_025_pad_ctrl_MASK 0x03000000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_025_pad_ctrl_SHIFT 24
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_025_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_025_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_025_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_025_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_024_pad_ctrl [23:22] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_024_pad_ctrl_MASK 0x00c00000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_024_pad_ctrl_SHIFT 22
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_024_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_024_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_024_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_024_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: reserved1 [21:18] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_reserved1_MASK        0x003c0000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_reserved1_SHIFT       18

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_021_pad_ctrl [17:16] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_021_pad_ctrl_MASK 0x00030000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_021_pad_ctrl_SHIFT 16
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_021_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_021_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_021_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_021_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_020_pad_ctrl [15:14] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_020_pad_ctrl_MASK 0x0000c000
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_020_pad_ctrl_SHIFT 14
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_020_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_020_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_020_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_020_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: reserved2 [13:08] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_reserved2_MASK        0x00003f00
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_reserved2_SHIFT       8

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_016_pad_ctrl [07:06] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_016_pad_ctrl_MASK 0x000000c0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_016_pad_ctrl_SHIFT 6
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_016_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_016_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_016_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_016_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_015_pad_ctrl [05:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_015_pad_ctrl_MASK 0x00000030
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_015_pad_ctrl_SHIFT 4
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_015_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_015_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_015_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_015_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_014_pad_ctrl [03:02] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_014_pad_ctrl_MASK 0x0000000c
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_014_pad_ctrl_SHIFT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_014_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_014_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_014_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_014_pad_ctrl_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_1 :: aon_gpio_013_pad_ctrl [01:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_013_pad_ctrl_MASK 0x00000003
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_013_pad_ctrl_SHIFT 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_013_pad_ctrl_DEFAULT 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_013_pad_ctrl_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_013_pad_ctrl_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_1_aon_gpio_013_pad_ctrl_PULL_UP 2

/***************************************************************************
 *PIN_MUX_PAD_CTRL_2 - Pad pull-up/pull-down control register 2
 ***************************************************************************/
/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_2 :: reserved0 [31:04] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_reserved0_MASK        0xfffffff0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_reserved0_SHIFT       4

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_2 :: spare_pad_ctrl_2 [03:02] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_spare_pad_ctrl_2_MASK 0x0000000c
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_spare_pad_ctrl_2_SHIFT 2
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_spare_pad_ctrl_2_DEFAULT 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_spare_pad_ctrl_2_PULL_NONE 0
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_spare_pad_ctrl_2_PULL_DOWN 1
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_spare_pad_ctrl_2_PULL_UP 2

/* AON_PIN_CTRL :: PIN_MUX_PAD_CTRL_2 :: reserved1 [01:00] */
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_reserved1_MASK        0x00000003
#define BCHP_AON_PIN_CTRL_PIN_MUX_PAD_CTRL_2_reserved1_SHIFT       0

/***************************************************************************
 *BYP_CLK_UNSELECT_0 - Bypass clock unselect register 0
 ***************************************************************************/
/* AON_PIN_CTRL :: BYP_CLK_UNSELECT_0 :: reserved0 [31:04] */
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_reserved0_MASK        0xfffffff0
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_reserved0_SHIFT       4

/* AON_PIN_CTRL :: BYP_CLK_UNSELECT_0 :: unsel_byp_clk_on_aon_gpio_010 [03:03] */
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_010_MASK 0x00000008
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_010_SHIFT 3
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_010_DEFAULT 0

/* AON_PIN_CTRL :: BYP_CLK_UNSELECT_0 :: unsel_byp_clk_on_aon_gpio_009 [02:02] */
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_009_MASK 0x00000004
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_009_SHIFT 2
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_009_DEFAULT 0

/* AON_PIN_CTRL :: BYP_CLK_UNSELECT_0 :: unsel_byp_clk_on_aon_gpio_001 [01:01] */
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_001_MASK 0x00000002
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_001_SHIFT 1
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_001_DEFAULT 0

/* AON_PIN_CTRL :: BYP_CLK_UNSELECT_0 :: unsel_byp_clk_on_aon_gpio_000 [00:00] */
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_000_MASK 0x00000001
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_000_SHIFT 0
#define BCHP_AON_PIN_CTRL_BYP_CLK_UNSELECT_0_unsel_byp_clk_on_aon_gpio_000_DEFAULT 0

#endif /* #ifndef BCHP_AON_PIN_CTRL_H__ */

/* End of File */