/***************************************************************************
 *     Copyright (c) 1999-2012, Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 *
 * Module Description:
 *                     DO NOT EDIT THIS FILE DIRECTLY
 *
 * This module was generated magically with RDB from a source description
 * file. You must edit the source file for changes to be made to this file.
 *
 *
 * Date:           Generated on         Wed Mar  7 03:11:28 2012
 *                 MD5 Checksum         d41d8cd98f00b204e9800998ecf8427e
 *
 * Compiled with:  RDB Utility          combo_header.pl
 *                 RDB Parser           3.0
 *                 unknown              unknown
 *                 Perl Interpreter     5.008005
 *                 Operating System     linux
 *
 * Revision History:
 *
 * $brcm_Log: $
 *
 ***************************************************************************/

#ifndef BCHP_COMMON_H__
#define BCHP_COMMON_H__

/***************************************************************************
 *BCM7425_B0
 ***************************************************************************/
#define BCHP_PHYSICAL_OFFSET                               0x10000000
#define BCHP_REGISTER_START                                0x00000000 /* DECODE_RBNODE_REGS_1 is first */
#define BCHP_REGISTER_END                                  0x00fffd98 /* MOCA_HOSTMISC is last */
#define BCHP_REGISTER_SIZE                                 0x003fff66 /* Number of registers */

/****************************************************************************
 * Core instance register start address.
 ***************************************************************************/
#define BCHP_DECODE_RBNODE_REGS_1_REG_START                0x00000000
#define BCHP_DECODE_RBNODE_REGS_1_REG_END                  0x0000007c
#define BCHP_DECODE_MAIN_1_REG_START                       0x00000100
#define BCHP_DECODE_MAIN_1_REG_END                         0x000001fc
#define BCHP_SDRAM_DEBUG_1_REG_START                       0x00000200
#define BCHP_SDRAM_DEBUG_1_REG_END                         0x0000027c
#define BCHP_DECODE_MCOM_1_REG_START                       0x00000300
#define BCHP_DECODE_MCOM_1_REG_END                         0x0000031c
#define BCHP_DECODE_SPRE_1_REG_START                       0x00000320
#define BCHP_DECODE_SPRE_1_REG_END                         0x0000033c
#define BCHP_DECODE_WPRD_1_REG_START                       0x00000340
#define BCHP_DECODE_WPRD_1_REG_END                         0x0000035c
#define BCHP_DECODE_DQNT_1_REG_START                       0x00000400
#define BCHP_DECODE_DQNT_1_REG_END                         0x0000045c
#define BCHP_DECODE_DQNT_8X8_1_REG_START                   0x00000500
#define BCHP_DECODE_DQNT_8X8_1_REG_END                     0x0000057c
#define BCHP_DECODE_VP8_XFRM_1_REG_START                   0x00000600
#define BCHP_DECODE_VP8_XFRM_1_REG_END                     0x0000060c
#define BCHP_DECODE_XFRM_1_REG_START                       0x00000700
#define BCHP_DECODE_XFRM_1_REG_END                         0x0000071c
#define BCHP_DECODE_DBLK_1_REG_START                       0x00000720
#define BCHP_DECODE_DBLK_1_REG_END                         0x0000073c
#define BCHP_DECODE_MB_1_REG_START                         0x00000740
#define BCHP_DECODE_MB_1_REG_END                           0x0000075c
#define BCHP_REG_CABAC2BINS_1_REG_START                    0x00000b00
#define BCHP_REG_CABAC2BINS_1_REG_END                      0x00000bfc
#define BCHP_DECODE_SINT_1_REG_START                       0x00000c00
#define BCHP_DECODE_SINT_1_REG_END                         0x00000dfc
#define BCHP_DECODE_RVC_1_REG_START                        0x00000e00
#define BCHP_DECODE_RVC_1_REG_END                          0x00000efc
#define BCHP_DECODE_CPUREGS_1_REG_START                    0x00000f00
#define BCHP_DECODE_CPUREGS_1_REG_END                      0x00000f7c
#define BCHP_DECODE_CPUREGS2_1_REG_START                   0x00000f80
#define BCHP_DECODE_CPUREGS2_1_REG_END                     0x00000ffc
#define BCHP_DECODE_CPUDMA_1_REG_START                     0x00001800
#define BCHP_DECODE_CPUDMA_1_REG_END                       0x000018fc
#define BCHP_DECODE_DMAMEM_1_REG_START                     0x00001a00
#define BCHP_DECODE_DMAMEM_1_REG_END                       0x000021fc
#define BCHP_REG_CABAC2BINS2_1_REG_START                   0x00002400
#define BCHP_REG_CABAC2BINS2_1_REG_END                     0x000027fc
#define BCHP_DECODE_WPTBL_1_REG_START                      0x00003000
#define BCHP_DECODE_WPTBL_1_REG_END                        0x000031fc
#define BCHP_DECODE_SINT_OLOOP_1_REG_START                 0x0000cc00
#define BCHP_DECODE_SINT_OLOOP_1_REG_END                   0x0000ccfc
#define BCHP_DECODE_SD_1_REG_START                         0x00040800
#define BCHP_DECODE_SD_1_REG_END                           0x00040ffc
#define BCHP_DECODE_IND_SDRAM_REGS_1_REG_START             0x00041000
#define BCHP_DECODE_IND_SDRAM_REGS_1_REG_END               0x0004107c
#define BCHP_DECODE_CPUCORE_1_REG_START                    0x00044000
#define BCHP_DECODE_CPUCORE_1_REG_END                      0x00044ffc
#define BCHP_DECODE_CPUAUX_1_REG_START                     0x00045000
#define BCHP_DECODE_CPUAUX_1_REG_END                       0x00045ffc
#define BCHP_DECODE_CPUIMEM_1_REG_START                    0x00046000
#define BCHP_DECODE_CPUIMEM_1_REG_END                      0x00047ffc
#define BCHP_DECODE_CPUDMEM_1_REG_START                    0x00048000
#define BCHP_DECODE_CPUDMEM_1_REG_END                      0x0004fffc
#define BCHP_DECODE_IND_SDRAM_REGS2_1_REG_START            0x00051000
#define BCHP_DECODE_IND_SDRAM_REGS2_1_REG_END              0x0005107c
#define BCHP_DECODE_CPUDMA2_1_REG_START                    0x00051800
#define BCHP_DECODE_CPUDMA2_1_REG_END                      0x000518fc
#define BCHP_DECODE_DMAMEM2_1_REG_START                    0x00051a00
#define BCHP_DECODE_DMAMEM2_1_REG_END                      0x000521fc
#define BCHP_DECODE_CPUCORE2_1_REG_START                   0x00054000
#define BCHP_DECODE_CPUCORE2_1_REG_END                     0x00054ffc
#define BCHP_DECODE_CPUAUX2_1_REG_START                    0x00055000
#define BCHP_DECODE_CPUAUX2_1_REG_END                      0x00055ffc
#define BCHP_DECODE_CPUIMEM2_1_REG_START                   0x00056000
#define BCHP_DECODE_CPUIMEM2_1_REG_END                     0x00057ffc
#define BCHP_DECODE_CPUDMEM2_1_REG_START                   0x00058000
#define BCHP_DECODE_CPUDMEM2_1_REG_END                     0x0005fffc
#define BCHP_DECODE_IP_SHIM_1_REG_START                    0x00060000
#define BCHP_DECODE_IP_SHIM_1_REG_END                      0x00060084
#define BCHP_AVD_CACHE_1_REG_START                         0x00062000
#define BCHP_AVD_CACHE_1_REG_END                           0x0006203c
#define BCHP_AVD_INTR2_1_REG_START                         0x00080000
#define BCHP_AVD_INTR2_1_REG_END                           0x0008002c
#define BCHP_AVD_RGR_1_REG_START                           0x00080400
#define BCHP_AVD_RGR_1_REG_END                             0x00080410
#define BCHP_VICH_1_REG_START                              0x00104000
#define BCHP_VICH_1_REG_END                                0x0010408b
#define BCHP_SATA_GRB_REG_START                            0x00180000
#define BCHP_SATA_GRB_REG_END                              0x0018000c
#define BCHP_SATA_TOP_CTRL_REG_START                       0x00180020
#define BCHP_SATA_TOP_CTRL_REG_END                         0x00180038
#define BCHP_SATA3_INTR2_REG_START                         0x00180080
#define BCHP_SATA3_INTR2_REG_END                           0x001800ac
#define BCHP_SATA_AHCI_GHC_REG_START                       0x00181000
#define BCHP_SATA_AHCI_GHC_REG_END                         0x00181028
#define BCHP_SATA_GLOBAL_RESERVED_REG_START                0x0018102c
#define BCHP_SATA_GLOBAL_RESERVED_REG_END                  0x0018109c
#define BCHP_SATA_PORT0_AHCI_S1_REG_START                  0x00181100
#define BCHP_SATA_PORT0_AHCI_S1_REG_END                    0x0018111c
#define BCHP_SATA_PORT0_AHCI_S2_REG_START                  0x00181120
#define BCHP_SATA_PORT0_AHCI_S2_REG_END                    0x00181134
#define BCHP_SATA_PORT0_AHCI_S3_REG_START                  0x00181138
#define BCHP_SATA_PORT0_AHCI_S3_REG_END                    0x0018117c
#define BCHP_SATA_PORT1_AHCI_S1_REG_START                  0x00181180
#define BCHP_SATA_PORT1_AHCI_S1_REG_END                    0x0018119c
#define BCHP_SATA_PORT1_AHCI_S2_REG_START                  0x001811a0
#define BCHP_SATA_PORT1_AHCI_S2_REG_END                    0x001811b4
#define BCHP_SATA_PORT1_AHCI_S3_REG_START                  0x001811b8
#define BCHP_SATA_PORT1_AHCI_S3_REG_END                    0x001811fc
#define BCHP_SATA_AHCI_PCICFG_REG_START                    0x00181600
#define BCHP_SATA_AHCI_PCICFG_REG_END                      0x00181664
#define BCHP_SATA_PORT0_CTRL_REG_START                     0x00181700
#define BCHP_SATA_PORT0_CTRL_REG_END                       0x00181730
#define BCHP_SATA_PORT0_CJPAT_REG_START                    0x00181740
#define BCHP_SATA_PORT0_CJPAT_REG_END                      0x00181764
#define BCHP_SATA_PORT1_CTRL_REG_START                     0x00181780
#define BCHP_SATA_PORT1_CTRL_REG_END                       0x001817b0
#define BCHP_SATA_PORT1_CJPAT_REG_START                    0x001817c0
#define BCHP_SATA_PORT1_CJPAT_REG_END                      0x001817e4
#define BCHP_SATA_LEG_PCICFG_REG_START                     0x00181800
#define BCHP_SATA_LEG_PCICFG_REG_END                       0x00181880
#define BCHP_SATA_PORT0_LEG_S1_REG_START                   0x00181900
#define BCHP_SATA_PORT0_LEG_S1_REG_END                     0x00181934
#define BCHP_SATA_PORT0_LEG_S2_REG_START                   0x00181940
#define BCHP_SATA_PORT0_LEG_S2_REG_END                     0x00181954
#define BCHP_SATA_PORT0_LEG_S3_REG_START                   0x00181958
#define BCHP_SATA_PORT0_LEG_S3_REG_END                     0x00181998
#define BCHP_SATA_PORT1_LEG_S1_REG_START                   0x00181a00
#define BCHP_SATA_PORT1_LEG_S1_REG_END                     0x00181a34
#define BCHP_SATA_PORT1_LEG_S2_REG_START                   0x00181a40
#define BCHP_SATA_PORT1_LEG_S2_REG_END                     0x00181a54
#define BCHP_SATA_PORT1_LEG_S3_REG_START                   0x00181a58
#define BCHP_SATA_PORT1_LEG_S3_REG_END                     0x00181a98
#define BCHP_BSP_CMDBUF_REG_START                          0x00329800
#define BCHP_BSP_CMDBUF_REG_END                            0x00329ffc
#define BCHP_BSP_GLB_CONTROL_REG_START                     0x0032b000
#define BCHP_BSP_GLB_CONTROL_REG_END                       0x0032b098
#define BCHP_BSP_PKL_REG_START                             0x0032b300
#define BCHP_BSP_PKL_REG_END                               0x0032b37c
#define BCHP_BSP_INST_PATCH_CTRL_REG_START                 0x0032b400
#define BCHP_BSP_INST_PATCH_CTRL_REG_END                   0x0032b404
#define BCHP_BSP_CONTROL_INTR2_REG_START                   0x0032b800
#define BCHP_BSP_CONTROL_INTR2_REG_END                     0x0032b82c
#define BCHP_BSP_INST_PATCHRAM_REG_START                   0x0032c000
#define BCHP_BSP_INST_PATCHRAM_REG_END                     0x0032fffc
#define BCHP_XPT_SECURITY_REG_START                        0x00360000
#define BCHP_XPT_SECURITY_REG_END                          0x0036fffc
#define BCHP_MMSCRAM_REG_START                             0x00370000
#define BCHP_MMSCRAM_REG_END                               0x00371ffc
#define BCHP_MEM_DMA_SECURE_REG_START                      0x00372000
#define BCHP_MEM_DMA_SECURE_REG_END                        0x0037200c
#define BCHP_SECTOP_GRB_REG_START                          0x00374000
#define BCHP_SECTOP_GRB_REG_END                            0x0037400c
#define BCHP_JTAG_OTP_REG_START                            0x00374100
#define BCHP_JTAG_OTP_REG_END                              0x00374138
#define BCHP_MEM_DMA_0_REG_START                           0x00374200
#define BCHP_MEM_DMA_0_REG_END                             0x00374224
#define BCHP_XPT_SECURITY_NS_REG_START                     0x00374300
#define BCHP_XPT_SECURITY_NS_REG_END                       0x00374310
#define BCHP_MEMC_GEN_0_REG_START                          0x003b0000
#define BCHP_MEMC_GEN_0_REG_END                            0x003b04f4
#define BCHP_MEMC_ARB_0_REG_START                          0x003b1000
#define BCHP_MEMC_ARB_0_REG_END                            0x003b1244
#define BCHP_MEMC_DDR_0_REG_START                          0x003b2000
#define BCHP_MEMC_DDR_0_REG_END                            0x003b22fc
#define BCHP_MEMC_L2_0_REG_START                           0x003b3000
#define BCHP_MEMC_L2_0_REG_END                             0x003b302c
#define BCHP_MEMC_L2_1_0_REG_START                         0x003b3800
#define BCHP_MEMC_L2_1_0_REG_END                           0x003b382c
#define BCHP_MEMC_RGRB_0_REG_START                         0x003b4000
#define BCHP_MEMC_RGRB_0_REG_END                           0x003b4010
#define BCHP_MEMC_MISC_0_REG_START                         0x003b5000
#define BCHP_MEMC_MISC_0_REG_END                           0x003b5010
#define BCHP_DDR40_PHY_CONTROL_REGS_0_REG_START            0x003b6000
#define BCHP_DDR40_PHY_CONTROL_REGS_0_REG_END              0x003b60c4
#define BCHP_DDR40_PHY_WORD_LANE_0_0_REG_START             0x003b6200
#define BCHP_DDR40_PHY_WORD_LANE_0_0_REG_END               0x003b63b0
#define BCHP_DDR40_PHY_WORD_LANE_1_0_REG_START             0x003b6400
#define BCHP_DDR40_PHY_WORD_LANE_1_0_REG_END               0x003b65b0
#define BCHP_MEMC_DDR23_SHIM_ADDR_CNTL_0_REG_START         0x003b8000
#define BCHP_MEMC_DDR23_SHIM_ADDR_CNTL_0_REG_END           0x003b8138
#define BCHP_S_MEMC_0_REG_START                            0x003ba000
#define BCHP_S_MEMC_0_REG_END                              0x003ba220
#define BCHP_MEMC_GEN_1_REG_START                          0x003c0000
#define BCHP_MEMC_GEN_1_REG_END                            0x003c04f4
#define BCHP_MEMC_ARB_1_REG_START                          0x003c1000
#define BCHP_MEMC_ARB_1_REG_END                            0x003c1244
#define BCHP_MEMC_DDR_1_REG_START                          0x003c2000
#define BCHP_MEMC_DDR_1_REG_END                            0x003c22fc
#define BCHP_MEMC_L2_1_REG_START                           0x003c3000
#define BCHP_MEMC_L2_1_REG_END                             0x003c302c
#define BCHP_MEMC_L2_1_1_REG_START                         0x003c3800
#define BCHP_MEMC_L2_1_1_REG_END                           0x003c382c
#define BCHP_MEMC_RGRB_1_REG_START                         0x003c4000
#define BCHP_MEMC_RGRB_1_REG_END                           0x003c4010
#define BCHP_MEMC_MISC_1_REG_START                         0x003c5000
#define BCHP_MEMC_MISC_1_REG_END                           0x003c5010
#define BCHP_DDR40_PHY_CONTROL_REGS_1_REG_START            0x003c6000
#define BCHP_DDR40_PHY_CONTROL_REGS_1_REG_END              0x003c60c4
#define BCHP_DDR40_PHY_WORD_LANE_0_1_REG_START             0x003c6200
#define BCHP_DDR40_PHY_WORD_LANE_0_1_REG_END               0x003c63b0
#define BCHP_DDR40_PHY_WORD_LANE_1_1_REG_START             0x003c6400
#define BCHP_DDR40_PHY_WORD_LANE_1_1_REG_END               0x003c65b0
#define BCHP_MEMC_DDR23_SHIM_ADDR_CNTL_1_REG_START         0x003c8000
#define BCHP_MEMC_DDR23_SHIM_ADDR_CNTL_1_REG_END           0x003c8138
#define BCHP_S_MEMC_1_REG_START                            0x003ca000
#define BCHP_S_MEMC_1_REG_END                              0x003ca220
#define BCHP_SUN_GISB_ARB_REG_START                        0x00400000
#define BCHP_SUN_GISB_ARB_REG_END                          0x004000d8
#define BCHP_SUN_RGR_REG_START                             0x00400400
#define BCHP_SUN_RGR_REG_END                               0x00400410
#define BCHP_SUN_RG_REG_START                              0x00400800
#define BCHP_SUN_RG_REG_END                                0x0040080c
#define BCHP_TPCAP_REG_START                               0x00400c00
#define BCHP_TPCAP_REG_END                                 0x00400c84
#define BCHP_SUN_L2_REG_START                              0x00403000
#define BCHP_SUN_L2_REG_END                                0x0040302c
#define BCHP_SM_L2_REG_START                               0x00403400
#define BCHP_SM_L2_REG_END                                 0x0040342c
#define BCHP_SM_REG_START                                  0x00403800
#define BCHP_SM_REG_END                                    0x00403824
#define BCHP_SM_FAST_REG_START                             0x00403c00
#define BCHP_SM_FAST_REG_END                               0x00403c18
#define BCHP_SUN_TOP_CTRL_REG_START                        0x00404000
#define BCHP_SUN_TOP_CTRL_REG_END                          0x00404518
#define BCHP_IRB_REG_START                                 0x00406000
#define BCHP_IRB_REG_END                                   0x00406138
#define BCHP_PM_REG_START                                  0x00406180
#define BCHP_PM_REG_END                                    0x00406188
#define BCHP_BSCC_REG_START                                0x00406200
#define BCHP_BSCC_REG_END                                  0x00406254
#define BCHP_BSCD_REG_START                                0x00406280
#define BCHP_BSCD_REG_END                                  0x004062d4
#define BCHP_BSCE_REG_START                                0x00406300
#define BCHP_BSCE_REG_END                                  0x00406354
#define BCHP_PWM_REG_START                                 0x00406580
#define BCHP_PWM_REG_END                                   0x004065a4
#define BCHP_GIO_REG_START                                 0x00406700
#define BCHP_GIO_REG_END                                   0x0040677c
#define BCHP_IRQ0_REG_START                                0x00406780
#define BCHP_IRQ0_REG_END                                  0x00406784
#define BCHP_IRQ1_REG_START                                0x00406788
#define BCHP_IRQ1_REG_END                                  0x0040678c
#define BCHP_TIMER_REG_START                               0x004067c0
#define BCHP_TIMER_REG_END                                 0x004067fc
#define BCHP_PWMB_REG_START                                0x00406800
#define BCHP_PWMB_REG_END                                  0x00406824
#define BCHP_UARTA_REG_START                               0x00406b00
#define BCHP_UARTA_REG_END                                 0x00406b1c
#define BCHP_UARTB_REG_START                               0x00406b40
#define BCHP_UARTB_REG_END                                 0x00406b5c
#define BCHP_UARTC_REG_START                               0x00406b80
#define BCHP_UARTC_REG_END                                 0x00406b9c
#define BCHP_SCA_REG_START                                 0x00406c00
#define BCHP_SCA_REG_END                                   0x00406cbc
#define BCHP_SCB_REG_START                                 0x00406cc0
#define BCHP_SCB_REG_END                                   0x00406d7c
#define BCHP_SCIRQ0_REG_START                              0x00406e40
#define BCHP_SCIRQ0_REG_END                                0x00406e44
#define BCHP_SCIRQ1_REG_START                              0x00406e48
#define BCHP_SCIRQ1_REG_END                                0x00406e4c
#define BCHP_MCIF_REG_START                                0x00407000
#define BCHP_MCIF_REG_END                                  0x00407020
#define BCHP_MCIF_INTR2_REG_START                          0x00407040
#define BCHP_MCIF_INTR2_REG_END                            0x0040706c
#define BCHP_TMON_REG_START                                0x00407080
#define BCHP_TMON_REG_END                                  0x004070d0
#define BCHP_UPG_AUX_INTR2_REG_START                       0x00407100
#define BCHP_UPG_AUX_INTR2_REG_END                         0x0040712c
#define BCHP_CTK_REG_START                                 0x00407200
#define BCHP_CTK_REG_END                                   0x00407378
#define BCHP_UPG_UART_DMA_REG_START                        0x00407400
#define BCHP_UPG_UART_DMA_REG_END                          0x00407428
#define BCHP_AON_CTRL_REG_START                            0x00408000
#define BCHP_AON_CTRL_REG_END                              0x004083fc
#define BCHP_AON_L2_REG_START                              0x00408400
#define BCHP_AON_L2_REG_END                                0x0040842c
#define BCHP_AON_PM_L2_REG_START                           0x00408440
#define BCHP_AON_PM_L2_REG_END                             0x0040846c
#define BCHP_AON_PIN_CTRL_REG_START                        0x00408500
#define BCHP_AON_PIN_CTRL_REG_END                          0x00408518
#define BCHP_AON_HDMI_TX_REG_START                         0x00408600
#define BCHP_AON_HDMI_TX_REG_END                           0x00408698
#define BCHP_AON_HDMI_RX_REG_START                         0x00408800
#define BCHP_AON_HDMI_RX_REG_END                           0x00408908
#define BCHP_LDK_REG_START                                 0x00409000
#define BCHP_LDK_REG_END                                   0x0040903c
#define BCHP_PM_AON_REG_START                              0x00409040
#define BCHP_PM_AON_REG_END                                0x00409048
#define BCHP_ICAP_REG_START                                0x00409080
#define BCHP_ICAP_REG_END                                  0x004090bc
#define BCHP_KBD1_REG_START                                0x004090c0
#define BCHP_KBD1_REG_END                                  0x004090fc
#define BCHP_KBD2_REG_START                                0x00409100
#define BCHP_KBD2_REG_END                                  0x0040913c
#define BCHP_KBD3_REG_START                                0x00409140
#define BCHP_KBD3_REG_END                                  0x0040917c
#define BCHP_BSCA_REG_START                                0x00409180
#define BCHP_BSCA_REG_END                                  0x004091d4
#define BCHP_MSPI_REG_START                                0x00409200
#define BCHP_MSPI_REG_END                                  0x0040937c
#define BCHP_BSCB_REG_START                                0x00409400
#define BCHP_BSCB_REG_END                                  0x00409454
#define BCHP_IRQ0_AON_REG_START                            0x00409480
#define BCHP_IRQ0_AON_REG_END                              0x00409484
#define BCHP_IRQ1_AON_REG_START                            0x00409488
#define BCHP_IRQ1_AON_REG_END                              0x0040948c
#define BCHP_GIO_AON_REG_START                             0x004094c0
#define BCHP_GIO_AON_REG_END                               0x004094fc
#define BCHP_BICAP_REG_START                               0x00409500
#define BCHP_BICAP_REG_END                                 0x00409538
#define BCHP_UPG_AUX_AON_INTR2_REG_START                   0x00409540
#define BCHP_UPG_AUX_AON_INTR2_REG_END                     0x0040956c
#define BCHP_WKTMR_REG_START                               0x00409580
#define BCHP_WKTMR_REG_END                                 0x00409590
#define BCHP_SYS_GISB_ARB_SEC_REG_START                    0x0040e000
#define BCHP_SYS_GISB_ARB_SEC_REG_END                      0x0040e0b4
#define BCHP_SYS_TOP_CTRL_SEC_REG_START                    0x0040e700
#define BCHP_SYS_TOP_CTRL_SEC_REG_END                      0x0040e704
#define BCHP_AON_CTRL_SECURE_REG_START                     0x0040e800
#define BCHP_AON_CTRL_SECURE_REG_END                       0x0040e87c
#define BCHP_PCIE_RC_CFG_TYPE1_REG_START                   0x00410000
#define BCHP_PCIE_RC_CFG_TYPE1_REG_END                     0x0041003c
#define BCHP_PCIE_RC_CFG_PM_REG_START                      0x00410048
#define BCHP_PCIE_RC_CFG_PM_REG_END                        0x0041004c
#define BCHP_PCIE_RC_CFG_PCIE_REG_START                    0x004100ac
#define BCHP_PCIE_RC_CFG_PCIE_REG_END                      0x004100e4
#define BCHP_PCIE_RC_CFG_AER_REG_START                     0x00410100
#define BCHP_PCIE_RC_CFG_AER_REG_END                       0x00410134
#define BCHP_PCIE_RC_CFG_VC_REG_START                      0x00410160
#define BCHP_PCIE_RC_CFG_VC_REG_END                        0x00410178
#define BCHP_PCIE_RC_CFG_VENDOR_REG_START                  0x00410180
#define BCHP_PCIE_RC_CFG_VENDOR_REG_END                    0x004101a4
#define BCHP_PCIE_RC_CFG_PRIV0_REG_START                   0x00410404
#define BCHP_PCIE_RC_CFG_PRIV0_REG_END                     0x00410418
#define BCHP_PCIE_RC_CFG_PRIV1_REG_START                   0x00410428
#define BCHP_PCIE_RC_CFG_PRIV1_REG_END                     0x00410564
#define BCHP_PCIE_RC_TL_REG_START                          0x00410800
#define BCHP_PCIE_RC_TL_REG_END                            0x00410998
#define BCHP_PCIE_RC_DL_REG_START                          0x00411000
#define BCHP_PCIE_RC_DL_REG_END                            0x00411424
#define BCHP_PCIE_RC_PL_REG_START                          0x00411800
#define BCHP_PCIE_RC_PL_REG_END                            0x00411d30
#define BCHP_PCIE_EP_CFG_TYPE0_REG_START                   0x00412000
#define BCHP_PCIE_EP_CFG_TYPE0_REG_END                     0x0041203c
#define BCHP_PCIE_EP_CFG_PM_REG_START                      0x00412048
#define BCHP_PCIE_EP_CFG_PM_REG_END                        0x0041204c
#define BCHP_PCIE_EP_CFG_VPD_REG_START                     0x00412050
#define BCHP_PCIE_EP_CFG_VPD_REG_END                       0x00412054
#define BCHP_PCIE_EP_CFG_MSI_REG_START                     0x00412058
#define BCHP_PCIE_EP_CFG_MSI_REG_END                       0x00412064
#define BCHP_PCIE_EP_CFG_MSIX_REG_START                    0x004120a0
#define BCHP_PCIE_EP_CFG_MSIX_REG_END                      0x004120a8
#define BCHP_PCIE_EP_CFG_PCIE_REG_START                    0x004120ac
#define BCHP_PCIE_EP_CFG_PCIE_REG_END                      0x004120e4
#define BCHP_PCIE_EP_CFG_AER_REG_START                     0x00412100
#define BCHP_PCIE_EP_CFG_AER_REG_END                       0x00412134
#define BCHP_PCIE_EP_CFG_DEV_REG_START                     0x0041213c
#define BCHP_PCIE_EP_CFG_DEV_REG_END                       0x00412144
#define BCHP_PCIE_EP_CFG_PB_REG_START                      0x00412150
#define BCHP_PCIE_EP_CFG_PB_REG_END                        0x0041215c
#define BCHP_PCIE_EP_CFG_VC_REG_START                      0x00412160
#define BCHP_PCIE_EP_CFG_VC_REG_END                        0x00412178
#define BCHP_PCIE_EP_CFG_VENDOR_REG_START                  0x00412180
#define BCHP_PCIE_EP_CFG_VENDOR_REG_END                    0x004121a4
#define BCHP_PCIE_EP_CFG_PRIV0_REG_START                   0x00412404
#define BCHP_PCIE_EP_CFG_PRIV0_REG_END                     0x00412418
#define BCHP_PCIE_EP_CFG_PRIV1_REG_START                   0x00412428
#define BCHP_PCIE_EP_CFG_PRIV1_REG_END                     0x00412564
#define BCHP_PCIE_EP_TL_REG_START                          0x00412800
#define BCHP_PCIE_EP_TL_REG_END                            0x00412998
#define BCHP_PCIE_EP_DL_REG_START                          0x00413000
#define BCHP_PCIE_EP_DL_REG_END                            0x00413424
#define BCHP_PCIE_EP_PL_REG_START                          0x00413800
#define BCHP_PCIE_EP_PL_REG_END                            0x00413d30
#define BCHP_PCIE_MISC_REG_START                           0x00414000
#define BCHP_PCIE_MISC_REG_END                             0x00414094
#define BCHP_PCIE_MISC_PERST_REG_START                     0x00414100
#define BCHP_PCIE_MISC_PERST_REG_END                       0x00414104
#define BCHP_PCIE_MISC_HARD_REG_START                      0x00414200
#define BCHP_PCIE_MISC_HARD_REG_END                        0x00414204
#define BCHP_PCIE_INTR2_REG_START                          0x00414300
#define BCHP_PCIE_INTR2_REG_END                            0x0041432c
#define BCHP_PCIE_DMA_REG_START                            0x00414400
#define BCHP_PCIE_DMA_REG_END                              0x0041446c
#define BCHP_HIF_RGR1_REG_START                            0x00418000
#define BCHP_HIF_RGR1_REG_END                              0x00418010
#define BCHP_HIF_PCIe_RG_REG_START                         0x00418200
#define BCHP_HIF_PCIe_RG_REG_END                           0x0041820c
#define BCHP_PCIE_EXT_CFG_REG_START                        0x00418300
#define BCHP_PCIE_EXT_CFG_REG_END                          0x00418308
#define BCHP_SDIO_0_HOST_REG_START                         0x00419000
#define BCHP_SDIO_0_HOST_REG_END                           0x004190fc
#define BCHP_SDIO_0_CFG_REG_START                          0x00419100
#define BCHP_SDIO_0_CFG_REG_END                            0x004191fc
#define BCHP_SDIO_1_HOST_REG_START                         0x00419200
#define BCHP_SDIO_1_HOST_REG_END                           0x004192fc
#define BCHP_SDIO_1_CFG_REG_START                          0x00419300
#define BCHP_SDIO_1_CFG_REG_END                            0x004193fc
#define BCHP_SDIO_1_BOOT_REG_START                         0x00419400
#define BCHP_SDIO_1_BOOT_REG_END                           0x0041943c
#define BCHP_EBI_REG_START                                 0x00419800
#define BCHP_EBI_REG_END                                   0x00419bfc
#define BCHP_HIF_INTR2_REG_START                           0x0041a000
#define BCHP_HIF_INTR2_REG_END                             0x0041a02c
#define BCHP_IPI0_INTR2_REG_START                          0x0041a100
#define BCHP_IPI0_INTR2_REG_END                            0x0041a12c
#define BCHP_IPI1_INTR2_REG_START                          0x0041a200
#define BCHP_IPI1_INTR2_REG_END                            0x0041a22c
#define BCHP_HIF_CPU_INTR1_REG_START                       0x0041a400
#define BCHP_HIF_CPU_INTR1_REG_END                         0x0041a42c
#define BCHP_HIF_CPU_TP1_INTR1_REG_START                   0x0041a600
#define BCHP_HIF_CPU_TP1_INTR1_REG_END                     0x0041a62c
#define BCHP_PCI_PCIE_INTR1_REG_START                      0x0041a700
#define BCHP_PCI_PCIE_INTR1_REG_END                        0x0041a72c
#define BCHP_HIF_RGR2_REG_START                            0x0041a800
#define BCHP_HIF_RGR2_REG_END                              0x0041a810
#define BCHP_HIF_SPI_INTR2_REG_START                       0x0041ad00
#define BCHP_HIF_SPI_INTR2_REG_END                         0x0041ad2c
#define BCHP_HIF_TOP_CTRL_REG_START                        0x0041b400
#define BCHP_HIF_TOP_CTRL_REG_END                          0x0041b41c
#define BCHP_NAND_REG_START                                0x0041b800
#define BCHP_NAND_REG_END                                  0x0041bbfc
#define BCHP_EDU_REG_START                                 0x0041bc00
#define BCHP_EDU_REG_END                                   0x0041bc20
#define BCHP_BSPI_REG_START                                0x0041c000
#define BCHP_BSPI_REG_END                                  0x0041c04c
#define BCHP_BSPI_RAF_REG_START                            0x0041c100
#define BCHP_BSPI_RAF_REG_END                              0x0041c120
#define BCHP_HIF_MSPI_REG_START                            0x0041c200
#define BCHP_HIF_MSPI_REG_END                              0x0041c384
#define BCHP_MICH_REG_START                                0x00429000
#define BCHP_MICH_REG_END                                  0x00429000
#define BCHP_HIF_SECURE_CTRL_REG_START                     0x00429100
#define BCHP_HIF_SECURE_CTRL_REG_END                       0x00429100
#define BCHP_HIF_SECURE_BSPI_REG_START                     0x00429200
#define BCHP_HIF_SECURE_BSPI_REG_END                       0x00429200
#define BCHP_HIF_SECURE_LR_SPI_REG_START                   0x00429300
#define BCHP_HIF_SECURE_LR_SPI_REG_END                     0x00429300
#define BCHP_NAND_SECURE_REG_START                         0x00429400
#define BCHP_NAND_SECURE_REG_END                           0x00429400
#define BCHP_HIF_SECURE_INDIRECT_SPI_PIPE_REG_START        0x00429800
#define BCHP_HIF_SECURE_INDIRECT_SPI_PIPE_REG_END          0x00429800
#define BCHP_CLKGEN_REG_START                              0x00430000
#define BCHP_CLKGEN_REG_END                                0x00430528
#define BCHP_VCXO_2_RM_REG_START                           0x00432000
#define BCHP_VCXO_2_RM_REG_END                             0x0043202c
#define BCHP_VCXO_1_RM_REG_START                           0x00432080
#define BCHP_VCXO_1_RM_REG_END                             0x004320ac
#define BCHP_VCXO_0_RM_REG_START                           0x00432100
#define BCHP_VCXO_0_RM_REG_END                             0x0043212c
#define BCHP_AVS_HW_MNTR_REG_START                         0x00432800
#define BCHP_AVS_HW_MNTR_REG_END                           0x00432874
#define BCHP_AVS_PVT_MNTR_CONFIG_REG_START                 0x00432900
#define BCHP_AVS_PVT_MNTR_CONFIG_REG_END                   0x0043291c
#define BCHP_AVS_ASB_REGISTERS_REG_START                   0x00432a00
#define BCHP_AVS_ASB_REGISTERS_REG_END                     0x00432a18
#define BCHP_AVS_RO_REGISTERS_0_REG_START                  0x00432b00
#define BCHP_AVS_RO_REGISTERS_0_REG_END                    0x00432bdc
#define BCHP_AVS_RO_REGISTERS_1_REG_START                  0x00432c00
#define BCHP_AVS_RO_REGISTERS_1_REG_END                    0x00432c8c
#define BCHP_AVS_ROSC_THRESHOLD_1_REG_START                0x00432d00
#define BCHP_AVS_ROSC_THRESHOLD_1_REG_END                  0x00432de4
#define BCHP_AVS_ROSC_THRESHOLD_2_REG_START                0x00432e00
#define BCHP_AVS_ROSC_THRESHOLD_2_REG_END                  0x00432ee4
#define BCHP_CLKGEN_INTR2_REG_START                        0x00433000
#define BCHP_CLKGEN_INTR2_REG_END                          0x0043302c
#define BCHP_CLKGEN_GR_REG_START                           0x00433400
#define BCHP_CLKGEN_GR_REG_END                             0x0043340c
#define BCHP_UHFR_REG_START                                0x00438000
#define BCHP_UHFR_REG_END                                  0x004380f8
#define BCHP_UHFR_INTR2_REG_START                          0x00438200
#define BCHP_UHFR_INTR2_REG_END                            0x0043822c
#define BCHP_UHFR_GR_BRIDGE_REG_START                      0x00438300
#define BCHP_UHFR_GR_BRIDGE_REG_END                        0x0043830c
#define BCHP_USB_CAPS_REG_START                            0x00480000
#define BCHP_USB_CAPS_REG_END                              0x0048002c
#define BCHP_USB_GR_BRIDGE_REG_START                       0x00480100
#define BCHP_USB_GR_BRIDGE_REG_END                         0x0048010c
#define BCHP_USB_INTR2_REG_START                           0x00480180
#define BCHP_USB_INTR2_REG_END                             0x004801ac
#define BCHP_USB_CTRL_REG_START                            0x00480200
#define BCHP_USB_CTRL_REG_END                              0x00480238
#define BCHP_USB_EHCI_REG_START                            0x00480300
#define BCHP_USB_EHCI_REG_END                              0x004803a4
#define BCHP_USB_OHCI_REG_START                            0x00480400
#define BCHP_USB_OHCI_REG_END                              0x00480454
#define BCHP_USB_EHCI1_REG_START                           0x00480500
#define BCHP_USB_EHCI1_REG_END                             0x004805a4
#define BCHP_USB_OHCI1_REG_START                           0x00480600
#define BCHP_USB_OHCI1_REG_END                             0x00480654
#define BCHP_USB1_CAPS_REG_START                           0x00490000
#define BCHP_USB1_CAPS_REG_END                             0x0049002c
#define BCHP_USB1_GR_BRIDGE_REG_START                      0x00490100
#define BCHP_USB1_GR_BRIDGE_REG_END                        0x0049010c
#define BCHP_USB1_INTR2_REG_START                          0x00490180
#define BCHP_USB1_INTR2_REG_END                            0x004901ac
#define BCHP_USB1_CTRL_REG_START                           0x00490200
#define BCHP_USB1_CTRL_REG_END                             0x00490238
#define BCHP_USB1_EHCI_REG_START                           0x00490300
#define BCHP_USB1_EHCI_REG_END                             0x004903a4
#define BCHP_USB1_OHCI_REG_START                           0x00490400
#define BCHP_USB1_OHCI_REG_END                             0x00490454
#define BCHP_USB1_EHCI1_REG_START                          0x00490500
#define BCHP_USB1_EHCI1_REG_END                            0x004905a4
#define BCHP_USB1_OHCI1_REG_START                          0x00490600
#define BCHP_USB1_OHCI1_REG_END                            0x00490654
#define BCHP_BOOTROM_REG_START                             0x00500000
#define BCHP_BOOTROM_REG_END                               0x00500ffc
#define BCHP_MFD_0_REG_START                               0x00600000
#define BCHP_MFD_0_REG_END                                 0x00600264
#define BCHP_MFD_1_REG_START                               0x00600400
#define BCHP_MFD_1_REG_END                                 0x006005fc
#define BCHP_MFD_2_REG_START                               0x00600800
#define BCHP_MFD_2_REG_END                                 0x006009fc
#define BCHP_VFD_0_REG_START                               0x00601000
#define BCHP_VFD_0_REG_END                                 0x006011fc
#define BCHP_VFD_1_REG_START                               0x00601200
#define BCHP_VFD_1_REG_END                                 0x006013fc
#define BCHP_VFD_2_REG_START                               0x00601400
#define BCHP_VFD_2_REG_END                                 0x006015fc
#define BCHP_VFD_3_REG_START                               0x00601600
#define BCHP_VFD_3_REG_END                                 0x006017fc
#define BCHP_VFD_4_REG_START                               0x00601800
#define BCHP_VFD_4_REG_END                                 0x006019fc
#define BCHP_RDC_REG_START                                 0x00602000
#define BCHP_RDC_REG_END                                   0x006029fc
#define BCHP_BVNF_INTR2_0_REG_START                        0x00603000
#define BCHP_BVNF_INTR2_0_REG_END                          0x0060302c
#define BCHP_BVNF_INTR2_1_REG_START                        0x00603100
#define BCHP_BVNF_INTR2_1_REG_END                          0x0060312c
#define BCHP_BVNF_INTR2_3_REG_START                        0x00603300
#define BCHP_BVNF_INTR2_3_REG_END                          0x0060332c
#define BCHP_BVNF_INTR2_4_REG_START                        0x00603400
#define BCHP_BVNF_INTR2_4_REG_END                          0x0060342c
#define BCHP_BVNF_INTR2_5_REG_START                        0x00603500
#define BCHP_BVNF_INTR2_5_REG_END                          0x0060352c
#define BCHP_FMISC_REG_START                               0x00604000
#define BCHP_FMISC_REG_END                                 0x00604020
#define BCHP_SCL_0_REG_START                               0x00620000
#define BCHP_SCL_0_REG_END                                 0x006203fc
#define BCHP_SCL_1_REG_START                               0x00620400
#define BCHP_SCL_1_REG_END                                 0x006207fc
#define BCHP_SCL_2_REG_START                               0x00620800
#define BCHP_SCL_2_REG_END                                 0x00620bfc
#define BCHP_SCL_3_REG_START                               0x00620c00
#define BCHP_SCL_3_REG_END                                 0x00620ffc
#define BCHP_SCL_4_REG_START                               0x00621000
#define BCHP_SCL_4_REG_END                                 0x006213fc
#define BCHP_VNET_F_REG_START                              0x00622000
#define BCHP_VNET_F_REG_END                                0x006220bc
#define BCHP_VNET_B_REG_START                              0x00622200
#define BCHP_VNET_B_REG_END                                0x006222ac
#define BCHP_MMISC_REG_START                               0x00622800
#define BCHP_MMISC_REG_END                                 0x00622820
#define BCHP_LBOX_0_REG_START                              0x00624000
#define BCHP_LBOX_0_REG_END                                0x00624070
#define BCHP_LBOX_1_REG_START                              0x00624200
#define BCHP_LBOX_1_REG_END                                0x00624270
#define BCHP_LBOX_2_REG_START                              0x00624400
#define BCHP_LBOX_2_REG_END                                0x00624470
#define BCHP_LBOX_3_REG_START                              0x00624600
#define BCHP_LBOX_3_REG_END                                0x00624670
#define BCHP_DNR_0_REG_START                               0x00626000
#define BCHP_DNR_0_REG_END                                 0x006260a4
#define BCHP_DNR_1_REG_START                               0x00626400
#define BCHP_DNR_1_REG_END                                 0x006264a4
#define BCHP_DNR_2_REG_START                               0x00626600
#define BCHP_DNR_2_REG_END                                 0x006266a4
#define BCHP_BVNM_INTR2_0_REG_START                        0x00627000
#define BCHP_BVNM_INTR2_0_REG_END                          0x0062702c
#define BCHP_BVNM_INTR2_1_REG_START                        0x00627100
#define BCHP_BVNM_INTR2_1_REG_END                          0x0062712c
#define BCHP_CAP_0_REG_START                               0x00640000
#define BCHP_CAP_0_REG_END                                 0x0064007c
#define BCHP_CAP_1_REG_START                               0x00640200
#define BCHP_CAP_1_REG_END                                 0x0064027c
#define BCHP_CAP_2_REG_START                               0x00640400
#define BCHP_CAP_2_REG_END                                 0x0064047c
#define BCHP_CAP_3_REG_START                               0x00640600
#define BCHP_CAP_3_REG_END                                 0x0064067c
#define BCHP_CAP_4_REG_START                               0x00640800
#define BCHP_CAP_4_REG_END                                 0x0064087c
#define BCHP_GFD_0_REG_START                               0x00641000
#define BCHP_GFD_0_REG_END                                 0x00641228
#define BCHP_GFD_1_REG_START                               0x00641400
#define BCHP_GFD_1_REG_END                                 0x00641554
#define BCHP_GFD_2_REG_START                               0x00641800
#define BCHP_GFD_2_REG_END                                 0x00641a28
#define BCHP_GFD_3_REG_START                               0x00641c00
#define BCHP_GFD_3_REG_END                                 0x00641e28
#define BCHP_CMP_0_REG_START                               0x00642000
#define BCHP_CMP_0_REG_END                                 0x006424b4
#define BCHP_CMP_1_REG_START                               0x00642800
#define BCHP_CMP_1_REG_END                                 0x00642cb4
#define BCHP_CMP_2_REG_START                               0x00643000
#define BCHP_CMP_2_REG_END                                 0x00643264
#define BCHP_CMP_3_REG_START                               0x00643800
#define BCHP_CMP_3_REG_END                                 0x00643a64
#define BCHP_TNT_CMP_0_V0_REG_START                        0x00644000
#define BCHP_TNT_CMP_0_V0_REG_END                          0x006440a4
#define BCHP_MASK_0_REG_START                              0x00644400
#define BCHP_MASK_0_REG_END                                0x00644420
#define BCHP_PEP_CMP_0_V0_REG_START                        0x00646000
#define BCHP_PEP_CMP_0_V0_REG_END                          0x00647484
#define BCHP_BVNB_INTR2_REG_START                          0x00648000
#define BCHP_BVNB_INTR2_REG_END                            0x0064802c
#define BCHP_BMISC_REG_START                               0x00648400
#define BCHP_BMISC_REG_END                                 0x0064841c
#define BCHP_MVP_TOP_0_REG_START                           0x00660000
#define BCHP_MVP_TOP_0_REG_END                             0x0066002c
#define BCHP_SIOB_0_REG_START                              0x00660200
#define BCHP_SIOB_0_REG_END                                0x006602fc
#define BCHP_HSCL_0_REG_START                              0x00660400
#define BCHP_HSCL_0_REG_END                                0x006607fc
#define BCHP_HD_ANR_MCTF_0_REG_START                       0x00661000
#define BCHP_HD_ANR_MCTF_0_REG_END                         0x0066127c
#define BCHP_HD_ANR_AND_0_REG_START                        0x00661800
#define BCHP_HD_ANR_AND_0_REG_END                          0x00661888
#define BCHP_MDI_TOP_0_REG_START                           0x00662000
#define BCHP_MDI_TOP_0_REG_END                             0x00662054
#define BCHP_MDI_FCB_0_REG_START                           0x00662400
#define BCHP_MDI_FCB_0_REG_END                             0x006627fc
#define BCHP_MDI_PPB_0_REG_START                           0x00662800
#define BCHP_MDI_PPB_0_REG_END                             0x00662bfc
#define BCHP_MDI_FCN_0_REG_START                           0x00662c00
#define BCHP_MDI_FCN_0_REG_END                             0x00662ffc
#define BCHP_MVP_TOP_1_REG_START                           0x00670000
#define BCHP_MVP_TOP_1_REG_END                             0x0067002c
#define BCHP_SIOB_1_REG_START                              0x00670200
#define BCHP_SIOB_1_REG_END                                0x006702fc
#define BCHP_HSCL_1_REG_START                              0x00670400
#define BCHP_HSCL_1_REG_END                                0x006707fc
#define BCHP_MDI_TOP_1_REG_START                           0x00672000
#define BCHP_MDI_TOP_1_REG_END                             0x00672044
#define BCHP_MDI_PPB_1_REG_START                           0x00672800
#define BCHP_MDI_PPB_1_REG_END                             0x00672bfc
#define BCHP_MDI_FCN_1_REG_START                           0x00672c00
#define BCHP_MDI_FCN_1_REG_END                             0x00672ffc
#define BCHP_MVP_TOP_2_REG_START                           0x00680000
#define BCHP_MVP_TOP_2_REG_END                             0x0068002c
#define BCHP_SIOB_2_REG_START                              0x00680200
#define BCHP_SIOB_2_REG_END                                0x006802fc
#define BCHP_HSCL_2_REG_START                              0x00680400
#define BCHP_HSCL_2_REG_END                                0x006807fc
#define BCHP_MDI_TOP_2_REG_START                           0x00682000
#define BCHP_MDI_TOP_2_REG_END                             0x00682044
#define BCHP_MDI_PPB_2_REG_START                           0x00682800
#define BCHP_MDI_PPB_2_REG_END                             0x00682bfc
#define BCHP_MDI_FCN_2_REG_START                           0x00682c00
#define BCHP_MDI_FCN_2_REG_END                             0x00682ffc
#define BCHP_MISC_REG_START                                0x00690000
#define BCHP_MISC_REG_END                                  0x006900a8
#define BCHP_IT_0_REG_START                                0x00691000
#define BCHP_IT_0_REG_END                                  0x006917fc
#define BCHP_IT_1_REG_START                                0x00692000
#define BCHP_IT_1_REG_END                                  0x006927fc
#define BCHP_VF_0_REG_START                                0x00693000
#define BCHP_VF_0_REG_END                                  0x00693134
#define BCHP_VF_1_REG_START                                0x00693200
#define BCHP_VF_1_REG_END                                  0x00693334
#define BCHP_SECAM_0_REG_START                             0x00693400
#define BCHP_SECAM_0_REG_END                               0x00693414
#define BCHP_SM_0_REG_START                                0x00693480
#define BCHP_SM_0_REG_END                                  0x006934ac
#define BCHP_SDSRC_0_REG_START                             0x00693500
#define BCHP_SDSRC_0_REG_END                               0x0069350c
#define BCHP_HDSRC_0_REG_START                             0x00693520
#define BCHP_HDSRC_0_REG_END                               0x0069353c
#define BCHP_CSC_0_REG_START                               0x00693580
#define BCHP_CSC_0_REG_END                                 0x006935b0
#define BCHP_CSC_1_REG_START                               0x00693600
#define BCHP_CSC_1_REG_END                                 0x00693630
#define BCHP_RM_0_REG_START                                0x00693680
#define BCHP_RM_0_REG_END                                  0x006936a4
#define BCHP_RM_1_REG_START                                0x006936c0
#define BCHP_RM_1_REG_END                                  0x006936e4
#define BCHP_ANA_DEBUG_0_REG_START                         0x00693700
#define BCHP_ANA_DEBUG_0_REG_END                           0x00693744
#define BCHP_DTRAM_0_REG_START                             0x00693800
#define BCHP_DTRAM_0_REG_END                               0x00693c7c
#define BCHP_DVI_DTG_0_REG_START                           0x00694000
#define BCHP_DVI_DTG_0_REG_END                             0x00694174
#define BCHP_DVI_DTG_RM_0_REG_START                        0x00694800
#define BCHP_DVI_DTG_RM_0_REG_END                          0x00694824
#define BCHP_DVI_CSC_0_REG_START                           0x00694900
#define BCHP_DVI_CSC_0_REG_END                             0x00694930
#define BCHP_DVI_DVF_0_REG_START                           0x00694a00
#define BCHP_DVI_DVF_0_REG_END                             0x00694a18
#define BCHP_DVI_DEBUG_0_REG_START                         0x00694b00
#define BCHP_DVI_DEBUG_0_REG_END                           0x00694b44
#define BCHP_ITU656_DTG_0_REG_START                        0x00695000
#define BCHP_ITU656_DTG_0_REG_END                          0x00695174
#define BCHP_ITU656_CSC_0_REG_START                        0x00695200
#define BCHP_ITU656_CSC_0_REG_END                          0x00695230
#define BCHP_ITU656_DVF_0_REG_START                        0x00695300
#define BCHP_ITU656_DVF_0_REG_END                          0x00695318
#define BCHP_ITU656_0_REG_START                            0x00695400
#define BCHP_ITU656_0_REG_END                              0x00695420
#define BCHP_ITU656_DTG_1_REG_START                        0x00695800
#define BCHP_ITU656_DTG_1_REG_END                          0x00695974
#define BCHP_ITU656_CSC_1_REG_START                        0x00695a00
#define BCHP_ITU656_CSC_1_REG_END                          0x00695a30
#define BCHP_ITU656_DVF_1_REG_START                        0x00695b00
#define BCHP_ITU656_DVF_1_REG_END                          0x00695b18
#define BCHP_ITU656_1_REG_START                            0x00695c00
#define BCHP_ITU656_1_REG_END                              0x00695c20
#define BCHP_VEC_CFG_REG_START                             0x00696000
#define BCHP_VEC_CFG_REG_END                               0x00696168
#define BCHP_VIDEO_ENC_INTR2_REG_START                     0x00696400
#define BCHP_VIDEO_ENC_INTR2_REG_END                       0x0069642c
#define BCHP_VIDEO_ENC_TPG_0_REG_START                     0x00696500
#define BCHP_VIDEO_ENC_TPG_0_REG_END                       0x00696518
#define BCHP_VIDEO_ENC_STG_0_REG_START                     0x00696600
#define BCHP_VIDEO_ENC_STG_0_REG_END                       0x00696640
#define BCHP_VIDEO_ENC_STG_1_REG_START                     0x00696700
#define BCHP_VIDEO_ENC_STG_1_REG_END                       0x00696740
#define BCHP_DSCL_0_REG_START                              0x00696c00
#define BCHP_DSCL_0_REG_END                                0x00696ffc
#define BCHP_VIDEO_ENC_DECIM_0_REG_START                   0x00697200
#define BCHP_VIDEO_ENC_DECIM_0_REG_END                     0x00697208
#define BCHP_DVP_TVG_0_REG_START                           0x00697300
#define BCHP_DVP_TVG_0_REG_END                             0x00697388
#define BCHP_VBI_ENC_REG_START                             0x00698000
#define BCHP_VBI_ENC_REG_END                               0x00698094
#define BCHP_CCE_0_REG_START                               0x00698400
#define BCHP_CCE_0_REG_END                                 0x00698458
#define BCHP_CCE_1_REG_START                               0x00698500
#define BCHP_CCE_1_REG_END                                 0x00698558
#define BCHP_WSE_0_REG_START                               0x00698600
#define BCHP_WSE_0_REG_END                                 0x00698614
#define BCHP_WSE_1_REG_START                               0x00698700
#define BCHP_WSE_1_REG_END                                 0x00698714
#define BCHP_CGMSAE_0_REG_START                            0x00698800
#define BCHP_CGMSAE_0_REG_END                              0x00698858
#define BCHP_CGMSAE_1_REG_START                            0x00698900
#define BCHP_CGMSAE_1_REG_END                              0x00698958
#define BCHP_TTE_0_REG_START                               0x00698a00
#define BCHP_TTE_0_REG_END                                 0x00698a28
#define BCHP_TTE_1_REG_START                               0x00698b00
#define BCHP_TTE_1_REG_END                                 0x00698b28
#define BCHP_GSE_0_REG_START                               0x00698c00
#define BCHP_GSE_0_REG_END                                 0x00698c80
#define BCHP_GSE_1_REG_START                               0x00698d00
#define BCHP_GSE_1_REG_END                                 0x00698d80
#define BCHP_AMOLE_0_REG_START                             0x00698e00
#define BCHP_AMOLE_0_REG_END                               0x00698e8c
#define BCHP_AMOLE_1_REG_START                             0x00698f00
#define BCHP_AMOLE_1_REG_END                               0x00698f8c
#define BCHP_CCE_ANCIL_0_REG_START                         0x00699000
#define BCHP_CCE_ANCIL_0_REG_END                           0x00699054
#define BCHP_CCE_ANCIL_1_REG_START                         0x00699100
#define BCHP_CCE_ANCIL_1_REG_END                           0x00699154
#define BCHP_WSE_ANCIL_0_REG_START                         0x00699200
#define BCHP_WSE_ANCIL_0_REG_END                           0x0069920c
#define BCHP_WSE_ANCIL_1_REG_START                         0x00699300
#define BCHP_WSE_ANCIL_1_REG_END                           0x0069930c
#define BCHP_TTE_ANCIL_0_REG_START                         0x00699400
#define BCHP_TTE_ANCIL_0_REG_END                           0x00699428
#define BCHP_TTE_ANCIL_1_REG_START                         0x00699500
#define BCHP_TTE_ANCIL_1_REG_END                           0x00699528
#define BCHP_GSE_ANCIL_0_REG_START                         0x00699600
#define BCHP_GSE_ANCIL_0_REG_END                           0x00699680
#define BCHP_GSE_ANCIL_1_REG_START                         0x00699700
#define BCHP_GSE_ANCIL_1_REG_END                           0x00699780
#define BCHP_AMOLE_ANCIL_0_REG_START                       0x00699800
#define BCHP_AMOLE_ANCIL_0_REG_END                         0x0069988c
#define BCHP_AMOLE_ANCIL_1_REG_START                       0x00699900
#define BCHP_AMOLE_ANCIL_1_REG_END                         0x0069998c
#define BCHP_ANCI656_ANCIL_0_REG_START                     0x00699a00
#define BCHP_ANCI656_ANCIL_0_REG_END                       0x00699a24
#define BCHP_ANCI656_ANCIL_1_REG_START                     0x00699b00
#define BCHP_ANCI656_ANCIL_1_REG_END                       0x00699b24
#define BCHP_DVP_HT_REG_START                              0x006a0000
#define BCHP_DVP_HT_REG_END                                0x006a010c
#define BCHP_HDMI_REG_START                                0x006a0800
#define BCHP_HDMI_REG_END                                  0x006a0994
#define BCHP_HDMI_TX_PHY_REG_START                         0x006a0a80
#define BCHP_HDMI_TX_PHY_REG_END                           0x006a0ad8
#define BCHP_HDMI_RM_REG_START                             0x006a0b00
#define BCHP_HDMI_RM_REG_END                               0x006a0b2c
#define BCHP_HDMI_TX_INTR2_REG_START                       0x006a0b40
#define BCHP_HDMI_TX_INTR2_REG_END                         0x006a0b6c
#define BCHP_HDMI_RAM_REG_START                            0x006a0c00
#define BCHP_HDMI_RAM_REG_END                              0x006a0dfc
#define BCHP_DVP_HR_REG_START                              0x006a6000
#define BCHP_DVP_HR_REG_END                                0x006a61bc
#define BCHP_DVP_HR_INTR2_REG_START                        0x006a61c0
#define BCHP_DVP_HR_INTR2_REG_END                          0x006a61ec
#define BCHP_DVP_HR_DVP_OTP_REG_START                      0x006a6200
#define BCHP_DVP_HR_DVP_OTP_REG_END                        0x006a6240
#define BCHP_DVP_HR_KEY_RAM_REG_START                      0x006a6300
#define BCHP_DVP_HR_KEY_RAM_REG_END                        0x006a6314
#define BCHP_HDMI_RX_FE_0_REG_START                        0x006a6400
#define BCHP_HDMI_RX_FE_0_REG_END                          0x006a65fc
#define BCHP_HDMI_RX_EQ_0_REG_START                        0x006a6600
#define BCHP_HDMI_RX_EQ_0_REG_END                          0x006a67f0
#define BCHP_HDMI_RX_0_REG_START                           0x006a8000
#define BCHP_HDMI_RX_0_REG_END                             0x006a887c
#define BCHP_HDMI_RX_INTR2_0_REG_START                     0x006a8880
#define BCHP_HDMI_RX_INTR2_0_REG_END                       0x006a88ac
#define BCHP_HD_DVI_0_REG_START                            0x006aa000
#define BCHP_HD_DVI_0_REG_END                              0x006aa1fc
#define BCHP_DVP_HR_TMR_REG_START                          0x006aacc0
#define BCHP_DVP_HR_TMR_REG_END                            0x006aacfc
#define BCHP_BVN_RGR_REG_START                             0x006ae000
#define BCHP_BVN_RGR_REG_END                               0x006ae010
#define BCHP_VICE2_CME_0_REG_START                         0x00700800
#define BCHP_VICE2_CME_0_REG_END                           0x0070089c
#define BCHP_VICE2_FME_0_REG_START                         0x00700c00
#define BCHP_VICE2_FME_0_REG_END                           0x00700c80
#define BCHP_VICE2_MC_0_REG_START                          0x00701000
#define BCHP_VICE2_MC_0_REG_END                            0x00701080
#define BCHP_VICE2_MAU_0_REG_START                         0x00701400
#define BCHP_VICE2_MAU_0_REG_END                           0x007014f4
#define BCHP_VICE2_IMD_0_REG_START                         0x00701800
#define BCHP_VICE2_IMD_0_REG_END                           0x0070187c
#define BCHP_VICE2_CABAC_0_REG_START                       0x00701c00
#define BCHP_VICE2_CABAC_0_REG_END                         0x00701cec
#define BCHP_VICE2_HA_0_REG_START                          0x00702000
#define BCHP_VICE2_HA_0_REG_END                            0x00702088
#define BCHP_VICE2_SG_0_REG_START                          0x00702400
#define BCHP_VICE2_SG_0_REG_END                            0x00702474
#define BCHP_VICE2_DBLK_0_REG_START                        0x00702800
#define BCHP_VICE2_DBLK_0_REG_END                          0x00702888
#define BCHP_VICE2_VIP_0_REG_START                         0x00703000
#define BCHP_VICE2_VIP_0_REG_END                           0x00703224
#define BCHP_VICE2_VIP1_0_REG_START                        0x00703800
#define BCHP_VICE2_VIP1_0_REG_END                          0x00703a24
#define BCHP_VICE2_XQ_0_REG_START                          0x00704000
#define BCHP_VICE2_XQ_0_REG_END                            0x00706198
#define BCHP_VICE2_ARCSS_ESS_CTRL_0_REG_START              0x00710000
#define BCHP_VICE2_ARCSS_ESS_CTRL_0_REG_END                0x007100a0
#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_REG_START        0x00710400
#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_0_REG_END          0x0071042c
#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_REG_START          0x00710600
#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_0_REG_END            0x0071062c
#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_REG_START            0x00712000
#define BCHP_VICE2_ARCSS_ESS_HOSTIF_0_REG_END              0x007133fc
#define BCHP_VICE2_ARCSS_ESS_DCCM_0_REG_START              0x00714000
#define BCHP_VICE2_ARCSS_ESS_DCCM_0_REG_END                0x00717ffc
#define BCHP_VICE2_ARCSS_ESS_ADI_0_REG_START               0x00718000
#define BCHP_VICE2_ARCSS_ESS_ADI_0_REG_END                 0x007182ac
#define BCHP_VICE2_ARCSS_ESS_CTRL_1_REG_START              0x00750000
#define BCHP_VICE2_ARCSS_ESS_CTRL_1_REG_END                0x007500a0
#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_REG_START        0x00750400
#define BCHP_VICE2_ARCSS_ESS_FLAG_INTR2_1_REG_END          0x0075042c
#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_REG_START          0x00750600
#define BCHP_VICE2_ARCSS_ESS_P1_INTR2_1_REG_END            0x0075062c
#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_REG_START            0x00752000
#define BCHP_VICE2_ARCSS_ESS_HOSTIF_1_REG_END              0x007533fc
#define BCHP_VICE2_ARCSS_ESS_DCCM_1_REG_START              0x00754000
#define BCHP_VICE2_ARCSS_ESS_DCCM_1_REG_END                0x00757ffc
#define BCHP_VICE2_ARCSS_ESS_ADI_1_REG_START               0x00758000
#define BCHP_VICE2_ARCSS_ESS_ADI_1_REG_END                 0x007582a4
#define BCHP_VICE2_RGR_REG_START                           0x00780000
#define BCHP_VICE2_RGR_REG_END                             0x0078000c
#define BCHP_VICE2_MISC_REG_START                          0x00781000
#define BCHP_VICE2_MISC_REG_END                            0x00781020
#define BCHP_VICE2_L2_REG_START                            0x00781100
#define BCHP_VICE2_L2_REG_END                              0x0078112c
#define BCHP_VICE2_ARCSS_MISC_REG_START                    0x00782000
#define BCHP_VICE2_ARCSS_MISC_REG_END                      0x00782030
#define BCHP_VICE2_SEC_CTRL_REG_START                      0x00800000
#define BCHP_VICE2_SEC_CTRL_REG_END                        0x00800080
#define BCHP_XPT_BUS_IF_REG_START                          0x00900000
#define BCHP_XPT_BUS_IF_REG_END                            0x00900078
#define BCHP_XPT_XMEMIF_REG_START                          0x00900100
#define BCHP_XPT_XMEMIF_REG_END                            0x009001a0
#define BCHP_XPT_PMU_REG_START                             0x00900200
#define BCHP_XPT_PMU_REG_END                               0x00900208
#define BCHP_XPT_GR_REG_START                              0x00900300
#define BCHP_XPT_GR_REG_END                                0x0090030c
#define BCHP_XPT_RMX0_IO_REG_START                         0x00900400
#define BCHP_XPT_RMX0_IO_REG_END                           0x00900420
#define BCHP_XPT_RMX1_IO_REG_START                         0x00900500
#define BCHP_XPT_RMX1_IO_REG_END                           0x00900520
#define BCHP_XPT_WAKEUP_REG_START                          0x00901000
#define BCHP_XPT_WAKEUP_REG_END                            0x00901fbc
#define BCHP_XPT_FE_REG_START                              0x00904000
#define BCHP_XPT_FE_REG_END                                0x009057fc
#define BCHP_XPT_DPCR0_REG_START                           0x00907000
#define BCHP_XPT_DPCR0_REG_END                             0x00907074
#define BCHP_XPT_DPCR1_REG_START                           0x00907080
#define BCHP_XPT_DPCR1_REG_END                             0x009070f4
#define BCHP_XPT_DPCR2_REG_START                           0x00907100
#define BCHP_XPT_DPCR2_REG_END                             0x00907174
#define BCHP_XPT_DPCR3_REG_START                           0x00907180
#define BCHP_XPT_DPCR3_REG_END                             0x009071f4
#define BCHP_XPT_DPCR4_REG_START                           0x00907200
#define BCHP_XPT_DPCR4_REG_END                             0x00907274
#define BCHP_XPT_DPCR5_REG_START                           0x00907280
#define BCHP_XPT_DPCR5_REG_END                             0x009072f4
#define BCHP_XPT_DPCR6_REG_START                           0x00907300
#define BCHP_XPT_DPCR6_REG_END                             0x00907374
#define BCHP_XPT_DPCR7_REG_START                           0x00907380
#define BCHP_XPT_DPCR7_REG_END                             0x009073f4
#define BCHP_XPT_DPCR_PP_REG_START                         0x00907400
#define BCHP_XPT_DPCR_PP_REG_END                           0x00907404
#define BCHP_XPT_PSUB_REG_START                            0x00907a00
#define BCHP_XPT_PSUB_REG_END                              0x00907ac8
#define BCHP_XPT_MPOD_REG_START                            0x00907c00
#define BCHP_XPT_MPOD_REG_END                              0x00907c20
#define BCHP_XPT_RMX0_REG_START                            0x00907d00
#define BCHP_XPT_RMX0_REG_END                              0x00907d08
#define BCHP_XPT_RMX1_REG_START                            0x00907e00
#define BCHP_XPT_RMX1_REG_END                              0x00907e08
#define BCHP_XPT_PB_TOP_REG_START                          0x00908000
#define BCHP_XPT_PB_TOP_REG_END                            0x00908084
#define BCHP_XPT_PB0_REG_START                             0x00908100
#define BCHP_XPT_PB0_REG_END                               0x00908174
#define BCHP_XPT_PB1_REG_START                             0x00908180
#define BCHP_XPT_PB1_REG_END                               0x009081f4
#define BCHP_XPT_PB2_REG_START                             0x00908200
#define BCHP_XPT_PB2_REG_END                               0x00908274
#define BCHP_XPT_PB3_REG_START                             0x00908280
#define BCHP_XPT_PB3_REG_END                               0x009082f4
#define BCHP_XPT_PB4_REG_START                             0x00908300
#define BCHP_XPT_PB4_REG_END                               0x00908374
#define BCHP_XPT_PB5_REG_START                             0x00908380
#define BCHP_XPT_PB5_REG_END                               0x009083f4
#define BCHP_XPT_PB6_REG_START                             0x00908400
#define BCHP_XPT_PB6_REG_END                               0x00908474
#define BCHP_XPT_PB7_REG_START                             0x00908480
#define BCHP_XPT_PB7_REG_END                               0x009084f4
#define BCHP_XPT_PB8_REG_START                             0x00908500
#define BCHP_XPT_PB8_REG_END                               0x00908574
#define BCHP_XPT_PB9_REG_START                             0x00908580
#define BCHP_XPT_PB9_REG_END                               0x009085f4
#define BCHP_XPT_PB10_REG_START                            0x00908600
#define BCHP_XPT_PB10_REG_END                              0x00908674
#define BCHP_XPT_PB11_REG_START                            0x00908680
#define BCHP_XPT_PB11_REG_END                              0x009086f4
#define BCHP_XPT_PB12_REG_START                            0x00908700
#define BCHP_XPT_PB12_REG_END                              0x00908774
#define BCHP_XPT_PB13_REG_START                            0x00908780
#define BCHP_XPT_PB13_REG_END                              0x009087f4
#define BCHP_XPT_PB14_REG_START                            0x00908800
#define BCHP_XPT_PB14_REG_END                              0x00908874
#define BCHP_XPT_PB15_REG_START                            0x00908880
#define BCHP_XPT_PB15_REG_END                              0x009088f4
#define BCHP_XPT_PCROFFSET_REG_START                       0x0090c000
#define BCHP_XPT_PCROFFSET_REG_END                         0x0090d8fc
#define BCHP_XPT_FULL_PID_PARSER_REG_START                 0x00910000
#define BCHP_XPT_FULL_PID_PARSER_REG_END                   0x00912050
#define BCHP_XPT_RSBUFF_REG_START                          0x00915000
#define BCHP_XPT_RSBUFF_REG_END                            0x00915b44
#define BCHP_XPT_XCBUFF_REG_START                          0x00916000
#define BCHP_XPT_XCBUFF_REG_END                            0x00917ccc
#define BCHP_XPT_MSG_REG_START                             0x00918000
#define BCHP_XPT_MSG_REG_END                               0x0091e014
#define BCHP_XPT_RAVE_REG_START                            0x00920000
#define BCHP_XPT_RAVE_REG_END                              0x0092c79c
#define BCHP_XPT_XPU_REG_START                             0x00930000
#define BCHP_XPT_XPU_REG_END                               0x009347fc
#define BCHP_XPT_SECURE_BUS_IF_REG_START                   0x0093f000
#define BCHP_XPT_SECURE_BUS_IF_REG_END                     0x0093f000
#define BCHP_DECODE_RBNODE_REGS_0_REG_START                0x00a00000
#define BCHP_DECODE_RBNODE_REGS_0_REG_END                  0x00a0007c
#define BCHP_DECODE_MAIN_0_REG_START                       0x00a00100
#define BCHP_DECODE_MAIN_0_REG_END                         0x00a001fc
#define BCHP_SDRAM_DEBUG_0_REG_START                       0x00a00200
#define BCHP_SDRAM_DEBUG_0_REG_END                         0x00a0027c
#define BCHP_DECODE_MCOM_0_REG_START                       0x00a00300
#define BCHP_DECODE_MCOM_0_REG_END                         0x00a0031c
#define BCHP_DECODE_SPRE_0_REG_START                       0x00a00320
#define BCHP_DECODE_SPRE_0_REG_END                         0x00a0033c
#define BCHP_DECODE_WPRD_0_REG_START                       0x00a00340
#define BCHP_DECODE_WPRD_0_REG_END                         0x00a0035c
#define BCHP_DECODE_DQNT_0_REG_START                       0x00a00400
#define BCHP_DECODE_DQNT_0_REG_END                         0x00a0045c
#define BCHP_DECODE_DQNT_8X8_0_REG_START                   0x00a00500
#define BCHP_DECODE_DQNT_8X8_0_REG_END                     0x00a0057c
#define BCHP_DECODE_VP8_XFRM_0_REG_START                   0x00a00600
#define BCHP_DECODE_VP8_XFRM_0_REG_END                     0x00a0060c
#define BCHP_DECODE_XFRM_0_REG_START                       0x00a00700
#define BCHP_DECODE_XFRM_0_REG_END                         0x00a0071c
#define BCHP_DECODE_DBLK_0_REG_START                       0x00a00720
#define BCHP_DECODE_DBLK_0_REG_END                         0x00a0073c
#define BCHP_DECODE_MB_0_REG_START                         0x00a00740
#define BCHP_DECODE_MB_0_REG_END                           0x00a0075c
#define BCHP_REG_CABAC2BINS_0_REG_START                    0x00a00b00
#define BCHP_REG_CABAC2BINS_0_REG_END                      0x00a00bfc
#define BCHP_DECODE_SINT_0_REG_START                       0x00a00c00
#define BCHP_DECODE_SINT_0_REG_END                         0x00a00dfc
#define BCHP_DECODE_RVC_0_REG_START                        0x00a00e00
#define BCHP_DECODE_RVC_0_REG_END                          0x00a00efc
#define BCHP_DECODE_CPUREGS_0_REG_START                    0x00a00f00
#define BCHP_DECODE_CPUREGS_0_REG_END                      0x00a00f7c
#define BCHP_DECODE_CPUREGS2_0_REG_START                   0x00a00f80
#define BCHP_DECODE_CPUREGS2_0_REG_END                     0x00a00ffc
#define BCHP_DECODE_CPUDMA_0_REG_START                     0x00a01800
#define BCHP_DECODE_CPUDMA_0_REG_END                       0x00a018fc
#define BCHP_DECODE_DMAMEM_0_REG_START                     0x00a01a00
#define BCHP_DECODE_DMAMEM_0_REG_END                       0x00a021fc
#define BCHP_REG_CABAC2BINS2_0_REG_START                   0x00a02400
#define BCHP_REG_CABAC2BINS2_0_REG_END                     0x00a027fc
#define BCHP_DECODE_WPTBL_0_REG_START                      0x00a03000
#define BCHP_DECODE_WPTBL_0_REG_END                        0x00a031fc
#define BCHP_DECODE_SINT_OLOOP_0_REG_START                 0x00a0cc00
#define BCHP_DECODE_SINT_OLOOP_0_REG_END                   0x00a0ccfc
#define BCHP_DECODE_SD_0_REG_START                         0x00a40800
#define BCHP_DECODE_SD_0_REG_END                           0x00a40ffc
#define BCHP_DECODE_IND_SDRAM_REGS_0_REG_START             0x00a41000
#define BCHP_DECODE_IND_SDRAM_REGS_0_REG_END               0x00a4107c
#define BCHP_DECODE_CPUCORE_0_REG_START                    0x00a44000
#define BCHP_DECODE_CPUCORE_0_REG_END                      0x00a44ffc
#define BCHP_DECODE_CPUAUX_0_REG_START                     0x00a45000
#define BCHP_DECODE_CPUAUX_0_REG_END                       0x00a45ffc
#define BCHP_DECODE_CPUIMEM_0_REG_START                    0x00a46000
#define BCHP_DECODE_CPUIMEM_0_REG_END                      0x00a47ffc
#define BCHP_DECODE_CPUDMEM_0_REG_START                    0x00a48000
#define BCHP_DECODE_CPUDMEM_0_REG_END                      0x00a4fffc
#define BCHP_DECODE_IND_SDRAM_REGS2_0_REG_START            0x00a51000
#define BCHP_DECODE_IND_SDRAM_REGS2_0_REG_END              0x00a5107c
#define BCHP_DECODE_CPUDMA2_0_REG_START                    0x00a51800
#define BCHP_DECODE_CPUDMA2_0_REG_END                      0x00a518fc
#define BCHP_DECODE_DMAMEM2_0_REG_START                    0x00a51a00
#define BCHP_DECODE_DMAMEM2_0_REG_END                      0x00a521fc
#define BCHP_DECODE_CPUCORE2_0_REG_START                   0x00a54000
#define BCHP_DECODE_CPUCORE2_0_REG_END                     0x00a54ffc
#define BCHP_DECODE_CPUAUX2_0_REG_START                    0x00a55000
#define BCHP_DECODE_CPUAUX2_0_REG_END                      0x00a55ffc
#define BCHP_DECODE_CPUIMEM2_0_REG_START                   0x00a56000
#define BCHP_DECODE_CPUIMEM2_0_REG_END                     0x00a57ffc
#define BCHP_DECODE_CPUDMEM2_0_REG_START                   0x00a58000
#define BCHP_DECODE_CPUDMEM2_0_REG_END                     0x00a5fffc
#define BCHP_DECODE_IP_SHIM_0_REG_START                    0x00a60000
#define BCHP_DECODE_IP_SHIM_0_REG_END                      0x00a60084
#define BCHP_AVD_CACHE_0_REG_START                         0x00a62000
#define BCHP_AVD_CACHE_0_REG_END                           0x00a6203c
#define BCHP_ILS_REGS_0_REG_START                          0x00a70000
#define BCHP_ILS_REGS_0_REG_END                            0x00a7007c
#define BCHP_ILS_SCALE_ADDR_0_REG_START                    0x00a70100
#define BCHP_ILS_SCALE_ADDR_0_REG_END                      0x00a7010c
#define BCHP_ILS_SPSCALE_FILL_0_REG_START                  0x00a70180
#define BCHP_ILS_SPSCALE_FILL_0_REG_END                    0x00a70180
#define BCHP_ILS_MVSCALE_0_REG_START                       0x00a70200
#define BCHP_ILS_MVSCALE_0_REG_END                         0x00a7038c
#define BCHP_SVD_INTR2_0_REG_START                         0x00a80000
#define BCHP_SVD_INTR2_0_REG_END                           0x00a8002c
#define BCHP_SVD_RGR_0_REG_START                           0x00a80400
#define BCHP_SVD_RGR_0_REG_END                             0x00a80410
#define BCHP_BLD_DECODE_RBNODE_REGS_0_REG_START            0x00b00000
#define BCHP_BLD_DECODE_RBNODE_REGS_0_REG_END              0x00b0007c
#define BCHP_BLD_DECODE_MAIN_0_REG_START                   0x00b00100
#define BCHP_BLD_DECODE_MAIN_0_REG_END                     0x00b001fc
#define BCHP_BLD_SDRAM_DEBUG_0_REG_START                   0x00b00200
#define BCHP_BLD_SDRAM_DEBUG_0_REG_END                     0x00b0027c
#define BCHP_BLD_DECODE_MCOM_0_REG_START                   0x00b00300
#define BCHP_BLD_DECODE_MCOM_0_REG_END                     0x00b0031c
#define BCHP_BLD_DECODE_SPRE_0_REG_START                   0x00b00320
#define BCHP_BLD_DECODE_SPRE_0_REG_END                     0x00b0033c
#define BCHP_BLD_DECODE_WPRD_0_REG_START                   0x00b00340
#define BCHP_BLD_DECODE_WPRD_0_REG_END                     0x00b0035c
#define BCHP_BLD_DECODE_DQNT_0_REG_START                   0x00b00400
#define BCHP_BLD_DECODE_DQNT_0_REG_END                     0x00b0045c
#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_START               0x00b00500
#define BCHP_BLD_DECODE_DQNT_8X8_0_REG_END                 0x00b0057c
#define BCHP_BLD_DECODE_VP8_XFRM_0_REG_START               0x00b00600
#define BCHP_BLD_DECODE_VP8_XFRM_0_REG_END                 0x00b0060c
#define BCHP_BLD_DECODE_XFRM_0_REG_START                   0x00b00700
#define BCHP_BLD_DECODE_XFRM_0_REG_END                     0x00b0071c
#define BCHP_BLD_DECODE_DBLK_0_REG_START                   0x00b00720
#define BCHP_BLD_DECODE_DBLK_0_REG_END                     0x00b0073c
#define BCHP_BLD_DECODE_MB_0_REG_START                     0x00b00740
#define BCHP_BLD_DECODE_MB_0_REG_END                       0x00b0075c
#define BCHP_BLD_REG_CABAC2BINS_0_REG_START                0x00b00b00
#define BCHP_BLD_REG_CABAC2BINS_0_REG_END                  0x00b00bfc
#define BCHP_BLD_DECODE_SINT_0_REG_START                   0x00b00c00
#define BCHP_BLD_DECODE_SINT_0_REG_END                     0x00b00dfc
#define BCHP_BLD_DECODE_RVC_0_REG_START                    0x00b00e00
#define BCHP_BLD_DECODE_RVC_0_REG_END                      0x00b00efc
#define BCHP_BLD_DECODE_CPUREGS_0_REG_START                0x00b00f00
#define BCHP_BLD_DECODE_CPUREGS_0_REG_END                  0x00b00f7c
#define BCHP_BLD_DECODE_CPUREGS2_0_REG_START               0x00b00f80
#define BCHP_BLD_DECODE_CPUREGS2_0_REG_END                 0x00b00ffc
#define BCHP_BLD_DECODE_CPUDMA_0_REG_START                 0x00b01800
#define BCHP_BLD_DECODE_CPUDMA_0_REG_END                   0x00b018fc
#define BCHP_BLD_DECODE_DMAMEM_0_REG_START                 0x00b01a00
#define BCHP_BLD_DECODE_DMAMEM_0_REG_END                   0x00b021fc
#define BCHP_BLD_REG_CABAC2BINS2_0_REG_START               0x00b02400
#define BCHP_BLD_REG_CABAC2BINS2_0_REG_END                 0x00b027fc
#define BCHP_BLD_DECODE_WPTBL_0_REG_START                  0x00b03000
#define BCHP_BLD_DECODE_WPTBL_0_REG_END                    0x00b031fc
#define BCHP_BLD_DECODE_SINT_OLOOP_0_REG_START             0x00b0cc00
#define BCHP_BLD_DECODE_SINT_OLOOP_0_REG_END               0x00b0ccfc
#define BCHP_BLD_DECODE_SD_0_REG_START                     0x00b40800
#define BCHP_BLD_DECODE_SD_0_REG_END                       0x00b40ffc
#define BCHP_BLD_DECODE_IND_SDRAM_REGS_0_REG_START         0x00b41000
#define BCHP_BLD_DECODE_IND_SDRAM_REGS_0_REG_END           0x00b4107c
#define BCHP_BLD_DECODE_CPUCORE_0_REG_START                0x00b44000
#define BCHP_BLD_DECODE_CPUCORE_0_REG_END                  0x00b44ffc
#define BCHP_BLD_DECODE_CPUAUX_0_REG_START                 0x00b45000
#define BCHP_BLD_DECODE_CPUAUX_0_REG_END                   0x00b45ffc
#define BCHP_BLD_DECODE_CPUIMEM_0_REG_START                0x00b46000
#define BCHP_BLD_DECODE_CPUIMEM_0_REG_END                  0x00b47ffc
#define BCHP_BLD_DECODE_CPUDMEM_0_REG_START                0x00b48000
#define BCHP_BLD_DECODE_CPUDMEM_0_REG_END                  0x00b4fffc
#define BCHP_BLD_DECODE_IND_SDRAM_REGS2_0_REG_START        0x00b51000
#define BCHP_BLD_DECODE_IND_SDRAM_REGS2_0_REG_END          0x00b5107c
#define BCHP_BLD_DECODE_CPUDMA2_0_REG_START                0x00b51800
#define BCHP_BLD_DECODE_CPUDMA2_0_REG_END                  0x00b518fc
#define BCHP_BLD_DECODE_DMAMEM2_0_REG_START                0x00b51a00
#define BCHP_BLD_DECODE_DMAMEM2_0_REG_END                  0x00b521fc
#define BCHP_BLD_DECODE_CPUCORE2_0_REG_START               0x00b54000
#define BCHP_BLD_DECODE_CPUCORE2_0_REG_END                 0x00b54ffc
#define BCHP_BLD_DECODE_CPUAUX2_0_REG_START                0x00b55000
#define BCHP_BLD_DECODE_CPUAUX2_0_REG_END                  0x00b55ffc
#define BCHP_BLD_DECODE_CPUIMEM2_0_REG_START               0x00b56000
#define BCHP_BLD_DECODE_CPUIMEM2_0_REG_END                 0x00b57ffc
#define BCHP_BLD_DECODE_CPUDMEM2_0_REG_START               0x00b58000
#define BCHP_BLD_DECODE_CPUDMEM2_0_REG_END                 0x00b5fffc
#define BCHP_BLD_DECODE_IP_SHIM_0_REG_START                0x00b60000
#define BCHP_BLD_DECODE_IP_SHIM_0_REG_END                  0x00b60084
#define BCHP_BLD_AVD_CACHE_0_REG_START                     0x00b62000
#define BCHP_BLD_AVD_CACHE_0_REG_END                       0x00b6203c
#define BCHP_VICH_0_REG_START                              0x00b70000
#define BCHP_VICH_0_REG_END                                0x00b7008b
#define BCHP_GENET_0_SYS_REG_START                         0x00b80000
#define BCHP_GENET_0_SYS_REG_END                           0x00b8000c
#define BCHP_GENET_0_GR_BRIDGE_REG_START                   0x00b80040
#define BCHP_GENET_0_GR_BRIDGE_REG_END                     0x00b8004c
#define BCHP_GENET_0_EXT_REG_START                         0x00b80080
#define BCHP_GENET_0_EXT_REG_END                           0x00b80098
#define BCHP_GENET_0_INTRL2_0_REG_START                    0x00b80200
#define BCHP_GENET_0_INTRL2_0_REG_END                      0x00b8022c
#define BCHP_GENET_0_INTRL2_1_REG_START                    0x00b80240
#define BCHP_GENET_0_INTRL2_1_REG_END                      0x00b8026c
#define BCHP_GENET_0_RBUF_REG_START                        0x00b80300
#define BCHP_GENET_0_RBUF_REG_END                          0x00b803b4
#define BCHP_GENET_0_TBUF_REG_START                        0x00b80600
#define BCHP_GENET_0_TBUF_REG_END                          0x00b80628
#define BCHP_GENET_0_UMAC_REG_START                        0x00b80800
#define BCHP_GENET_0_UMAC_REG_END                          0x00b80ed8
#define BCHP_GENET_0_HFB_REG_START                         0x00b88000
#define BCHP_GENET_0_HFB_REG_END                           0x00b8fc48
#define BCHP_GENET_0_RDMA_REG_START                        0x00b90000
#define BCHP_GENET_0_RDMA_REG_END                          0x00b90cd4
#define BCHP_GENET_0_TDMA_REG_START                        0x00b91000
#define BCHP_GENET_0_TDMA_REG_END                          0x00b91c84
#define BCHP_GENET_1_SYS_REG_START                         0x00ba0000
#define BCHP_GENET_1_SYS_REG_END                           0x00ba000c
#define BCHP_GENET_1_GR_BRIDGE_REG_START                   0x00ba0040
#define BCHP_GENET_1_GR_BRIDGE_REG_END                     0x00ba004c
#define BCHP_GENET_1_EXT_REG_START                         0x00ba0080
#define BCHP_GENET_1_EXT_REG_END                           0x00ba0098
#define BCHP_GENET_1_INTRL2_0_REG_START                    0x00ba0200
#define BCHP_GENET_1_INTRL2_0_REG_END                      0x00ba022c
#define BCHP_GENET_1_INTRL2_1_REG_START                    0x00ba0240
#define BCHP_GENET_1_INTRL2_1_REG_END                      0x00ba026c
#define BCHP_GENET_1_RBUF_REG_START                        0x00ba0300
#define BCHP_GENET_1_RBUF_REG_END                          0x00ba03b4
#define BCHP_GENET_1_TBUF_REG_START                        0x00ba0600
#define BCHP_GENET_1_TBUF_REG_END                          0x00ba0628
#define BCHP_GENET_1_UMAC_REG_START                        0x00ba0800
#define BCHP_GENET_1_UMAC_REG_END                          0x00ba0ed8
#define BCHP_GENET_1_HFB_REG_START                         0x00ba8000
#define BCHP_GENET_1_HFB_REG_END                           0x00bafc48
#define BCHP_GENET_1_RDMA_REG_START                        0x00bb0000
#define BCHP_GENET_1_RDMA_REG_END                          0x00bb0cd4
#define BCHP_GENET_1_TDMA_REG_START                        0x00bb1000
#define BCHP_GENET_1_TDMA_REG_END                          0x00bb1c84
#define BCHP_SID_REG_START                                 0x00bc0100
#define BCHP_SID_REG_END                                   0x00bc019c
#define BCHP_SID_RLE_REG_START                             0x00bc0300
#define BCHP_SID_RLE_REG_END                               0x00bc039c
#define BCHP_SID_DQ_REG_START                              0x00bc0400
#define BCHP_SID_DQ_REG_END                                0x00bc04bc
#define BCHP_SID_STRM_REG_START                            0x00bc0800
#define BCHP_SID_STRM_REG_END                              0x00bc087c
#define BCHP_SID_OUTPUT_REG_START                          0x00bc0c00
#define BCHP_SID_OUTPUT_REG_END                            0x00bc0c40
#define BCHP_SID_ARC_REG_START                             0x00bc0f00
#define BCHP_SID_ARC_REG_END                               0x00bc0f3c
#define BCHP_SID_ARCDMA_REG_START                          0x00bc1800
#define BCHP_SID_ARCDMA_REG_END                            0x00bc1840
#define BCHP_SID_DMARAM_REG_START                          0x00bc1a00
#define BCHP_SID_DMARAM_REG_END                            0x00bc1bfc
#define BCHP_SID_PEEK_BITS_REG_START                       0x00bc2b00
#define BCHP_SID_PEEK_BITS_REG_END                         0x00bc2b3c
#define BCHP_SID_EXTRACT_BITS_REG_START                    0x00bc2b40
#define BCHP_SID_EXTRACT_BITS_REG_END                      0x00bc2b7c
#define BCHP_SID_HUFF_SYMB_REG_START                       0x00bc3000
#define BCHP_SID_HUFF_SYMB_REG_END                         0x00bc37fc
#define BCHP_SID_HUFF_CODE_REG_START                       0x00bc3900
#define BCHP_SID_HUFF_CODE_REG_END                         0x00bc39fc
#define BCHP_SID_SYMB_REG_START                            0x00bc3a00
#define BCHP_SID_SYMB_REG_END                              0x00bc3a10
#define BCHP_SID_SYMB_JPEG_REG_START                       0x00bc3a80
#define BCHP_SID_SYMB_JPEG_REG_END                         0x00bc3a8c
#define BCHP_SID_BIGRAM_REG_START                          0x00bc8000
#define BCHP_SID_BIGRAM_REG_END                            0x00bcfffc
#define BCHP_SID_ARC_DBG_REG_START                         0x00bd1000
#define BCHP_SID_ARC_DBG_REG_END                           0x00bd1010
#define BCHP_SID_ARC_CORE_REG_START                        0x00bd5000
#define BCHP_SID_ARC_CORE_REG_END                          0x00bd5014
#define BCHP_M2MC_REG_START                                0x00be0000
#define BCHP_M2MC_REG_END                                  0x00be07fc
#define BCHP_GFX_L2_REG_START                              0x00be3000
#define BCHP_GFX_L2_REG_END                                0x00be302c
#define BCHP_GFX_GR_REG_START                              0x00be4000
#define BCHP_GFX_GR_REG_END                                0x00be400c
#define BCHP_SICH_REG_START                                0x00be8000
#define BCHP_SICH_REG_END                                  0x00be803c
#define BCHP_V3D_CTL_REG_START                             0x00bea000
#define BCHP_V3D_CTL_REG_END                               0x00bea040
#define BCHP_V3D_CLE_REG_START                             0x00bea100
#define BCHP_V3D_CLE_REG_END                               0x00bea138
#define BCHP_V3D_PTB_REG_START                             0x00bea300
#define BCHP_V3D_PTB_REG_END                               0x00bea310
#define BCHP_V3D_QPS_REG_START                             0x00bea400
#define BCHP_V3D_QPS_REG_END                               0x00bea43c
#define BCHP_V3D_VPM_REG_START                             0x00bea500
#define BCHP_V3D_VPM_REG_END                               0x00bea504
#define BCHP_V3D_PCTR_REG_START                            0x00bea600
#define BCHP_V3D_PCTR_REG_END                              0x00bea6fc
#define BCHP_V3D_TOP_GR_BRIDGE_REG_START                   0x00bea800
#define BCHP_V3D_TOP_GR_BRIDGE_REG_END                     0x00bea80c
#define BCHP_V3D_GCA_REG_START                             0x00beaa00
#define BCHP_V3D_GCA_REG_END                               0x00beaa54
#define BCHP_V3D_DBG_REG_START                             0x00beae00
#define BCHP_V3D_DBG_REG_END                               0x00beaf20
#define BCHP_RAAGA_DSP_RGR_REG_START                       0x00c00000
#define BCHP_RAAGA_DSP_RGR_REG_END                         0x00c00008
#define BCHP_RAAGA_DSP_MISC_REG_START                      0x00c20000
#define BCHP_RAAGA_DSP_MISC_REG_END                        0x00c2044c
#define BCHP_RAAGA_DSP_TIMERS_REG_START                    0x00c21000
#define BCHP_RAAGA_DSP_TIMERS_REG_END                      0x00c21058
#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_START             0x00c21080
#define BCHP_RAAGA_DSP_PERI_DBG_CTRL_REG_END               0x00c2109c
#define BCHP_RAAGA_DSP_PERI_SW_REG_START                   0x00c21100
#define BCHP_RAAGA_DSP_PERI_SW_REG_END                     0x00c21154
#define BCHP_RAAGA_DSP_DMA_REG_START                       0x00c21400
#define BCHP_RAAGA_DSP_DMA_REG_END                         0x00c21664
#define BCHP_RAAGA_DSP_ESR_SI_REG_START                    0x00c22000
#define BCHP_RAAGA_DSP_ESR_SI_REG_END                      0x00c22014
#define BCHP_RAAGA_DSP_INTH_REG_START                      0x00c22200
#define BCHP_RAAGA_DSP_INTH_REG_END                        0x00c2222c
#define BCHP_RAAGA_DSP_FW_INTH_REG_START                   0x00c22400
#define BCHP_RAAGA_DSP_FW_INTH_REG_END                     0x00c2242c
#define BCHP_RAAGA_DSP_FW_CFG_REG_START                    0x00c23000
#define BCHP_RAAGA_DSP_FW_CFG_REG_END                      0x00c2357c
#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_START             0x00c30000
#define BCHP_RAAGA_DSP_MEM_SUBSYSTEM_REG_END               0x00c3bffc
#define BCHP_AIO_MISC_REG_START                            0x00c80000
#define BCHP_AIO_MISC_REG_END                              0x00c80010
#define BCHP_AIO_INTH_REG_START                            0x00c80100
#define BCHP_AIO_INTH_REG_END                              0x00c8012c
#define BCHP_AIO_INTD0_REG_START                           0x00c80200
#define BCHP_AIO_INTD0_REG_END                             0x00c80214
#define BCHP_AUD_FMM_MISC_REG_START                        0x00c80400
#define BCHP_AUD_FMM_MISC_REG_END                          0x00c8050c
#define BCHP_AUD_FMM_BF_CTRL_REG_START                     0x00c90000
#define BCHP_AUD_FMM_BF_CTRL_REG_END                       0x00c90d3c
#define BCHP_AUD_FMM_BF_ESR0_H_REG_START                   0x00c91000
#define BCHP_AUD_FMM_BF_ESR0_H_REG_END                     0x00c91014
#define BCHP_AUD_FMM_BF_ESR1_H_REG_START                   0x00c91020
#define BCHP_AUD_FMM_BF_ESR1_H_REG_END                     0x00c91034
#define BCHP_AUD_FMM_BF_ESR2_H_REG_START                   0x00c91040
#define BCHP_AUD_FMM_BF_ESR2_H_REG_END                     0x00c91054
#define BCHP_AUD_FMM_BF_ESR0_D0_REG_START                  0x00c91100
#define BCHP_AUD_FMM_BF_ESR0_D0_REG_END                    0x00c91114
#define BCHP_AUD_FMM_BF_ESR1_D0_REG_START                  0x00c91120
#define BCHP_AUD_FMM_BF_ESR1_D0_REG_END                    0x00c91134
#define BCHP_AUD_FMM_BF_ESR2_D0_REG_START                  0x00c91140
#define BCHP_AUD_FMM_BF_ESR2_D0_REG_END                    0x00c91154
#define BCHP_AUD_FMM_SRC_CTRL0_REG_START                   0x00c92000
#define BCHP_AUD_FMM_SRC_CTRL0_REG_END                     0x00c92bfc
#define BCHP_AUD_FMM_SRC_ESR0_REG_START                    0x00c93000
#define BCHP_AUD_FMM_SRC_ESR0_REG_END                      0x00c93014
#define BCHP_AUD_FMM_DP_CTRL0_REG_START                    0x00c94000
#define BCHP_AUD_FMM_DP_CTRL0_REG_END                      0x00c9612c
#define BCHP_AUD_FMM_DP_ESR0_H0_REG_START                  0x00c97c00
#define BCHP_AUD_FMM_DP_ESR0_H0_REG_END                    0x00c97c14
#define BCHP_AUD_FMM_DP_ESR1_H0_REG_START                  0x00c97c40
#define BCHP_AUD_FMM_DP_ESR1_H0_REG_END                    0x00c97c54
#define BCHP_AUD_FMM_DP_ESR0_D00_REG_START                 0x00c97c80
#define BCHP_AUD_FMM_DP_ESR0_D00_REG_END                   0x00c97c94
#define BCHP_AUD_FMM_DP_ESR1_D00_REG_START                 0x00c97cc0
#define BCHP_AUD_FMM_DP_ESR1_D00_REG_END                   0x00c97cd4
#define BCHP_AUD_FMM_IOP_CTRL_REG_START                    0x00c98000
#define BCHP_AUD_FMM_IOP_CTRL_REG_END                      0x00c98148
#define BCHP_AUD_FMM_IOP_ESR_REG_START                     0x00c98400
#define BCHP_AUD_FMM_IOP_ESR_REG_END                       0x00c98414
#define BCHP_SPDIF_RCVR_CTRL_REG_START                     0x00c99000
#define BCHP_SPDIF_RCVR_CTRL_REG_END                       0x00c9907c
#define BCHP_SPDIF_RCVR_ESR_REG_START                      0x00c99400
#define BCHP_SPDIF_RCVR_ESR_REG_END                        0x00c99414
#define BCHP_HDMI_RCVR_CTRL_REG_START                      0x00c99800
#define BCHP_HDMI_RCVR_CTRL_REG_END                        0x00c9987c
#define BCHP_HDMI_RCVR_ESR_REG_START                       0x00c99c00
#define BCHP_HDMI_RCVR_ESR_REG_END                         0x00c99c14
#define BCHP_AUD_FMM_OP_CTRL_REG_START                     0x00c9a000
#define BCHP_AUD_FMM_OP_CTRL_REG_END                       0x00c9a1fc
#define BCHP_AUD_FMM_OP_ESR_REG_START                      0x00c9a400
#define BCHP_AUD_FMM_OP_ESR_REG_END                        0x00c9a414
#define BCHP_AUD_FMM_OP_MCLKGEN_REG_START                  0x00c9a500
#define BCHP_AUD_FMM_OP_MCLKGEN_REG_END                    0x00c9a564
#define BCHP_AUD_FMM_PLL0_REG_START                        0x00c9a800
#define BCHP_AUD_FMM_PLL0_REG_END                          0x00c9a834
#define BCHP_AUD_FMM_PLL1_REG_START                        0x00c9a900
#define BCHP_AUD_FMM_PLL1_REG_END                          0x00c9a934
#define BCHP_AUD_FMM_PLL2_REG_START                        0x00c9aa00
#define BCHP_AUD_FMM_PLL2_REG_END                          0x00c9aa34
#define BCHP_HIFIDAC_CTRL0_REG_START                       0x00c9b000
#define BCHP_HIFIDAC_CTRL0_REG_END                         0x00c9b1fc
#define BCHP_HIFIDAC_RM0_REG_START                         0x00c9b200
#define BCHP_HIFIDAC_RM0_REG_END                           0x00c9b224
#define BCHP_HIFIDAC_ESR0_REG_START                        0x00c9b300
#define BCHP_HIFIDAC_ESR0_REG_END                          0x00c9b314
#define BCHP_HIFIDAC_CTRL1_REG_START                       0x00c9b400
#define BCHP_HIFIDAC_CTRL1_REG_END                         0x00c9b5fc
#define BCHP_HIFIDAC_RM1_REG_START                         0x00c9b600
#define BCHP_HIFIDAC_RM1_REG_END                           0x00c9b624
#define BCHP_HIFIDAC_ESR1_REG_START                        0x00c9b700
#define BCHP_HIFIDAC_ESR1_REG_END                          0x00c9b714
#define BCHP_AUD_FMM_MS_CTRL_REG_START                     0x00c9c000
#define BCHP_AUD_FMM_MS_CTRL_REG_END                       0x00c9dbfc
#define BCHP_AUD_FMM_MS_ESR_REG_START                      0x00c9e000
#define BCHP_AUD_FMM_MS_ESR_REG_END                        0x00c9e014
#define BCHP_RAAGA_DSP_SEC0_REG_START                      0x00d00000
#define BCHP_RAAGA_DSP_SEC0_REG_END                        0x00d00000
#define BCHP_DATA_MEM_REG_START                            0x00e00000
#define BCHP_DATA_MEM_REG_END                              0x00e47ffc
#define BCHP_CNTL_MEM_REG_START                            0x00f20000
#define BCHP_CNTL_MEM_REG_END                              0x00f67ffc
#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_START                0x00fc0000
#define BCHP_DMA_AHB_ECL_CMD_SCH0_REG_END                  0x00fc0000
#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_START                0x00fc0010
#define BCHP_DMA_AHB_ECL_CMD_SCH1_REG_END                  0x00fc0010
#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_START                0x00fc0020
#define BCHP_DMA_AHB_ECL_CMD_SCH2_REG_END                  0x00fc0020
#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_START                0x00fc0030
#define BCHP_DMA_AHB_ECL_CMD_SCH3_REG_END                  0x00fc0030
#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_START                0x00fc0040
#define BCHP_DMA_AHB_ECL_CMD_SCH4_REG_END                  0x00fc0040
#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_START                0x00fc0050
#define BCHP_DMA_AHB_ECL_CMD_SCH5_REG_END                  0x00fc0050
#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_START                0x00fc0060
#define BCHP_DMA_AHB_ECL_CMD_SCH6_REG_END                  0x00fc0060
#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_START                0x00fc0070
#define BCHP_DMA_AHB_ECL_CMD_SCH7_REG_END                  0x00fc0070
#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_START                0x00fc0080
#define BCHP_DMA_AHB_ECL_CMD_SCH8_REG_END                  0x00fc0080
#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_START                0x00fc0090
#define BCHP_DMA_AHB_ECL_CMD_SCH9_REG_END                  0x00fc0090
#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_START               0x00fc00a0
#define BCHP_DMA_AHB_ECL_CMD_SCH10_REG_END                 0x00fc00a0
#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_START               0x00fc00b0
#define BCHP_DMA_AHB_ECL_CMD_SCH11_REG_END                 0x00fc00b0
#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_START               0x00fc00c0
#define BCHP_DMA_AHB_ECL_CMD_SCH12_REG_END                 0x00fc00c0
#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_START               0x00fc00d0
#define BCHP_DMA_AHB_ECL_CMD_SCH13_REG_END                 0x00fc00d0
#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_START               0x00fc00e0
#define BCHP_DMA_AHB_ECL_CMD_SCH14_REG_END                 0x00fc00e0
#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_START               0x00fc00f0
#define BCHP_DMA_AHB_ECL_CMD_SCH15_REG_END                 0x00fc00f0
#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_START               0x00fc0100
#define BCHP_DMA_AHB_ECL_CMD_SCH16_REG_END                 0x00fc0100
#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_START               0x00fc0110
#define BCHP_DMA_AHB_ECL_CMD_SCH17_REG_END                 0x00fc0110
#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_START               0x00fc0120
#define BCHP_DMA_AHB_ECL_CMD_SCH18_REG_END                 0x00fc0120
#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_START               0x00fc0130
#define BCHP_DMA_AHB_ECL_CMD_SCH19_REG_END                 0x00fc0130
#define BCHP_DMA_AHB_ECL_CMD_RX_REG_START                  0x00fc0800
#define BCHP_DMA_AHB_ECL_CMD_RX_REG_END                    0x00fc0800
#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_START                 0x00fc4000
#define BCHP_DMA_AHB_CMD_RX_SCH0_REG_END                   0x00fc4000
#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_START                 0x00fc4010
#define BCHP_DMA_AHB_CMD_RX_SCH1_REG_END                   0x00fc4010
#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_START                 0x00fc4020
#define BCHP_DMA_AHB_CMD_RX_SCH2_REG_END                   0x00fc4020
#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_START                 0x00fc4030
#define BCHP_DMA_AHB_CMD_RX_SCH3_REG_END                   0x00fc4030
#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_START                 0x00fc4040
#define BCHP_DMA_AHB_CMD_RX_SCH4_REG_END                   0x00fc4040
#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_START                 0x00fc4050
#define BCHP_DMA_AHB_CMD_RX_SCH5_REG_END                   0x00fc4050
#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_START                 0x00fc4060
#define BCHP_DMA_AHB_CMD_RX_SCH6_REG_END                   0x00fc4060
#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_START                 0x00fc4070
#define BCHP_DMA_AHB_CMD_RX_SCH7_REG_END                   0x00fc4070
#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_START                 0x00fc4080
#define BCHP_DMA_AHB_CMD_RX_SCH8_REG_END                   0x00fc4080
#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_START                 0x00fc4090
#define BCHP_DMA_AHB_CMD_RX_SCH9_REG_END                   0x00fc4090
#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_START                0x00fc40a0
#define BCHP_DMA_AHB_CMD_RX_SCH10_REG_END                  0x00fc40a0
#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_START                0x00fc40b0
#define BCHP_DMA_AHB_CMD_RX_SCH11_REG_END                  0x00fc40b0
#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_START                0x00fc40c0
#define BCHP_DMA_AHB_CMD_RX_SCH12_REG_END                  0x00fc40c0
#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_START                0x00fc40d0
#define BCHP_DMA_AHB_CMD_RX_SCH13_REG_END                  0x00fc40d0
#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_START                0x00fc40e0
#define BCHP_DMA_AHB_CMD_RX_SCH14_REG_END                  0x00fc40e0
#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_START                0x00fc40f0
#define BCHP_DMA_AHB_CMD_RX_SCH15_REG_END                  0x00fc40f0
#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_START                0x00fc4100
#define BCHP_DMA_AHB_CMD_RX_SCH16_REG_END                  0x00fc4100
#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_START                0x00fc4110
#define BCHP_DMA_AHB_CMD_RX_SCH17_REG_END                  0x00fc4110
#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_START                0x00fc4120
#define BCHP_DMA_AHB_CMD_RX_SCH18_REG_END                  0x00fc4120
#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_START                0x00fc4130
#define BCHP_DMA_AHB_CMD_RX_SCH19_REG_END                  0x00fc4130
#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_START               0x00fc4200
#define BCHP_DMA_AHB_CMD_RES0_SCH0_REG_END                 0x00fc4200
#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_START               0x00fc4210
#define BCHP_DMA_AHB_CMD_RES0_SCH1_REG_END                 0x00fc4210
#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_START               0x00fc4220
#define BCHP_DMA_AHB_CMD_RES0_SCH2_REG_END                 0x00fc4220
#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_START               0x00fc4230
#define BCHP_DMA_AHB_CMD_RES0_SCH3_REG_END                 0x00fc4230
#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_START               0x00fc4240
#define BCHP_DMA_AHB_CMD_RES0_SCH4_REG_END                 0x00fc4240
#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_START               0x00fc4250
#define BCHP_DMA_AHB_CMD_RES0_SCH5_REG_END                 0x00fc4250
#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_START               0x00fc4260
#define BCHP_DMA_AHB_CMD_RES0_SCH6_REG_END                 0x00fc4260
#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_START               0x00fc4270
#define BCHP_DMA_AHB_CMD_RES0_SCH7_REG_END                 0x00fc4270
#define BCHP_DMA_AHB_CMD_TX0_REG_START                     0x00fc4800
#define BCHP_DMA_AHB_CMD_TX0_REG_END                       0x00fc4800
#define BCHP_DMA_AHB_CMD_TX1_REG_START                     0x00fc4a00
#define BCHP_DMA_AHB_CMD_TX1_REG_END                       0x00fc4a00
#define BCHP_DMA_AHB_CMD_CONF0_REG_START                   0x00fc4c00
#define BCHP_DMA_AHB_CMD_CONF0_REG_END                     0x00fc4c00
#define BCHP_MAC_AHB_REG_START                             0x00fc5000
#define BCHP_MAC_AHB_REG_END                               0x00fc500c
#define BCHP_LLM_AHB_REG_START                             0x00fc8000
#define BCHP_LLM_AHB_REG_END                               0x00fc805c
#define BCHP_PHY_REG_START                                 0x00fe0000
#define BCHP_PHY_REG_END                                   0x00fe47fc
#define BCHP_ECL_REG_START                                 0x00fe8000
#define BCHP_ECL_REG_END                                   0x00fec924
#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_START         0x00fed000
#define BCHP_DMA_IO2MEM_CH_ECL_TX_Global_REG_END           0x00fed014
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_START      0x00fed040
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH0_REG_END        0x00fed06c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_START      0x00fed080
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH1_REG_END        0x00fed0ac
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_START      0x00fed0c0
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH2_REG_END        0x00fed0ec
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_START      0x00fed100
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH3_REG_END        0x00fed12c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_START      0x00fed140
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH4_REG_END        0x00fed16c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_START      0x00fed180
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH5_REG_END        0x00fed1ac
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_START      0x00fed1c0
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH6_REG_END        0x00fed1ec
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_START      0x00fed200
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH7_REG_END        0x00fed22c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_START      0x00fed240
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH8_REG_END        0x00fed26c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_START      0x00fed280
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH9_REG_END        0x00fed2ac
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_START     0x00fed2c0
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH10_REG_END       0x00fed2ec
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_START     0x00fed300
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH11_REG_END       0x00fed32c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_START     0x00fed340
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH12_REG_END       0x00fed36c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_START     0x00fed380
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH13_REG_END       0x00fed3ac
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_START     0x00fed3c0
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH14_REG_END       0x00fed3ec
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_START     0x00fed400
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH15_REG_END       0x00fed42c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_START     0x00fed440
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH16_REG_END       0x00fed46c
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_START     0x00fed480
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH17_REG_END       0x00fed4ac
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_START     0x00fed4c0
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH18_REG_END       0x00fed4ec
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_START     0x00fed500
#define BCHP_DMA_IO2MEM_SUBCH_ECL_TX_SUBCH19_REG_END       0x00fed52c
#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_START                0x00fed800
#define BCHP_DMA_MEM2IO_CH_ECL_RX_REG_END                  0x00fed828
#define BCHP_GMII_REG_START                                0x00fedc00
#define BCHP_GMII_REG_END                                  0x00fedc58
#define BCHP_MAC_APB_REG_START                             0x00ff0000
#define BCHP_MAC_APB_REG_END                               0x00ff14fc
#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_START         0x00ff4000
#define BCHP_DMA_IO2MEM_CH_MAC_RX_Global_REG_END           0x00ff4014
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_START      0x00ff4040
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH0_REG_END        0x00ff406c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_START      0x00ff4080
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH1_REG_END        0x00ff40ac
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_START      0x00ff40c0
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH2_REG_END        0x00ff40ec
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_START      0x00ff4100
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH3_REG_END        0x00ff412c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_START      0x00ff4140
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH4_REG_END        0x00ff416c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_START      0x00ff4180
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH5_REG_END        0x00ff41ac
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_START      0x00ff41c0
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH6_REG_END        0x00ff41ec
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_START      0x00ff4200
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH7_REG_END        0x00ff422c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_START      0x00ff4240
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH8_REG_END        0x00ff426c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_START      0x00ff4280
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH9_REG_END        0x00ff42ac
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_START     0x00ff42c0
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH10_REG_END       0x00ff42ec
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_START     0x00ff4300
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH11_REG_END       0x00ff432c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_START     0x00ff4340
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH12_REG_END       0x00ff436c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_START     0x00ff4380
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH13_REG_END       0x00ff43ac
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_START     0x00ff43c0
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH14_REG_END       0x00ff43ec
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_START     0x00ff4400
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH15_REG_END       0x00ff442c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_START     0x00ff4440
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH16_REG_END       0x00ff446c
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_START     0x00ff4480
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH17_REG_END       0x00ff44ac
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_START     0x00ff44c0
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH18_REG_END       0x00ff44ec
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_START     0x00ff4500
#define BCHP_DMA_IO2MEM_SUBCH_MAC_RX_SUBCH19_REG_END       0x00ff452c
#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_START           0x00ff4800
#define BCHP_DMA_IO2MEM_CH_PHY0_Global_REG_END             0x00ff4814
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_START        0x00ff4840
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH0_REG_END          0x00ff486c
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_START        0x00ff4880
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH1_REG_END          0x00ff48ac
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_START        0x00ff48c0
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH2_REG_END          0x00ff48ec
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_START        0x00ff4900
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH3_REG_END          0x00ff492c
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_START        0x00ff4940
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH4_REG_END          0x00ff496c
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_START        0x00ff4980
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH5_REG_END          0x00ff49ac
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_START        0x00ff49c0
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH6_REG_END          0x00ff49ec
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_START        0x00ff4a00
#define BCHP_DMA_IO2MEM_SUBCH_PHY0_SUBCH7_REG_END          0x00ff4a2c
#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_START               0x00ff6000
#define BCHP_DMA_MEM2IO_CH_MAC_TX0_REG_END                 0x00ff6028
#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_START               0x00ff6400
#define BCHP_DMA_MEM2IO_CH_MAC_TX1_REG_END                 0x00ff6428
#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_START           0x00ff6800
#define BCHP_DMA_MEM2IO_CH_PHY0_CONFIG_REG_END             0x00ff6828
#define BCHP_MOCA_INTC_L2_HI_REG_START                     0x00ff8000
#define BCHP_MOCA_INTC_L2_HI_REG_END                       0x00ff8584
#define BCHP_MOCA_INTC_L2_LO_REG_START                     0x00ff8800
#define BCHP_MOCA_INTC_L2_LO_REG_END                       0x00ff8d84
#define BCHP_LLM_APB_REG_START                             0x00ffc000
#define BCHP_LLM_APB_REG_END                               0x00ffd00c
#define BCHP_TRX_REG_START                                 0x00ffe000
#define BCHP_TRX_REG_END                                   0x00ffe0d0
#define BCHP_MOCA_TIMER_REG_START                          0x00ffe400
#define BCHP_MOCA_TIMER_REG_END                            0x00ffe4ec
#define BCHP_MOCA_GPIO_REG_START                           0x00ffe800
#define BCHP_MOCA_GPIO_REG_END                             0x00ffe818
#define BCHP_EXTRAS_REG_START                              0x00ffec00
#define BCHP_EXTRAS_REG_END                                0x00ffecec
#define BCHP_MOCA_HOSTM2M_REG_START                        0x00fffc00
#define BCHP_MOCA_HOSTM2M_REG_END                          0x00fffc0c
#define BCHP_MOCA_L2_REG_START                             0x00fffc40
#define BCHP_MOCA_L2_REG_END                               0x00fffc6c
#define BCHP_MOCA_GR_BRIDGE_REG_START                      0x00fffc80
#define BCHP_MOCA_GR_BRIDGE_REG_END                        0x00fffc8c
#define BCHP_MOCA_HOSTMISC_REG_START                       0x00fffd00
#define BCHP_MOCA_HOSTMISC_REG_END                         0x00fffd94


/***************************************************************************
 *AUD_FMM_MS_CTRL
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_01_MICRO_SEQUENCER_CONTROL - Process to initialize and enable microsequencer
 ***************************************************************************/
/* AUD_FMM_MS_CTRL :: ABSTRACT_01_MICRO_SEQUENCER_CONTROL :: NULL [31:00] */
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_MASK 0xffffffff
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_01_MICRO_SEQUENCER_CONTROL_NULL_SHIFT 0

/***************************************************************************
 *ABSTRACT_02_CHANNEL_STATUS - How to control channel status bits
 ***************************************************************************/
/* AUD_FMM_MS_CTRL :: ABSTRACT_02_CHANNEL_STATUS :: NULL [31:00] */
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_MASK  0xffffffff
#define BCHP_AUD_FMM_MS_CTRL_ABSTRACT_02_CHANNEL_STATUS_NULL_SHIFT 0

/***************************************************************************
 *AUD_FMM_OP_CTRL
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_01_MULTICHANNEL_MAI - Transmitting 6- and 8-channel MAI
 ***************************************************************************/
/* AUD_FMM_OP_CTRL :: ABSTRACT_01_MULTICHANNEL_MAI :: MORE_INFORMATION [31:00] */
#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_AUD_FMM_OP_CTRL_ABSTRACT_01_MULTICHANNEL_MAI_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *BVN_MVFD_MFD
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* BVN_MVFD_MFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff
#define BCHP_BVN_MVFD_MFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0

/***************************************************************************
 *BVN_MVFD_MFD1
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* BVN_MVFD_MFD1 :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_BVN_MVFD_MFD1_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff
#define BCHP_BVN_MVFD_MFD1_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0

/***************************************************************************
 *BVN_MVFD_VFD
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* BVN_MVFD_VFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK 0xffffffff
#define BCHP_BVN_MVFD_VFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT 0

/***************************************************************************
 *GFD
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* GFD :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK      0xffffffff
#define BCHP_GFD_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT     0

/***************************************************************************
 *GFD_1
 ***************************************************************************/
/***************************************************************************
 *DRAM_DATA_STRUCTURE - DRAM Data Structure
 ***************************************************************************/
/* GFD_1 :: DRAM_DATA_STRUCTURE :: DRAM_DATA_STRUCTURE [31:00] */
#define BCHP_GFD_1_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_MASK    0xffffffff
#define BCHP_GFD_1_DRAM_DATA_STRUCTURE_DRAM_DATA_STRUCTURE_SHIFT   0

/***************************************************************************
 *HIFIDAC_CTRL
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_01_COMING_OUT_OF_RESET - Process to come out of reset
 ***************************************************************************/
/* HIFIDAC_CTRL :: ABSTRACT_01_COMING_OUT_OF_RESET :: MORE_INFORMATION [31:00] */
#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_HIFIDAC_CTRL_ABSTRACT_01_COMING_OUT_OF_RESET_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *ABSTRACT_02_MUTE_USAGE - Mute usage
 ***************************************************************************/
/* HIFIDAC_CTRL :: ABSTRACT_02_MUTE_USAGE :: MORE_INFORMATION [31:00] */
#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_HIFIDAC_CTRL_ABSTRACT_02_MUTE_USAGE_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *ABSTRACT_03_SAMPLE_RATE_CHANGE - Process to effect a sample rate change
 ***************************************************************************/
/* HIFIDAC_CTRL :: ABSTRACT_03_SAMPLE_RATE_CHANGE :: MORE_INFORMATION [31:00] */
#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_HIFIDAC_CTRL_ABSTRACT_03_SAMPLE_RATE_CHANGE_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *M2MC
 ***************************************************************************/
/***************************************************************************
 *LIST_PACKET_ABSTRACT - Linked-List Packet Abstract
 ***************************************************************************/
/* M2MC :: LIST_PACKET_ABSTRACT :: PACKET_FORMAT [31:00] */
#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_MASK          0xffffffff
#define BCHP_M2MC_LIST_PACKET_ABSTRACT_PACKET_FORMAT_SHIFT         0

/***************************************************************************
 *LIST_PACKET_HEADER_0 - Linked-List Packet Header Word 0
 ***************************************************************************/
/* M2MC :: LIST_PACKET_HEADER_0 :: reserved0 [31:28] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_MASK              0xf0000000
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved0_SHIFT             28

/* M2MC :: LIST_PACKET_HEADER_0 :: NEXT_PKT_ADDR [27:05] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_MASK          0x0fffffe0
#define BCHP_M2MC_LIST_PACKET_HEADER_0_NEXT_PKT_ADDR_SHIFT         5

/* M2MC :: LIST_PACKET_HEADER_0 :: reserved1 [04:01] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_MASK              0x0000001e
#define BCHP_M2MC_LIST_PACKET_HEADER_0_reserved1_SHIFT             1

/* M2MC :: LIST_PACKET_HEADER_0 :: LAST_PKT_IND [00:00] */
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_MASK           0x00000001
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_SHIFT          0
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid   0
#define BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktInvalid 1

/***************************************************************************
 *LIST_PACKET_HEADER_1 - Linked-List Packet Header Word 1
 ***************************************************************************/
/* M2MC :: LIST_PACKET_HEADER_1 :: reserved0 [31:15] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_MASK              0xffff8000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_reserved0_SHIFT             15

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_FEEDER_GRP_CNTRL [14:14] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_MASK   0x00004000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_SHIFT  14
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_FEEDER_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_FEEDER_GRP_CNTRL [13:13] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_MASK   0x00002000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_SHIFT  13
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_FEEDER_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_FEEDER_GRP_CNTRL [12:12] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_MASK 0x00001000
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_SHIFT 12
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_FEEDER_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: BLIT_GRP_CNTRL [11:11] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_MASK         0x00000800
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_SHIFT        11
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_ENABLE   1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLIT_GRP_CNTRL_GRP_DISABLE  0

/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_PARAM_GRP_CNTRL [10:10] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_MASK  0x00000400
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_SHIFT 10
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_PARAM_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: BLEND_PARAM_GRP_CNTRL [09:09] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_MASK  0x00000200
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_SHIFT 9
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_BLEND_PARAM_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: ROP_GRP_CNTRL [08:08] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_MASK          0x00000100
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_SHIFT         8
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_ENABLE    1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_ROP_GRP_CNTRL_GRP_DISABLE   0

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_KEY_GRP_CNTRL [07:07] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_MASK 0x00000080
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_SHIFT 7
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_KEY_GRP_CNTRL [06:06] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_MASK 0x00000040
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_SHIFT 6
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_KEY_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: SCALE_COEF_GRP_CNTRL [05:05] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_MASK   0x00000020
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_SHIFT  5
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SCALE_COEF_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_COLOR_MATRIX_GRP_CNTRL [04:04] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000010
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_SHIFT 4
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_COLOR_MATRIX_GRP_CNTRL [03:03] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000008
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_SHIFT 3
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: OUTPUT_COLOR_MATRIX_GRP_CNTRL [02:02] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_MASK 0x00000004
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_SHIFT 2
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_OUTPUT_COLOR_MATRIX_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: SRC_CLUT_GRP_CNTRL [01:01] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_MASK     0x00000002
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_SHIFT    1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_SRC_CLUT_GRP_CNTRL_GRP_DISABLE 0

/* M2MC :: LIST_PACKET_HEADER_1 :: DST_CLUT_GRP_CNTRL [00:00] */
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_MASK     0x00000001
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_SHIFT    0
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_ENABLE 1
#define BCHP_M2MC_LIST_PACKET_HEADER_1_DST_CLUT_GRP_CNTRL_GRP_DISABLE 0

/***************************************************************************
 *LIST_PKT_00_SRC_FEEDER_N - Linked-List Packet Word N for group SRC_FEEDER
 ***************************************************************************/
/* M2MC :: LIST_PKT_00_SRC_FEEDER_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_MASK  0xffffffff
#define BCHP_M2MC_LIST_PKT_00_SRC_FEEDER_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_01_DST_FEEDER_N - Linked-List Packet Word N for group DST_FEEDER
 ***************************************************************************/
/* M2MC :: LIST_PKT_01_DST_FEEDER_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_MASK  0xffffffff
#define BCHP_M2MC_LIST_PKT_01_DST_FEEDER_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_02_OUTPUT_FEEDER_N - Linked-List Packet Word N for group OUTPUT_FEEDER
 ***************************************************************************/
/* M2MC :: LIST_PKT_02_OUTPUT_FEEDER_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_02_OUTPUT_FEEDER_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_03_BLIT_N - Linked-List Packet Word N for group BLIT
 ***************************************************************************/
/* M2MC :: LIST_PKT_03_BLIT_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_MASK        0xffffffff
#define BCHP_M2MC_LIST_PKT_03_BLIT_N_REGISTER_CONTENTS_SHIFT       0

/***************************************************************************
 *LIST_PKT_04_SCALE_PARAM_N - Linked-List Packet Word N for group SCALE_PARAM
 ***************************************************************************/
/* M2MC :: LIST_PKT_04_SCALE_PARAM_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_04_SCALE_PARAM_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_05_BLEND_PARAM_N - Linked-List Packet Word N for group BLEND_PARAM
 ***************************************************************************/
/* M2MC :: LIST_PKT_05_BLEND_PARAM_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_05_BLEND_PARAM_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_06_ROP_N - Linked-List Packet Word N for group ROP
 ***************************************************************************/
/* M2MC :: LIST_PKT_06_ROP_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_MASK         0xffffffff
#define BCHP_M2MC_LIST_PKT_06_ROP_N_REGISTER_CONTENTS_SHIFT        0

/***************************************************************************
 *LIST_PKT_07_SRC_COLOR_KEY_N - Linked-List Packet Word N for group SRC_COLOR_KEY
 ***************************************************************************/
/* M2MC :: LIST_PKT_07_SRC_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_07_SRC_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_08_DST_COLOR_KEY_N - Linked-List Packet Word N for group DST_COLOR_KEY
 ***************************************************************************/
/* M2MC :: LIST_PKT_08_DST_COLOR_KEY_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_08_DST_COLOR_KEY_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_09_SCALE_COEF_N - Linked-List Packet Word N for group SCALE_COEF
 ***************************************************************************/
/* M2MC :: LIST_PKT_09_SCALE_COEF_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_MASK  0xffffffff
#define BCHP_M2MC_LIST_PKT_09_SCALE_COEF_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_10_SRC_COLOR_MATRIX_N - Linked-List Packet Word N for group SRC_COLOR_MATRIX
 ***************************************************************************/
/* M2MC :: LIST_PKT_10_SRC_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_10_SRC_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_11_DST_COLOR_MATRIX_N - Linked-List Packet Word N for group DST_COLOR_MATRIX
 ***************************************************************************/
/* M2MC :: LIST_PKT_11_DST_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_11_DST_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_11_DST_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_12_OUTPUT_COLOR_MATRIX_N - Linked-List Packet Word N for group OUTPUT_COLOR_MATRIX
 ***************************************************************************/
/* M2MC :: LIST_PKT_12_OUTPUT_COLOR_MATRIX_N :: REGISTER_CONTENTS [31:00] */
#define BCHP_M2MC_LIST_PKT_12_OUTPUT_COLOR_MATRIX_N_REGISTER_CONTENTS_MASK 0xffffffff
#define BCHP_M2MC_LIST_PKT_12_OUTPUT_COLOR_MATRIX_N_REGISTER_CONTENTS_SHIFT 0

/***************************************************************************
 *LIST_PKT_13_SRC_CLUT - Linked-List Packet Word for group SRC_CLUT
 ***************************************************************************/
/* M2MC :: LIST_PKT_13_SRC_CLUT :: reserved0 [31:29] */
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_reserved0_MASK              0xe0000000
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_reserved0_SHIFT             29

/* M2MC :: LIST_PKT_13_SRC_CLUT :: REGISTER_CONTENTS [28:00] */
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_REGISTER_CONTENTS_MASK      0x1fffffff
#define BCHP_M2MC_LIST_PKT_13_SRC_CLUT_REGISTER_CONTENTS_SHIFT     0

/***************************************************************************
 *LIST_PKT_14_DST_CLUT - Linked-List Packet Word for group DST_CLUT
 ***************************************************************************/
/* M2MC :: LIST_PKT_14_DST_CLUT :: reserved0 [31:29] */
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_reserved0_MASK              0xe0000000
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_reserved0_SHIFT             29

/* M2MC :: LIST_PKT_14_DST_CLUT :: REGISTER_CONTENTS [28:00] */
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_REGISTER_CONTENTS_MASK      0x1fffffff
#define BCHP_M2MC_LIST_PKT_14_DST_CLUT_REGISTER_CONTENTS_SHIFT     0

/***************************************************************************
 *TYPE_CLUT_COLOR_DATA - color data for color look up table
 ***************************************************************************/
/* M2MC :: TYPE_CLUT_COLOR_DATA :: ALPHA [31:24] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_MASK                  0xff000000
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_ALPHA_SHIFT                 24

/* M2MC :: TYPE_CLUT_COLOR_DATA :: RED [23:16] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_MASK                    0x00ff0000
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_RED_SHIFT                   16

/* M2MC :: TYPE_CLUT_COLOR_DATA :: GREEN [15:08] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_MASK                  0x0000ff00
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_GREEN_SHIFT                 8

/* M2MC :: TYPE_CLUT_COLOR_DATA :: BLUE [07:00] */
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_MASK                   0x000000ff
#define BCHP_M2MC_TYPE_CLUT_COLOR_DATA_BLUE_SHIFT                  0

/***************************************************************************
 *MEM_DMA
 ***************************************************************************/
/***************************************************************************
 *DESC_WORD0 - MEM DMA Descriptor Word 0
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD0 :: READ_ADDR [31:00] */
#define BCHP_MEM_DMA_DESC_WORD0_READ_ADDR_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD0_READ_ADDR_SHIFT                    0

/***************************************************************************
 *DESC_WORD1 - MEM DMA Descriptor Word 1
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD1 :: WRITE_ADDR [31:00] */
#define BCHP_MEM_DMA_DESC_WORD1_WRITE_ADDR_MASK                    0xffffffff
#define BCHP_MEM_DMA_DESC_WORD1_WRITE_ADDR_SHIFT                   0

/***************************************************************************
 *DESC_WORD2 - MEM DMA Descriptor Word 2
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD2 :: INTR_ENABLE [31:31] */
#define BCHP_MEM_DMA_DESC_WORD2_INTR_ENABLE_MASK                   0x80000000
#define BCHP_MEM_DMA_DESC_WORD2_INTR_ENABLE_SHIFT                  31

/* MEM_DMA :: DESC_WORD2 :: LAST [30:30] */
#define BCHP_MEM_DMA_DESC_WORD2_LAST_MASK                          0x40000000
#define BCHP_MEM_DMA_DESC_WORD2_LAST_SHIFT                         30

/* MEM_DMA :: DESC_WORD2 :: AUTO_APPEND [29:29] */
#define BCHP_MEM_DMA_DESC_WORD2_AUTO_APPEND_MASK                   0x20000000
#define BCHP_MEM_DMA_DESC_WORD2_AUTO_APPEND_SHIFT                  29

/* MEM_DMA :: DESC_WORD2 :: reserved0 [28:25] */
#define BCHP_MEM_DMA_DESC_WORD2_reserved0_MASK                     0x1e000000
#define BCHP_MEM_DMA_DESC_WORD2_reserved0_SHIFT                    25

/* MEM_DMA :: DESC_WORD2 :: TRANSFER_SIZE [24:00] */
#define BCHP_MEM_DMA_DESC_WORD2_TRANSFER_SIZE_MASK                 0x01ffffff
#define BCHP_MEM_DMA_DESC_WORD2_TRANSFER_SIZE_SHIFT                0

/***************************************************************************
 *DESC_WORD3 - MEM DMA Descriptor Word 3
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD3 :: NEXT_DESC_ADDR [31:05] */
#define BCHP_MEM_DMA_DESC_WORD3_NEXT_DESC_ADDR_MASK                0xffffffe0
#define BCHP_MEM_DMA_DESC_WORD3_NEXT_DESC_ADDR_SHIFT               5

/* MEM_DMA :: DESC_WORD3 :: reserved0 [04:03] */
#define BCHP_MEM_DMA_DESC_WORD3_reserved0_MASK                     0x00000018
#define BCHP_MEM_DMA_DESC_WORD3_reserved0_SHIFT                    3

/* MEM_DMA :: DESC_WORD3 :: READ_ENDIAN_MODE [02:02] */
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_MASK              0x00000004
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_SHIFT             2
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_BIG_ENDIAN        0
#define BCHP_MEM_DMA_DESC_WORD3_READ_ENDIAN_MODE_LITTLE_ENDIAN     1

/* MEM_DMA :: DESC_WORD3 :: WRITE_ENDIAN_XLATE_MODE [01:00] */
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_MASK       0x00000003
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_SHIFT      0
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_WORD_ALIGNED 0
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_HALF_WORD_ALIGNED 1
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_BYTE_ALIGNED 2
#define BCHP_MEM_DMA_DESC_WORD3_WRITE_ENDIAN_XLATE_MODE_reserved   3

/***************************************************************************
 *DESC_WORD4 - MEM DMA Descriptor Word 4
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD4 :: reserved0 [31:16] */
#define BCHP_MEM_DMA_DESC_WORD4_reserved0_MASK                     0xffff0000
#define BCHP_MEM_DMA_DESC_WORD4_reserved0_SHIFT                    16

/* MEM_DMA :: DESC_WORD4 :: SCRAM_CTRL_RSV [15:14] */
#define BCHP_MEM_DMA_DESC_WORD4_SCRAM_CTRL_RSV_MASK                0x0000c000
#define BCHP_MEM_DMA_DESC_WORD4_SCRAM_CTRL_RSV_SHIFT               14

/* MEM_DMA :: DESC_WORD4 :: SG_SCRAM_END [13:13] */
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_END_MASK                  0x00002000
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_END_SHIFT                 13

/* MEM_DMA :: DESC_WORD4 :: SG_SCRAM_START [12:12] */
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_START_MASK                0x00001000
#define BCHP_MEM_DMA_DESC_WORD4_SG_SCRAM_START_SHIFT               12

/* MEM_DMA :: DESC_WORD4 :: SG_ENABLE [11:11] */
#define BCHP_MEM_DMA_DESC_WORD4_SG_ENABLE_MASK                     0x00000800
#define BCHP_MEM_DMA_DESC_WORD4_SG_ENABLE_SHIFT                    11

/* MEM_DMA :: DESC_WORD4 :: ENC_DEC_INIT [10:10] */
#define BCHP_MEM_DMA_DESC_WORD4_ENC_DEC_INIT_MASK                  0x00000400
#define BCHP_MEM_DMA_DESC_WORD4_ENC_DEC_INIT_SHIFT                 10

/* MEM_DMA :: DESC_WORD4 :: MODE_SEL [09:08] */
#define BCHP_MEM_DMA_DESC_WORD4_MODE_SEL_MASK                      0x00000300
#define BCHP_MEM_DMA_DESC_WORD4_MODE_SEL_SHIFT                     8

/* MEM_DMA :: DESC_WORD4 :: KEY_SELECT [07:00] */
#define BCHP_MEM_DMA_DESC_WORD4_KEY_SELECT_MASK                    0x000000ff
#define BCHP_MEM_DMA_DESC_WORD4_KEY_SELECT_SHIFT                   0

/***************************************************************************
 *DESC_WORD5 - MEM DMA Descriptor Word 5
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD5 :: reserved0 [31:00] */
#define BCHP_MEM_DMA_DESC_WORD5_reserved0_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD5_reserved0_SHIFT                    0

/***************************************************************************
 *DESC_WORD6 - MEM DMA Descriptor Word 6
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD6 :: reserved0 [31:00] */
#define BCHP_MEM_DMA_DESC_WORD6_reserved0_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD6_reserved0_SHIFT                    0

/***************************************************************************
 *DESC_WORD7 - MEM DMA Descriptor Word 7
 ***************************************************************************/
/* MEM_DMA :: DESC_WORD7 :: reserved0 [31:00] */
#define BCHP_MEM_DMA_DESC_WORD7_reserved0_MASK                     0xffffffff
#define BCHP_MEM_DMA_DESC_WORD7_reserved0_SHIFT                    0

/***************************************************************************
 *PCIE_DMA
 ***************************************************************************/
/***************************************************************************
 *DESC_WORD0 - PCIE DMA Descriptor Word 0
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD0 :: MEMORY_ADDRESS [31:02] */
#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_MASK               0xfffffffc
#define BCHP_PCIE_DMA_DESC_WORD0_MEMORY_ADDRESS_SHIFT              2

/* PCIE_DMA :: DESC_WORD0 :: reserved0 [01:00] */
#define BCHP_PCIE_DMA_DESC_WORD0_reserved0_MASK                    0x00000003
#define BCHP_PCIE_DMA_DESC_WORD0_reserved0_SHIFT                   0

/***************************************************************************
 *DESC_WORD1 - PCIE DMA Descriptor Word 1
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD1 :: PCIE_ADDRESS_LO [31:02] */
#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_MASK              0xfffffffc
#define BCHP_PCIE_DMA_DESC_WORD1_PCIE_ADDRESS_LO_SHIFT             2

/* PCIE_DMA :: DESC_WORD1 :: reserved0 [01:00] */
#define BCHP_PCIE_DMA_DESC_WORD1_reserved0_MASK                    0x00000003
#define BCHP_PCIE_DMA_DESC_WORD1_reserved0_SHIFT                   0

/***************************************************************************
 *DESC_WORD2 - PCIE DMA Descriptor Word 2
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD2 :: PCIE_ADDRESS_HI [31:00] */
#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_MASK              0xffffffff
#define BCHP_PCIE_DMA_DESC_WORD2_PCIE_ADDRESS_HI_SHIFT             0

/***************************************************************************
 *DESC_WORD3 - PCIE DMA Descriptor Word 3
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD3 :: INTERRUPT_ENABLE [31:31] */
#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_MASK             0x80000000
#define BCHP_PCIE_DMA_DESC_WORD3_INTERRUPT_ENABLE_SHIFT            31

/* PCIE_DMA :: DESC_WORD3 :: reserved0 [30:25] */
#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_MASK                    0x7e000000
#define BCHP_PCIE_DMA_DESC_WORD3_reserved0_SHIFT                   25

/* PCIE_DMA :: DESC_WORD3 :: DMA_TRANSFER_SIZE [24:02] */
#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_MASK            0x01fffffc
#define BCHP_PCIE_DMA_DESC_WORD3_DMA_TRANSFER_SIZE_SHIFT           2

/* PCIE_DMA :: DESC_WORD3 :: reserved1 [01:00] */
#define BCHP_PCIE_DMA_DESC_WORD3_reserved1_MASK                    0x00000003
#define BCHP_PCIE_DMA_DESC_WORD3_reserved1_SHIFT                   0

/***************************************************************************
 *DESC_WORD4 - PCIE DMA Descriptor Word 4
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD4 :: LAST_RECORD_INDICATOR [31:31] */
#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_MASK        0x80000000
#define BCHP_PCIE_DMA_DESC_WORD4_LAST_RECORD_INDICATOR_SHIFT       31

/* PCIE_DMA :: DESC_WORD4 :: DMA_DIRECTION [30:30] */
#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MASK                0x40000000
#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_SHIFT               30
#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_PCIE_TO_MEMORY      1
#define BCHP_PCIE_DMA_DESC_WORD4_DMA_DIRECTION_MEMORY_TO_PCIE      0

/* PCIE_DMA :: DESC_WORD4 :: reserved0 [29:03] */
#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_MASK                    0x3ffffff8
#define BCHP_PCIE_DMA_DESC_WORD4_reserved0_SHIFT                   3

/* PCIE_DMA :: DESC_WORD4 :: DESC_CONTIGUOUS [02:02] */
#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_MASK              0x00000004
#define BCHP_PCIE_DMA_DESC_WORD4_DESC_CONTIGUOUS_SHIFT             2

/* PCIE_DMA :: DESC_WORD4 :: ENDIAN_XLATE_MODE [01:00] */
#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_MASK            0x00000003
#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SHIFT           0
#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_NO_SWAP         0
#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_16_IN_32   1
#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_SWAP_32         2
#define BCHP_PCIE_DMA_DESC_WORD4_ENDIAN_XLATE_MODE_reserved        3

/***************************************************************************
 *DESC_WORD5 - PCIE DMA Descriptor Word 5
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD5 :: NEXT_DESC_ADDRESS_LO [31:05] */
#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_MASK         0xffffffe0
#define BCHP_PCIE_DMA_DESC_WORD5_NEXT_DESC_ADDRESS_LO_SHIFT        5

/* PCIE_DMA :: DESC_WORD5 :: reserved0 [04:00] */
#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_MASK                    0x0000001f
#define BCHP_PCIE_DMA_DESC_WORD5_reserved0_SHIFT                   0

/***************************************************************************
 *DESC_WORD6 - PCIE DMA Descriptor Word 6
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD6 :: NEXT_DESC_ADDRESS_HI [31:00] */
#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_MASK         0xffffffff
#define BCHP_PCIE_DMA_DESC_WORD6_NEXT_DESC_ADDRESS_HI_SHIFT        0

/***************************************************************************
 *DESC_WORD7 - PCIE DMA Descriptor Word 7
 ***************************************************************************/
/* PCIE_DMA :: DESC_WORD7 :: reserved0 [31:00] */
#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_MASK                    0xffffffff
#define BCHP_PCIE_DMA_DESC_WORD7_reserved0_SHIFT                   0

/***************************************************************************
 *RAAGA_REGSET_DSP_CFG
 ***************************************************************************/
/***************************************************************************
 *AAC_UPS_WORD_00 - AAC User Parameters Structure Word 0 - XPT_FORMAT
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_00 :: XPT_FORMAT [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_MASK  0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_00_XPT_FORMAT_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_01 - AAC User Parameters Structure Word 1 - DRC_GAIN_CONTROL_COMPRESS
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_01 :: DRC_GAIN_CONTROL_COMPRESS [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_01_DRC_GAIN_CONTROL_COMPRESS_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_02 - AAC User Parameters Structure Word 2 - DRC_GAIN_CONTROL_BOOST
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_02 :: DRC_GAIN_CONTROL_BOOST [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_02_DRC_GAIN_CONTROL_BOOST_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_03 - AAC User Parameters Structure Word 3 - DRC_TARGET_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_03 :: DRC_TARGET_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_03_DRC_TARGET_LEVEL_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_04 - AAC User Parameters Structure Word 4 - DOWNMIX_TYPE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_04 :: DOWNMIX_TYPE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_04_DOWNMIX_TYPE_SHIFT 0

/***************************************************************************
 *AAC_UPS_WORD_05 - AAC User Parameters Structure Word 5 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_05 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_MASK     0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_SHIFT    0
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Stereo   2
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_05_OUTMODE_Mono     1

/***************************************************************************
 *AAC_UPS_WORD_06 - AAC User Parameters Structure Word 6 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AAC_UPS_WORD_06 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_MASK    0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Left_mono 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Right_mono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_stereo 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AAC_UPS_WORD_06_DUALMODE_Dual_mixmono 3

/***************************************************************************
 *AC3_PLUS_UPS_WORD_00 - AC3 Plus User Parameters Structure Word 0 - COMPMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_00 :: COMPMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_00_COMPMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_01 - AC3 Plus User Parameters Structure Word 1 - PCMSCALE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_01 :: PCMSCALE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_01_PCMSCALE_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_02 - AC3 Plus User Parameters Structure Word 2 - DYNSCALEHIGH
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_02 :: DYNSCALEHIGH [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_02_DYNSCALEHIGH_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_03 - AC3 Plus User Parameters Structure Word 3 - DYNSCALELOW
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_03 :: DYNSCALELOW [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_03_DYNSCALELOW_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_04 - AC3 Plus User Parameters Structure Word 4 - OUTLFE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_04 :: OUTLFE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_04_OUTLFE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_05 - AC3 Plus User Parameters Structure Word 5 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_05 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_05_OUTMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_06 - AC3 Plus User Parameters Structure Word 6 - STEREOMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_06 :: STEREOMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_06_STEREOMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_07 - AC3 Plus User Parameters Structure Word 7 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_07 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_07_DUALMODE_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_08 - AC3 Plus User Parameters Structure Word 8 - KMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_08 :: KMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_MASK  0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_NO_VOCALS 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL1 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_VOCAL2 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_08_KMODE_GBL_BOTH_VOCALS 3

/***************************************************************************
 *AC3_PLUS_UPS_WORD_09 - AC3 Plus User Parameters Structure Word 9 - EXTDNMIX_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_09 :: EXTDNMIX_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_09_EXTDNMIX_ENABLED_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_10_TO_45 - AC3 Plus User Parameters Structure Word 10 to 45 - EXTDNMIXTAB
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_10_TO_45 :: EXTDNMIXTAB [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_10_TO_45_EXTDNMIXTAB_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_46 - AC3 Plus User Parameters Structure Word 46 - EXTKARAOKE_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_46 :: EXTKARAOKE_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_46_EXTKARAOKE_ENABLED_SHIFT 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_47 - AC3 Plus User Parameters Structure Word 47 - EXT_V1_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_47 :: EXT_V1_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_47_EXT_V1_LEVEL_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_48 - AC3 Plus User Parameters Structure Word 48 - EXT_V1_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_48 :: EXT_V1_PAN [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_left 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_48_EXT_V1_PAN_Hard_right -2147483648

/***************************************************************************
 *AC3_PLUS_UPS_WORD_49 - AC3 Plus User Parameters Structure Word 49 - EXT_V2_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_49 :: EXT_V2_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_49_EXT_V2_LEVEL_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_50 - AC3 Plus User Parameters Structure Word 50 - EXT_V2_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_50 :: EXT_V2_PAN [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_left 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_50_EXT_V2_PAN_Hard_right -2147483648

/***************************************************************************
 *AC3_PLUS_UPS_WORD_51 - AC3 Plus User Parameters Structure Word 51 - EXT_GM_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_51 :: EXT_GM_LEVEL [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_51_EXT_GM_LEVEL_Mute 0

/***************************************************************************
 *AC3_PLUS_UPS_WORD_52 - AC3 Plus User Parameters Structure Word 52 - EXT_GM_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_PLUS_UPS_WORD_52 :: EXT_GM_PAN [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_left 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_PLUS_UPS_WORD_52_EXT_GM_PAN_Hard_right -2147483648

/***************************************************************************
 *AC3_UPS_WORD_00 - AC3 User Parameters Structure Word 0 - DYNRNGSCALEHI
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_00 :: DYNRNGSCALEHI [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_No_compression 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_00_DYNRNGSCALEHI_Full_compression 32767

/***************************************************************************
 *AC3_UPS_WORD_01 - AC3 User Parameters Structure Word 1 - DYNRNGSCALELOW
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_01 :: DYNRNGSCALELOW [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_No_compression 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_01_DYNRNGSCALELOW_Full_compression 32767

/***************************************************************************
 *AC3_UPS_WORD_02 - AC3 User Parameters Structure Word 2 - PCMSCALEFAC
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_02 :: PCMSCALEFAC [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_02_PCMSCALEFAC_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_03 - AC3 User Parameters Structure Word 3 - COMPMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_03 :: COMPMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_MASK    0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_a 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_custom_d 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_line 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_03_COMPMODE_Comp_rf 3

/***************************************************************************
 *AC3_UPS_WORD_04 - AC3 User Parameters Structure Word 4 - DUALMONOMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_04 :: DUALMONOMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Pass_through 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Left_mono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_Right_mono 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_04_DUALMONOMODE_True_mono 3

/***************************************************************************
 *AC3_UPS_WORD_05 - AC3 User Parameters Structure Word 5 - OUTPUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_05 :: OUTPUTMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_MASK  0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode11 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode10 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode20 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode30 3
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode21 4
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode31 5
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode22 6
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_05_OUTPUTMODE_Mode32 7

/***************************************************************************
 *AC3_UPS_WORD_06 - AC3 User Parameters Structure Word 6 - OUTLFEON
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_06 :: OUTLFEON [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_MASK    0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_Off     0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_06_OUTLFEON_On      1

/***************************************************************************
 *AC3_UPS_WORD_07 - AC3 User Parameters Structure Word 7 - KCAPABLEMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_07 :: KCAPABLEMODE [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_No_vocal_channels 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V1 1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Vocal_channel_V2 2
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_07_KCAPABLEMODE_Both_vocal_channels 3

/***************************************************************************
 *AC3_UPS_WORD_08 - AC3 User Parameters Structure Word 8 - KARAOKE_PARAMETER_FLAG
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_08 :: KARAOKE_PARAMETER_FLAG [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_Off 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_08_KARAOKE_PARAMETER_FLAG_On 1

/***************************************************************************
 *AC3_UPS_WORD_09 - AC3 User Parameters Structure Word 9 - KARAOKE_V1_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_09 :: KARAOKE_V1_LEVEL [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_09_KARAOKE_V1_LEVEL_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_10 - AC3 User Parameters Structure Word 10 - KARAOKE_V1_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_10 :: KARAOKE_V1_PAN [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_left 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_10_KARAOKE_V1_PAN_Hard_right 32768

/***************************************************************************
 *AC3_UPS_WORD_11 - AC3 User Parameters Structure Word 11 - KARAOKE_V2_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_11 :: KARAOKE_V2_LEVEL [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_11_KARAOKE_V2_LEVEL_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_12 - AC3 User Parameters Structure Word 12 - KARAOKE_V2_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_12 :: KARAOKE_V2_PAN [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_left 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_12_KARAOKE_V2_PAN_Hard_right 32768

/***************************************************************************
 *AC3_UPS_WORD_13 - AC3 User Parameters Structure Word 13 - KARAOKE_GM_LEVEL
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_13 :: KARAOKE_GM_LEVEL [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_13_KARAOKE_GM_LEVEL_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_14 - AC3 User Parameters Structure Word 14 - KARAOKE_GM_PAN
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_14 :: KARAOKE_GM_PAN [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_left 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Middle 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_14_KARAOKE_GM_PAN_Hard_right 32768

/***************************************************************************
 *AC3_UPS_WORD_15 - AC3 User Parameters Structure Word 15 - STEREO_MOD
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_15 :: STEREO_MOD [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_MASK  0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_Auto  0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LtRt  1
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_15_STEREO_MOD_LoRo  2

/***************************************************************************
 *AC3_UPS_WORD_16 - AC3 User Parameters Structure Word 16 - USER_DOWNMIX_FLAG
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_16 :: USER_DOWNMIX_FLAG [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_Off 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_16_USER_DOWNMIX_FLAG_On 1

/***************************************************************************
 *AC3_UPS_WORD_17_TO_52 - AC3 User Parameters Structure Word 17 to 52 - DRAM_USER_DEFINED_DNMX_COEFFS
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_17_TO_52 :: DRAM_USER_DEFINED_DNMX_COEFFS [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_MASK 0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Full_scale 32767
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_17_TO_52_DRAM_USER_DEFINED_DNMX_COEFFS_Mute 0

/***************************************************************************
 *AC3_UPS_WORD_53 - AC3 User Parameters Structure Word 53 - DUMMY
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: AC3_UPS_WORD_53 :: DUMMY [15:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_MASK       0xffff
#define BCHP_RAAGA_REGSET_DSP_CFG_AC3_UPS_WORD_53_DUMMY_SHIFT      0

/***************************************************************************
 *DTS_CORE_UPS_WORD_00 - DTS Core User Parameters Structure Word 0 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_00 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Stereo 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_00_OUTMODE_Mono 1

/***************************************************************************
 *DTS_CORE_UPS_WORD_01 - DTS Core User Parameters Structure Word 1 - OUTLFE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_01 :: OUTLFE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_01_OUTLFE_SHIFT 0

/***************************************************************************
 *DTS_CORE_UPS_WORD_02 - DTS Core User Parameters Structure Word 2 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_02 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_stereo 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_leftmono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_rghtmono 2
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_02_DUALMODE_Dual_mixmono 3

/***************************************************************************
 *DTS_CORE_UPS_WORD_03 - DTS Core User Parameters Structure Word 3 - STEREOMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_03 :: STEREOMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereomode_auto 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LTRT 1
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_03_STEREOMODE_Stereodmix_LORO 2

/***************************************************************************
 *DTS_CORE_UPS_WORD_04 - DTS Core User Parameters Structure Word 4 - EXTDNMIX_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_04 :: EXTDNMIX_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_04_EXTDNMIX_ENABLED_SHIFT 0

/***************************************************************************
 *DTS_CORE_UPS_WORD_05_TO_40 - DTS Core User Parameters Structure Word 5 to 40 - EXTDNMIXTAB
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: DTS_CORE_UPS_WORD_05_TO_40 :: EXTDNMIXTAB [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_DTS_CORE_UPS_WORD_05_TO_40_EXTDNMIXTAB_Mute 0

/***************************************************************************
 *LPCM_UPS_WORD_00 - LPCM User Parameters Structure Word 0 - EXTDNMIX_ENABLED
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_00 :: EXTDNMIX_ENABLED [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_00_EXTDNMIX_ENABLED_SHIFT 0

/***************************************************************************
 *LPCM_UPS_WORD_01_TO_16 - LPCM User Parameters Structure Word 1 to 16 - EXTDNMIXTAB
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: LPCM_UPS_WORD_01_TO_16 :: EXTDNMIXTAB [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_MASK 0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_SHIFT 0
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Full_scale 2147483647
#define BCHP_RAAGA_REGSET_DSP_CFG_LPCM_UPS_WORD_01_TO_16_EXTDNMIXTAB_Mute 0

/***************************************************************************
 *MPEG_UPS_WORD_00 - MPEG User Parameters Structure Word 0 - OUTMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_00 :: OUTMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_MASK    0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_SHIFT   0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Stereo  0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_00_OUTMODE_Mono    1

/***************************************************************************
 *MPEG_UPS_WORD_01 - MPEG User Parameters Structure Word 1 - DUALMODE
 ***************************************************************************/
/* RAAGA_REGSET_DSP_CFG :: MPEG_UPS_WORD_01 :: DUALMODE [31:00] */
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_MASK   0xffffffff
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_SHIFT  0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Left_mono 0
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Right_mono 1
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_stereo 2
#define BCHP_RAAGA_REGSET_DSP_CFG_MPEG_UPS_WORD_01_DUALMODE_Dual_mixmono 3

/***************************************************************************
 *RDC
 ***************************************************************************/
/***************************************************************************
 *RUL - RUL Command.
 ***************************************************************************/
/* RDC :: RUL :: opcode [31:24] */
#define BCHP_RDC_RUL_opcode_MASK                                   0xff000000
#define BCHP_RDC_RUL_opcode_SHIFT                                  24
#define BCHP_RDC_RUL_opcode_NOP                                    0
#define BCHP_RDC_RUL_opcode_REG_WRITE_IMM                          1
#define BCHP_RDC_RUL_opcode_REG_WRITE                              2
#define BCHP_RDC_RUL_opcode_REG_READ                               3
#define BCHP_RDC_RUL_opcode_LOAD_IMM                               4
#define BCHP_RDC_RUL_opcode_WINDOW_WRITE                           5
#define BCHP_RDC_RUL_opcode_BLOCK_WRITE                            6
#define BCHP_RDC_RUL_opcode_WINDOW_COPY                            7
#define BCHP_RDC_RUL_opcode_BLOCK_COPY                             8
#define BCHP_RDC_RUL_opcode_WINDOW_TO_BLOCK                        9
#define BCHP_RDC_RUL_opcode_BLOCK_TO_WINDOW                        10
#define BCHP_RDC_RUL_opcode_AND                                    11
#define BCHP_RDC_RUL_opcode_AND_IMM                                12
#define BCHP_RDC_RUL_opcode_OR                                     13
#define BCHP_RDC_RUL_opcode_OR_IMM                                 14
#define BCHP_RDC_RUL_opcode_XOR                                    15
#define BCHP_RDC_RUL_opcode_XOR_IMM                                16
#define BCHP_RDC_RUL_opcode_NOT                                    17
#define BCHP_RDC_RUL_opcode_ROTATE_RIGHT                           18
#define BCHP_RDC_RUL_opcode_SUM                                    19
#define BCHP_RDC_RUL_opcode_SUM_IMM                                20
#define BCHP_RDC_RUL_opcode_COND_SKIP                              21
#define BCHP_RDC_RUL_opcode_SKIP                                   22
#define BCHP_RDC_RUL_opcode_EXIT                                   23
#define BCHP_RDC_RUL_opcode_PLACEHOLDER                            255

/* RDC :: RUL :: reserved0 [23:23] */
#define BCHP_RDC_RUL_reserved0_MASK                                0x00800000
#define BCHP_RDC_RUL_reserved0_SHIFT                               23

/* union - case rdc_args [22:00] */
/* RDC :: RUL :: rdc_args :: rotation [22:18] */
#define BCHP_RDC_RUL_rdc_args_rotation_MASK                        0x007c0000
#define BCHP_RDC_RUL_rdc_args_rotation_SHIFT                       18

/* RDC :: RUL :: rdc_args :: src1 [17:12] */
#define BCHP_RDC_RUL_rdc_args_src1_MASK                            0x0003f000
#define BCHP_RDC_RUL_rdc_args_src1_SHIFT                           12

/* RDC :: RUL :: rdc_args :: src2 [11:06] */
#define BCHP_RDC_RUL_rdc_args_src2_MASK                            0x00000fc0
#define BCHP_RDC_RUL_rdc_args_src2_SHIFT                           6

/* RDC :: RUL :: rdc_args :: dest [05:00] */
#define BCHP_RDC_RUL_rdc_args_dest_MASK                            0x0000003f
#define BCHP_RDC_RUL_rdc_args_dest_SHIFT                           0

/* union - case reg_args [22:00] */
/* RDC :: RUL :: reg_args :: rotation [22:18] */
#define BCHP_RDC_RUL_reg_args_rotation_MASK                        0x007c0000
#define BCHP_RDC_RUL_reg_args_rotation_SHIFT                       18

/* RDC :: RUL :: reg_args :: src1 [17:12] */
#define BCHP_RDC_RUL_reg_args_src1_MASK                            0x0003f000
#define BCHP_RDC_RUL_reg_args_src1_SHIFT                           12

/* RDC :: RUL :: reg_args :: count [11:00] */
#define BCHP_RDC_RUL_reg_args_count_MASK                           0x00000fff
#define BCHP_RDC_RUL_reg_args_count_SHIFT                          0

/***************************************************************************
 *SPDIF_RCVR_ESR
 ***************************************************************************/
/***************************************************************************
 *ABSTRACT_INTERRUPT_HANDLING - Interrupt Handling
 ***************************************************************************/
/* SPDIF_RCVR_ESR :: ABSTRACT_INTERRUPT_HANDLING :: MORE_INFORMATION [31:00] */
#define BCHP_SPDIF_RCVR_ESR_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_MASK 0xffffffff
#define BCHP_SPDIF_RCVR_ESR_ABSTRACT_INTERRUPT_HANDLING_MORE_INFORMATION_SHIFT 0

/***************************************************************************
 *VICE2_REGSET_MISC
 ***************************************************************************/
/***************************************************************************
 *DCCM - registers interface address offset in DCCM.
 ***************************************************************************/
/* VICE2_REGSET_MISC :: DCCM :: INTERFACE [31:16] */
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MASK                 0xffff0000
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_SHIFT                16
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_HOST2VICE_OFFSET     0
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_VICE2HOST_OFFSET     4
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_BVN2VICE_OFFSET      8
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_0_START         16
#define BCHP_VICE2_REGSET_MISC_DCCM_INTERFACE_MBOX_1_START         36

/* VICE2_REGSET_MISC :: DCCM :: REVISION [15:00] */
#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_MASK                  0x0000ffff
#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_SHIFT                 0
#define BCHP_VICE2_REGSET_MISC_DCCM_REVISION_ID                    1

/***************************************************************************
 *DWORD_00_BVB_PIC_SIZE - BVB Picture Size
 ***************************************************************************/
/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: H_SIZE [31:16] */
#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_MASK   0xffff0000
#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_H_SIZE_SHIFT  16

/* VICE2_REGSET_MISC :: DWORD_00_BVB_PIC_SIZE :: V_SIZE [15:00] */
#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_MASK   0x0000ffff
#define BCHP_VICE2_REGSET_MISC_DWORD_00_BVB_PIC_SIZE_V_SIZE_SHIFT  0

/***************************************************************************
 *DWORD_01_SAMPLE_ASPECT_RATIO - Sample Aspect Ratio
 ***************************************************************************/
/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: H_SIZE [31:16] */
#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_MASK 0xffff0000
#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_H_SIZE_SHIFT 16

/* VICE2_REGSET_MISC :: DWORD_01_SAMPLE_ASPECT_RATIO :: V_SIZE [15:00] */
#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_MASK 0x0000ffff
#define BCHP_VICE2_REGSET_MISC_DWORD_01_SAMPLE_ASPECT_RATIO_V_SIZE_SHIFT 0

/***************************************************************************
 *DWORD_02_PIC_INFO - Picture Information
 ***************************************************************************/
/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: FRAME_RATE [31:16] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_MASK   0xffff0000
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_FRAME_RATE_SHIFT  16

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: SRC_PIC_TYPE [15:12] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_MASK 0x0000f000
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_SHIFT 12
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_UNKNOWN 0
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_I    1
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_P    2
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_SRC_PIC_TYPE_B    3

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: POLARITY [11:10] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_MASK     0x00000c00
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_SHIFT    10
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_TOP      0
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_BOT      1
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_POLARITY_FRAME    2

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: REPEAT [09:09] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_MASK       0x00000200
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_SHIFT      9
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_DISABLE    0
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_REPEAT_ENABLE     1

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: IGNORE [08:08] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_MASK       0x00000100
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_SHIFT      8
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_DISABLE    0
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_IGNORE_ENABLE     1

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: LAST [07:07] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_MASK         0x00000080
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_SHIFT        7
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_FALSE        0
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_LAST_TRUE         1

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: CHANNELCHANGE [06:06] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_MASK 0x00000040
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_SHIFT 6
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_FALSE 0
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_CHANNELCHANGE_TRUE 1

/* VICE2_REGSET_MISC :: DWORD_02_PIC_INFO :: reserved0 [05:00] */
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_MASK    0x0000003f
#define BCHP_VICE2_REGSET_MISC_DWORD_02_PIC_INFO_reserved0_SHIFT   0

/***************************************************************************
 *DWORD_03_ORIGINAL_PTS - Source PTS Value
 ***************************************************************************/
/* VICE2_REGSET_MISC :: DWORD_03_ORIGINAL_PTS :: VAL [31:00] */
#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_MASK      0xffffffff
#define BCHP_VICE2_REGSET_MISC_DWORD_03_ORIGINAL_PTS_VAL_SHIFT     0

/***************************************************************************
 *DWORD_04_STG_PICTURE_ID - STG Picture ID
 ***************************************************************************/
/* VICE2_REGSET_MISC :: DWORD_04_STG_PICTURE_ID :: VAL [31:00] */
#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_MASK    0xffffffff
#define BCHP_VICE2_REGSET_MISC_DWORD_04_STG_PICTURE_ID_VAL_SHIFT   0

/***************************************************************************
 *MBOX - MBOX registers interface address offset.
 ***************************************************************************/
/* VICE2_REGSET_MISC :: MBOX :: INTERFACE [31:16] */
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_MASK                 0xffff0000
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SHIFT                16
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_00_BVB_PIC_SIZE_OFFSET 0
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_01_SAMPLE_ASPECT_RATIO_OFFSET 4
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_02_PIC_INFO_OFFSET 8
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_03_ORIGINAL_PTS_OFFSET 12
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_DWORD_04_STG_PICTURE_ID_OFFSET 16
#define BCHP_VICE2_REGSET_MISC_MBOX_INTERFACE_SIZE                 5

/* VICE2_REGSET_MISC :: MBOX :: REVISION [15:00] */
#define BCHP_VICE2_REGSET_MISC_MBOX_REVISION_MASK                  0x0000ffff
#define BCHP_VICE2_REGSET_MISC_MBOX_REVISION_SHIFT                 0
#define BCHP_VICE2_REGSET_MISC_MBOX_REVISION_ID                    3

/***************************************************************************
 *XPT_PB
 ***************************************************************************/
/***************************************************************************
 *DESCRIPTOR_ABSTRACT - Playback Linked-List Descriptor Abstract
 ***************************************************************************/
/* XPT_PB :: DESCRIPTOR_ABSTRACT :: DESCRIPTOR_FORMAT [31:00] */
#define BCHP_XPT_PB_DESCRIPTOR_ABSTRACT_DESCRIPTOR_FORMAT_MASK     0xffffffff
#define BCHP_XPT_PB_DESCRIPTOR_ABSTRACT_DESCRIPTOR_FORMAT_SHIFT    0

/***************************************************************************
 *DESC_0 - Playback Linked-List Descriptor Word 0
 ***************************************************************************/
/* XPT_PB :: DESC_0 :: PB_BUFFER_START_ADDR [31:00] */
#define BCHP_XPT_PB_DESC_0_PB_BUFFER_START_ADDR_MASK               0xffffffff
#define BCHP_XPT_PB_DESC_0_PB_BUFFER_START_ADDR_SHIFT              0

/***************************************************************************
 *DESC_1 - Playback Linked-List Descriptor Word 1
 ***************************************************************************/
/* XPT_PB :: DESC_1 :: PB_BUFFER_LENGTH [31:00] */
#define BCHP_XPT_PB_DESC_1_PB_BUFFER_LENGTH_MASK                   0xffffffff
#define BCHP_XPT_PB_DESC_1_PB_BUFFER_LENGTH_SHIFT                  0

/***************************************************************************
 *DESC_2 - Playback Linked-List Descriptor Word 2
 ***************************************************************************/
/* XPT_PB :: DESC_2 :: PB_INTERRUPT_ENABLE [31:31] */
#define BCHP_XPT_PB_DESC_2_PB_INTERRUPT_ENABLE_MASK                0x80000000
#define BCHP_XPT_PB_DESC_2_PB_INTERRUPT_ENABLE_SHIFT               31

/* XPT_PB :: DESC_2 :: PB_FORCE_RESYNC [30:30] */
#define BCHP_XPT_PB_DESC_2_PB_FORCE_RESYNC_MASK                    0x40000000
#define BCHP_XPT_PB_DESC_2_PB_FORCE_RESYNC_SHIFT                   30

/* XPT_PB :: DESC_2 :: PB_HOST_DATA_INS_EN [29:29] */
#define BCHP_XPT_PB_DESC_2_PB_HOST_DATA_INS_EN_MASK                0x20000000
#define BCHP_XPT_PB_DESC_2_PB_HOST_DATA_INS_EN_SHIFT               29

/* XPT_PB :: DESC_2 :: PUSH_PARTIAL_PACKET [28:28] */
#define BCHP_XPT_PB_DESC_2_PUSH_PARTIAL_PACKET_MASK                0x10000000
#define BCHP_XPT_PB_DESC_2_PUSH_PARTIAL_PACKET_SHIFT               28

/* XPT_PB :: DESC_2 :: PB_DESC_TAG_ID [27:24] */
#define BCHP_XPT_PB_DESC_2_PB_DESC_TAG_ID_MASK                     0x0f000000
#define BCHP_XPT_PB_DESC_2_PB_DESC_TAG_ID_SHIFT                    24

/* XPT_PB :: DESC_2 :: reserved0 [23:00] */
#define BCHP_XPT_PB_DESC_2_reserved0_MASK                          0x00ffffff
#define BCHP_XPT_PB_DESC_2_reserved0_SHIFT                         0

/***************************************************************************
 *DESC_3 - Playback Linked-List Descriptor Word 3
 ***************************************************************************/
/* XPT_PB :: DESC_3 :: PB_NEXT_DESC_ADDR [31:04] */
#define BCHP_XPT_PB_DESC_3_PB_NEXT_DESC_ADDR_MASK                  0xfffffff0
#define BCHP_XPT_PB_DESC_3_PB_NEXT_DESC_ADDR_SHIFT                 4

/* XPT_PB :: DESC_3 :: reserved0 [03:01] */
#define BCHP_XPT_PB_DESC_3_reserved0_MASK                          0x0000000e
#define BCHP_XPT_PB_DESC_3_reserved0_SHIFT                         1

/* XPT_PB :: DESC_3 :: PB_LAST_DESC_IND [00:00] */
#define BCHP_XPT_PB_DESC_3_PB_LAST_DESC_IND_MASK                   0x00000001
#define BCHP_XPT_PB_DESC_3_PB_LAST_DESC_IND_SHIFT                  0

/***************************************************************************
 *DESC_4 - Playback Linked-List Descriptor Word 4
 ***************************************************************************/
/* XPT_PB :: DESC_4 :: reserved0 [31:00] */
#define BCHP_XPT_PB_DESC_4_reserved0_MASK                          0xffffffff
#define BCHP_XPT_PB_DESC_4_reserved0_SHIFT                         0

/***************************************************************************
 *DESC_5 - Playback Linked-List Descriptor Word 5
 ***************************************************************************/
/* XPT_PB :: DESC_5 :: reserved0 [31:03] */
#define BCHP_XPT_PB_DESC_5_reserved0_MASK                          0xfffffff8
#define BCHP_XPT_PB_DESC_5_reserved0_SHIFT                         3

/* XPT_PB :: DESC_5 :: RANDOM_ACCESS_INDICATION [02:02] */
#define BCHP_XPT_PB_DESC_5_RANDOM_ACCESS_INDICATION_MASK           0x00000004
#define BCHP_XPT_PB_DESC_5_RANDOM_ACCESS_INDICATION_SHIFT          2

/* XPT_PB :: DESC_5 :: NEXT_PACKET_PACING_TIMESTAMP_VALID [01:01] */
#define BCHP_XPT_PB_DESC_5_NEXT_PACKET_PACING_TIMESTAMP_VALID_MASK 0x00000002
#define BCHP_XPT_PB_DESC_5_NEXT_PACKET_PACING_TIMESTAMP_VALID_SHIFT 1

/* XPT_PB :: DESC_5 :: PKT2PKT_PACING_TIMESTAMP_DELTA_VALID [00:00] */
#define BCHP_XPT_PB_DESC_5_PKT2PKT_PACING_TIMESTAMP_DELTA_VALID_MASK 0x00000001
#define BCHP_XPT_PB_DESC_5_PKT2PKT_PACING_TIMESTAMP_DELTA_VALID_SHIFT 0

/***************************************************************************
 *DESC_6 - Playback Linked-List Descriptor Word 6
 ***************************************************************************/
/* XPT_PB :: DESC_6 :: NEXT_PACKET_PACING_TIMESTAMP [31:00] */
#define BCHP_XPT_PB_DESC_6_NEXT_PACKET_PACING_TIMESTAMP_MASK       0xffffffff
#define BCHP_XPT_PB_DESC_6_NEXT_PACKET_PACING_TIMESTAMP_SHIFT      0

/***************************************************************************
 *DESC_7 - Playback Linked-List Descriptor Word 7
 ***************************************************************************/
/* XPT_PB :: DESC_7 :: PKT2PKT_PACING_TIMESTAMP_DELTA [31:00] */
#define BCHP_XPT_PB_DESC_7_PKT2PKT_PACING_TIMESTAMP_DELTA_MASK     0xffffffff
#define BCHP_XPT_PB_DESC_7_PKT2PKT_PACING_TIMESTAMP_DELTA_SHIFT    0

/***************************************************************************
 *XPT_RAVE
 ***************************************************************************/
/***************************************************************************
 *NOTEA_CONTEXT_SETUP_EXAMPLES - Context Setup Examples
 ***************************************************************************/
/* XPT_RAVE :: NOTEA_CONTEXT_SETUP_EXAMPLES :: CONTEXT_EXAMPLES [31:00] */
#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEA_CONTEXT_SETUP_EXAMPLES_CONTEXT_EXAMPLES_SHIFT 0

/***************************************************************************
 *NOTEB_STREAM_TYPE_SETUP - Stream Type Setup
 ***************************************************************************/
/* XPT_RAVE :: NOTEB_STREAM_TYPE_SETUP :: STREAM_TYPE_SETUP [31:00] */
#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEB_STREAM_TYPE_SETUP_STREAM_TYPE_SETUP_SHIFT 0

/***************************************************************************
 *NOTEC_PES_LAYER_SELECTION - PES Layer Selection
 ***************************************************************************/
/* XPT_RAVE :: NOTEC_PES_LAYER_SELECTION :: PES_LAYER_SELECTION [31:00] */
#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEC_PES_LAYER_SELECTION_PES_LAYER_SELECTION_SHIFT 0

/***************************************************************************
 *NOTED_ES_FORMAT_SELECTION_GENERAL - ES Format Selection - general
 ***************************************************************************/
/* XPT_RAVE :: NOTED_ES_FORMAT_SELECTION_GENERAL :: GENERAL_ES_FORMAT_SELECTION [31:00] */
#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTED_ES_FORMAT_SELECTION_GENERAL_GENERAL_ES_FORMAT_SELECTION_SHIFT 0

/***************************************************************************
 *NOTEE_MPEG2_VIDEO_ES_SETUP - ES Setup - MPEG2 Video
 ***************************************************************************/
/* XPT_RAVE :: NOTEE_MPEG2_VIDEO_ES_SETUP :: MPEG2_VIDEO_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEE_MPEG2_VIDEO_ES_SETUP_MPEG2_VIDEO_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEF_AVC_VC1_VIDEO_ES_SETUP - ES Setup - AVC and VC1 Video
 ***************************************************************************/
/* XPT_RAVE :: NOTEF_AVC_VC1_VIDEO_ES_SETUP :: AVC_VC1_VIDEO_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEF_AVC_VC1_VIDEO_ES_SETUP_AVC_VC1_VIDEO_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEG_MPEG_AUDIO_ES_SETUP - ES Setup - MPEG Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEG_MPEG_AUDIO_ES_SETUP :: AUDIO_MPEG_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEG_MPEG_AUDIO_ES_SETUP_AUDIO_MPEG_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEH_AAC_AUDIO_ES_SETUP - ES Setup - AAC Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEH_AAC_AUDIO_ES_SETUP :: AUDIO_AAC_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEH_AAC_AUDIO_ES_SETUP_AUDIO_AAC_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEH_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEH_AC3_AUDIO_ES_SETUP :: AUDIO_AC3_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEH_AC3_AUDIO_ES_SETUP_AUDIO_AC3_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEH_DVD_AC3_AUDIO_ES_SETUP - ES Setup - DVD_AC3 Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEH_DVD_AC3_AUDIO_ES_SETUP :: DVD_AUDIO_AC3_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEH_DVD_AC3_AUDIO_ES_SETUP_DVD_AUDIO_AC3_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEH_DVD_AC3_AUDIO_ES_SETUP_DVD_AUDIO_AC3_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEI_DVD_LPCM_AUDIO_ES_SETUP - ES Setup - DVD_LPCM Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEI_DVD_LPCM_AUDIO_ES_SETUP :: DVD_AUDIO_LPCM_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEI_DVD_LPCM_AUDIO_ES_SETUP_DVD_AUDIO_LPCM_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEI_DVD_LPCM_AUDIO_ES_SETUP_DVD_AUDIO_LPCM_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP - ES Setup - AC3 Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP :: AUDIO_ENHANCED_AC3_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEJ_ENHANCED_AC3_AUDIO_ES_SETUP_AUDIO_ENHANCED_AC3_ES_FORMAT_SHIFT 0

/***************************************************************************
 *NOTEK_AAC_HE_AUDIO_ES_SETUP - ES Setup - AAC HE Audio
 ***************************************************************************/
/* XPT_RAVE :: NOTEK_AAC_HE_AUDIO_ES_SETUP :: AUDIO_AAC_HE_ES_FORMAT [31:00] */
#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_MASK 0xffffffff
#define BCHP_XPT_RAVE_NOTEK_AAC_HE_AUDIO_ES_SETUP_AUDIO_AAC_HE_ES_FORMAT_SHIFT 0

#endif /* #ifndef BCHP_COMMON_H__ */

/* End of File */