/*
 * Samsung's Exynos4 SoC series common device tree source
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 * Copyright (c) 2010-2011 Linaro Ltd.
 *		www.linaro.org
 *
 * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
 * SoCs from Exynos4 series can include this file and provide values for SoCs
 * specfic bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
 * nodes can be added to this file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/clock/exynos4.h>
#include <dt-bindings/clock/exynos-audss-clk.h>
#include "skeleton.dtsi"

/ {
	interrupt-parent = <&gic>;

	aliases {
		spi0 = &spi_0;
		spi1 = &spi_1;
		spi2 = &spi_2;
		i2c0 = &i2c_0;
		i2c1 = &i2c_1;
		i2c2 = &i2c_2;
		i2c3 = &i2c_3;
		i2c4 = &i2c_4;
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		i2c7 = &i2c_7;
		csis0 = &csis_0;
		csis1 = &csis_1;
		fimc0 = &fimc_0;
		fimc1 = &fimc_1;
		fimc2 = &fimc_2;
		fimc3 = &fimc_3;
		serial0 = &serial_0;
		serial1 = &serial_1;
		serial2 = &serial_2;
		serial3 = &serial_3;
	};

	clock_audss: clock-controller@03810000 {
		compatible = "samsung,exynos4210-audss-clock";
		reg = <0x03810000 0x0C>;
		#clock-cells = <1>;
	};

	i2s0: i2s@03830000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x03830000 0x100>;
		clocks = <&clock_audss EXYNOS_I2S_BUS>;
		clock-names = "iis";
		dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
		dma-names = "tx", "rx", "tx-sec";
		samsung,idma-addr = <0x03000000>;
		status = "disabled";
	};

	chipid@10000000 {
		compatible = "samsung,exynos4210-chipid";
		reg = <0x10000000 0x100>;
	};

	mipi_phy: video-phy@10020710 {
		compatible = "samsung,s5pv210-mipi-video-phy";
		reg = <0x10020710 8>;
		#phy-cells = <1>;
	};

	pd_mfc: mfc-power-domain@10023C40 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C40 0x20>;
	};

	pd_g3d: g3d-power-domain@10023C60 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C60 0x20>;
	};

	pd_lcd0: lcd0-power-domain@10023C80 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C80 0x20>;
	};

	pd_tv: tv-power-domain@10023C20 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C20 0x20>;
	};

	pd_cam: cam-power-domain@10023C00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C00 0x20>;
	};

	pd_gps: gps-power-domain@10023CE0 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CE0 0x20>;
	};

	pd_gps_alive: gps-alive-power-domain@10023D00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023D00 0x20>;
	};

	gic: interrupt-controller@10490000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
	};

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0x10440000 0x1000>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupt-parent = <&combiner>;
		interrupts = <2 2>, <3 2>;
	};

	sys_reg: syscon@10010000 {
		compatible = "samsung,exynos4-sysreg", "syscon";
		reg = <0x10010000 0x400>;
	};

	pmu_system_controller: system-controller@10020000 {
		compatible = "samsung,exynos4210-pmu", "syscon";
		reg = <0x10020000 0x4000>;
	};

	dsi_0: dsi@11C80000 {
		compatible = "samsung,exynos4210-mipi-dsi";
		reg = <0x11C80000 0x10000>;
		interrupts = <0 79 0>;
		samsung,power-domain = <&pd_lcd0>;
		phys = <&mipi_phy 1>;
		phy-names = "dsim";
		clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
		clock-names = "bus_clk", "pll_clk";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	camera {
		compatible = "samsung,fimc", "simple-bus";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <1>;
		#clock-cells = <1>;
		clock-output-names = "cam_a_clkout", "cam_b_clkout";
		ranges;

		fimc_0: fimc@11800000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11800000 0x1000>;
			interrupts = <0 84 0>;
			clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_1: fimc@11810000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11810000 0x1000>;
			interrupts = <0 85 0>;
			clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_2: fimc@11820000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11820000 0x1000>;
			interrupts = <0 86 0>;
			clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_3: fimc@11830000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11830000 0x1000>;
			interrupts = <0 87 0>;
			clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		csis_0: csis@11880000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11880000 0x4000>;
			interrupts = <0 78 0>;
			clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
			clock-names = "csis", "sclk_csis";
			bus-width = <4>;
			samsung,power-domain = <&pd_cam>;
			phys = <&mipi_phy 0>;
			phy-names = "csis";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		csis_1: csis@11890000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11890000 0x4000>;
			interrupts = <0 80 0>;
			clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
			clock-names = "csis", "sclk_csis";
			bus-width = <2>;
			samsung,power-domain = <&pd_cam>;
			phys = <&mipi_phy 2>;
			phy-names = "csis";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	watchdog@10060000 {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x10060000 0x100>;
		interrupts = <0 43 0>;
		clocks = <&clock CLK_WDT>;
		clock-names = "watchdog";
		status = "disabled";
	};

	rtc@10070000 {
		compatible = "samsung,s3c6410-rtc";
		reg = <0x10070000 0x100>;
		interrupts = <0 44 0>, <0 45 0>;
		clocks = <&clock CLK_RTC>;
		clock-names = "rtc";
		status = "disabled";
	};

	keypad@100A0000 {
		compatible = "samsung,s5pv210-keypad";
		reg = <0x100A0000 0x100>;
		interrupts = <0 109 0>;
		clocks = <&clock CLK_KEYIF>;
		clock-names = "keypad";
		status = "disabled";
	};

	sdhci@12510000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12510000 0x100>;
		interrupts = <0 73 0>;
		clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12520000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12520000 0x100>;
		interrupts = <0 74 0>;
		clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12530000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12530000 0x100>;
		interrupts = <0 75 0>;
		clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12540000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12540000 0x100>;
		interrupts = <0 76 0>;
		clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	exynos_usbphy: exynos-usbphy@125B0000 {
		compatible = "samsung,exynos4210-usb2-phy";
		reg = <0x125B0000 0x100>;
		samsung,pmureg-phandle = <&pmu_system_controller>;
		clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
		clock-names = "phy", "ref";
		#phy-cells = <1>;
		status = "disabled";
	};

	hsotg@12480000 {
		compatible = "samsung,s3c6400-hsotg";
		reg = <0x12480000 0x20000>;
		interrupts = <0 71 0>;
		clocks = <&clock CLK_USB_DEVICE>;
		clock-names = "otg";
		phys = <&exynos_usbphy 0>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	ehci@12580000 {
		compatible = "samsung,exynos4210-ehci";
		reg = <0x12580000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock CLK_USB_HOST>;
		clock-names = "usbhost";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
		    reg = <0>;
		    phys = <&exynos_usbphy 1>;
		    status = "disabled";
		};
		port@1 {
		    reg = <1>;
		    phys = <&exynos_usbphy 2>;
		    status = "disabled";
		};
		port@2 {
		    reg = <2>;
		    phys = <&exynos_usbphy 3>;
		    status = "disabled";
		};
	};

	ohci@12590000 {
		compatible = "samsung,exynos4210-ohci";
		reg = <0x12590000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock CLK_USB_HOST>;
		clock-names = "usbhost";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
		    reg = <0>;
		    phys = <&exynos_usbphy 1>;
		    status = "disabled";
		};
	};

	i2s1: i2s@13960000 {
		compatible = "samsung,s3c6410-i2s";
		reg = <0x13960000 0x100>;
		clocks = <&clock CLK_I2S1>;
		clock-names = "iis";
		dmas = <&pdma1 12>, <&pdma1 11>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	i2s2: i2s@13970000 {
		compatible = "samsung,s3c6410-i2s";
		reg = <0x13970000 0x100>;
		clocks = <&clock CLK_I2S2>;
		clock-names = "iis";
		dmas = <&pdma0 14>, <&pdma0 13>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	mfc: codec@13400000 {
		compatible = "samsung,mfc-v5";
		reg = <0x13400000 0x10000>;
		interrupts = <0 94 0>;
		samsung,power-domain = <&pd_mfc>;
		clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
		clock-names = "mfc", "sclk_mfc";
		status = "disabled";
	};

	serial_0: serial@13800000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13800000 0x100>;
		interrupts = <0 52 0>;
		clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial_1: serial@13810000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13810000 0x100>;
		interrupts = <0 53 0>;
		clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial_2: serial@13820000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13820000 0x100>;
		interrupts = <0 54 0>;
		clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial_3: serial@13830000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13830000 0x100>;
		interrupts = <0 55 0>;
		clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	i2c_0: i2c@13860000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13860000 0x100>;
		interrupts = <0 58 0>;
		clocks = <&clock CLK_I2C0>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_bus>;
		status = "disabled";
	};

	i2c_1: i2c@13870000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13870000 0x100>;
		interrupts = <0 59 0>;
		clocks = <&clock CLK_I2C1>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c1_bus>;
		status = "disabled";
	};

	i2c_2: i2c@13880000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13880000 0x100>;
		interrupts = <0 60 0>;
		clocks = <&clock CLK_I2C2>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c2_bus>;
		status = "disabled";
	};

	i2c_3: i2c@13890000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13890000 0x100>;
		interrupts = <0 61 0>;
		clocks = <&clock CLK_I2C3>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c3_bus>;
		status = "disabled";
	};

	i2c_4: i2c@138A0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138A0000 0x100>;
		interrupts = <0 62 0>;
		clocks = <&clock CLK_I2C4>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c4_bus>;
		status = "disabled";
	};

	i2c_5: i2c@138B0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138B0000 0x100>;
		interrupts = <0 63 0>;
		clocks = <&clock CLK_I2C5>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c5_bus>;
		status = "disabled";
	};

	i2c_6: i2c@138C0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138C0000 0x100>;
		interrupts = <0 64 0>;
		clocks = <&clock CLK_I2C6>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c6_bus>;
		status = "disabled";
	};

	i2c_7: i2c@138D0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138D0000 0x100>;
		interrupts = <0 65 0>;
		clocks = <&clock CLK_I2C7>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c7_bus>;
		status = "disabled";
	};

	spi_0: spi@13920000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13920000 0x100>;
		interrupts = <0 66 0>;
		dmas = <&pdma0 7>, <&pdma0 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;
		status = "disabled";
	};

	spi_1: spi@13930000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13930000 0x100>;
		interrupts = <0 67 0>;
		dmas = <&pdma1 7>, <&pdma1 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi1_bus>;
		status = "disabled";
	};

	spi_2: spi@13940000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13940000 0x100>;
		interrupts = <0 68 0>;
		dmas = <&pdma0 9>, <&pdma0 8>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi2_bus>;
		status = "disabled";
	};

	pwm@139D0000 {
		compatible = "samsung,exynos4210-pwm";
		reg = <0x139D0000 0x1000>;
		interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
		clocks = <&clock CLK_PWM>;
		clock-names = "timers";
		#pwm-cells = <3>;
		status = "disabled";
	};

	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@12680000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12680000 0x1000>;
			interrupts = <0 35 0>;
			clocks = <&clock CLK_PDMA0>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		pdma1: pdma@12690000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12690000 0x1000>;
			interrupts = <0 36 0>;
			clocks = <&clock CLK_PDMA1>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		mdma1: mdma@12850000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12850000 0x1000>;
			interrupts = <0 34 0>;
			clocks = <&clock CLK_MDMA>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};
	};

	fimd: fimd@11c00000 {
		compatible = "samsung,exynos4210-fimd";
		interrupt-parent = <&combiner>;
		reg = <0x11c00000 0x20000>;
		interrupt-names = "fifo", "vsync", "lcd_sys";
		interrupts = <11 0>, <11 1>, <11 2>;
		clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
		clock-names = "sclk_fimd", "fimd";
		samsung,power-domain = <&pd_lcd0>;
		samsung,sysreg = <&sys_reg>;
		status = "disabled";
	};
};