tree 7f967c6eada43604a8dd30e88141f70bbc4e91b5
parent 97bf6af1f928216fd6c5a66e8a57bfa95a659672
author Max Filippov <jcmvbkbc@gmail.com> 1419614378 +0300
committer Mark Brown <broonie@kernel.org> 1420746731 +0000

ASoC: add xtensa xtfpga I2S interface and platform

XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.

I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>