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#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_LBA48
#define CFG_I2C_EEPROM0_ADDR 0x50
#define I2C_EEPROM_PAGE_SZ 128
#define I2C_EEPROM_SIZE I2C_EEPROM_AT24C512B_SZ
#define I2C_EEPROM_AT24C512B_SZ 64 * 1024
#define EMAC0_PHY_ADDR 0
#define EMAC1_PHY_ADDR 4
#define EMAC0_FLAGS GEMAC_NO_PHY
#define EMAC1_FLAGS 0
#define EMAC2_FLAGS GEMAC_NO_PHY
#define EXP_CS0_BASE_VAL 0x0
#define EXP_CS0_SEG_SIZE_VAL 0x7FFF
#define EXP_CS0_SEG_END_VAL (EXP_CS0_BASE_VAL + EXP_CS0_SEG_SIZE_VAL)
#define EXP_CS1_BASE_VAL (EXP_CS0_SEG_END_VAL + 1)
#define EXP_CS1_SEG_SIZE_VAL 0xFF
#define EXP_CS1_SEG_END_VAL (EXP_CS1_BASE_VAL + EXP_CS1_SEG_SIZE_VAL)
#define EXP_CS2_BASE_VAL (EXP_CS1_SEG_END_VAL + 1)
#define EXP_CS2_SEG_SIZE_VAL 0xFF
#define EXP_CS2_SEG_END_VAL (EXP_CS2_BASE_VAL + EXP_CS2_SEG_SIZE_VAL)
#define EXP_CS3_BASE_VAL (EXP_CS2_SEG_END_VAL + 1)
#define EXP_CS3_SEG_SIZE_VAL 0xFF
#define EXP_CS3_SEG_END_VAL (EXP_CS3_BASE_VAL + EXP_CS3_SEG_SIZE_VAL)
#define EXP_CS4_BASE_VAL (EXP_CS3_SEG_END_VAL + 1)
#define EXP_CS4_SEG_SIZE_VAL 0xFF
#define EXP_CS4_SEG_END_VAL (EXP_CS4_BASE_VAL + EXP_CS4_SEG_SIZE_VAL)
#define SHIFT_4K_MUL 12
#define COMCERTO_EXP_CS4_BASE_ADDR (COMCERTO_AXI_EXP_BASE + (EXP_CS4_BASE_VAL << SHIFT_4K_MUL))
#define COMCERTO_NAND_FLASH_SIZE (2UL * 1024UL * 1024UL * 1024UL)
/*SPI NOR Flash CS:0*/
#define SPI_FLASH_SIZE (16 * 1024 * 1024) /* 16 MB */
#define SPI_FLASH_SECTOR_64KB (64 * 1024)
#define SPI_FLASH_SECTOR_256KB (256 * 1024)
#define SPI_FLASH_NOR_PAGE_SIZE 256 /* Bytes */
#define SPI_FLASH_SECTOR_SIZE SPI_FLASH_SECTOR_64KB
#define SPI_FLASH_NUM_SECTORS (SPI_FLASH_SIZE/SPI_FLASH_SECTOR_SIZE)
#define SPI_FLASH_NUM_PAGES_PER_SEC (SPI_FLASH_SECTOR_SIZE/SPI_FLASH_NOR_PAGE_SIZE)
#endif /* __CONFIG_H */