windcharger: configure POE_DIS on GPIO12 for DVT2 boards
The location of POE_DISABLE has changed between DVT1 and DVT2+ boards. For now
we can init POE_DISABLE on both GPIO4 and GPIO12 because the alternative
function is HWREV which is an input.
b/23034909
Change-Id: I884e300812fd3263165a89b7374fbc15d311cc96
diff --git a/board/atheros/board953x/board953x.c b/board/atheros/board953x/board953x.c
index d6bb382..c71362d 100755
--- a/board/atheros/board953x/board953x.c
+++ b/board/atheros/board953x/board953x.c
@@ -93,18 +93,29 @@
udelay(10);
}
-#define GFMN_GPIO_RESET (1 << 13)
-#define GFMN_GPIO_LEDB (1 << 11)
-#define GFMN_GPIO_LEDR (1 << 16)
+#define GFMN_GPIO_HW_REV (1 << 4)
+#define GFMN_GPIO_LEDB (1 << 11)
+#define GFMN_GPIO_POE_DIS (1 << 12)
+#define GFMN_GPIO_RESET (1 << 13)
+#define GFMN_GPIO_LEDR (1 << 16)
void ath_gpio_config(void)
{
- /* GPIO4 configured in cpu/mips/start.S */
+ /* GPIO4 configured in cpu/mips/start.S. We can remove that code when the
+ original DVT boards are gone.
+
+ Pre-DVT2 DVT2 and later
+ GPIO4 |POE_DISABLE HWREV
+ GPIO12 |HWREV POE_DISABLE
+ */
ath_reg_rmw_set(GPIO_OE_ADDRESS, GFMN_GPIO_RESET);
- ath_reg_rmw_set(GPIO_OE_ADDRESS, GFMN_GPIO_LEDB | GFMN_GPIO_LEDR);
- ath_reg_rmw_clear(GPIO_OE_ADDRESS, GFMN_GPIO_LEDB);
+ ath_reg_rmw_clear(GPIO_OE_ADDRESS, GFMN_GPIO_POE_DIS);
+ ath_reg_rmw_clear(GPIO_OUT_ADDRESS, GFMN_GPIO_POE_DIS);
+
+ ath_reg_rmw_clear(GPIO_OE_ADDRESS, GFMN_GPIO_LEDB | GFMN_GPIO_LEDR);
+ ath_reg_rmw_clear(GPIO_OUT_ADDRESS, GFMN_GPIO_LEDB);
ath_reg_rmw_set(GPIO_OUT_ADDRESS, GFMN_GPIO_LEDR);
}
