| /*************************************************************************** |
| * Copyright (c) 1999-2014, Broadcom Corporation |
| * All Rights Reserved |
| * Confidential Property of Broadcom Corporation |
| * |
| * |
| * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
| * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
| * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
| * |
| * $brcm_Workfile: $ |
| * $brcm_Revision: $ |
| * $brcm_Date: $ |
| * |
| * Module Description: |
| * DO NOT EDIT THIS FILE DIRECTLY |
| * |
| * This module was generated magically with RDB from a source description |
| * file. You must edit the source file for changes to be made to this file. |
| * |
| * |
| * Date: Generated on Tue Dec 2 03:18:46 2014 |
| * Full Compile MD5 Checksum 3461841ff250f7118305e1f1650424cf |
| * (minus title and desc) |
| * MD5 Checksum 92044aba65695bbffdeefc8d096b8587 |
| * |
| * Compiled with: RDB Utility combo_header.pl |
| * RDB Parser 3.0 |
| * unknown unknown |
| * Perl Interpreter 5.008008 |
| * Operating System linux |
| * |
| * Revision History: |
| * |
| * $brcm_Log: $ |
| * |
| ***************************************************************************/ |
| |
| #ifndef BCHP_PCIE_0_MISC_PERST_H__ |
| #define BCHP_PCIE_0_MISC_PERST_H__ |
| |
| /*************************************************************************** |
| *PCIE_0_MISC_PERST - PCI-E Miscellaneous Registers (Fundamental reset) |
| ***************************************************************************/ |
| #define BCHP_PCIE_0_MISC_PERST_ECO_CTRL_PERST 0x00474100 /* ECO PCIE Reset Control Register */ |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS 0x00474104 /* Config Copy Engine Status */ |
| |
| /*************************************************************************** |
| *ECO_CTRL_PERST - ECO PCIE Reset Control Register |
| ***************************************************************************/ |
| /* PCIE_0_MISC_PERST :: ECO_CTRL_PERST :: reserved0 [31:16] */ |
| #define BCHP_PCIE_0_MISC_PERST_ECO_CTRL_PERST_reserved0_MASK 0xffff0000 |
| #define BCHP_PCIE_0_MISC_PERST_ECO_CTRL_PERST_reserved0_SHIFT 16 |
| |
| /* PCIE_0_MISC_PERST :: ECO_CTRL_PERST :: ECO_PERST_N [15:00] */ |
| #define BCHP_PCIE_0_MISC_PERST_ECO_CTRL_PERST_ECO_PERST_N_MASK 0x0000ffff |
| #define BCHP_PCIE_0_MISC_PERST_ECO_CTRL_PERST_ECO_PERST_N_SHIFT 0 |
| #define BCHP_PCIE_0_MISC_PERST_ECO_CTRL_PERST_ECO_PERST_N_DEFAULT 0x00000000 |
| |
| /*************************************************************************** |
| *CCE_STATUS - Config Copy Engine Status |
| ***************************************************************************/ |
| /* PCIE_0_MISC_PERST :: CCE_STATUS :: CCE_DONE [31:31] */ |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_DONE_MASK 0x80000000 |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_DONE_SHIFT 31 |
| |
| /* PCIE_0_MISC_PERST :: CCE_STATUS :: reserved0 [30:03] */ |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_reserved0_MASK 0x7ffffff8 |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_reserved0_SHIFT 3 |
| |
| /* PCIE_0_MISC_PERST :: CCE_STATUS :: CCE_BAD_GISB_ACCESS [02:02] */ |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_BAD_GISB_ACCESS_MASK 0x00000004 |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_BAD_GISB_ACCESS_SHIFT 2 |
| |
| /* PCIE_0_MISC_PERST :: CCE_STATUS :: CCE_BAD_I2C_ACCESS [01:01] */ |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_BAD_I2C_ACCESS_MASK 0x00000002 |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_BAD_I2C_ACCESS_SHIFT 1 |
| |
| /* PCIE_0_MISC_PERST :: CCE_STATUS :: CCE_BAD_SECTION_ID [00:00] */ |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_BAD_SECTION_ID_MASK 0x00000001 |
| #define BCHP_PCIE_0_MISC_PERST_CCE_STATUS_CCE_BAD_SECTION_ID_SHIFT 0 |
| |
| #endif /* #ifndef BCHP_PCIE_0_MISC_PERST_H__ */ |
| |
| /* End of File */ |
